\8P( PTNcompulab,sbc-am57xcompulab,cl-som-am57xti,am5728ti,dra742ti,dra74ti,dra7&&7CompuLab CL-SOM-AM57x on SB-SOM-AM57xchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000 /display#/ocp/dss@58000000/encoder@58060000timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&cpuscpu@0"cpuarm,cortex-a15.BIcpuUcucpu@1"cpuarm,cortex-a15.opp-tableoperating-points-v2-ti-cpuopp_nom@1000000000; , P0opp_od@1176000000FV @ @socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busl3_main_1l3_main_2 DE   l4@4a000000ti,dra7-l4-cfgsimple-bus J"scm@2000ti,dra7-scm-coresimple-bus   scm_conf@0sysconsimple-bus pbias_regulator@e00ti,pbias-dra7ti,pbias-omappbias_mmc_omap5pbias_mmc_omap5,w@D-clocksdss_deshdcp_clk@558\ti,gate-clockB iXehrpwm0_tbclk@558\ti,gate-clockB iXehrpwm1_tbclk@558\ti,gate-clockB iXehrpwm2_tbclk@558\ti,gate-clockB iXsys_32k_ck\ ti,mux-clockB iLLpinmux@1400ti,dra7-padconfpinctrl-singlehv ?leds_pins_default|i2c1_pins_defaulti2c3_pins_default  i2c4_pins_default  tps659038_pins_defaultmmc2_pins_defaultPpinmux_qspi1_pins0tcpsw_pins_defaultPTX\`dhlptx|cpsw_pins_sleepPTX\`dhlptx|davinci_mdio_pins_defaultdavinci_mdio_pins_sleeppinmux_ads7846_pinsdmcasp3_pins_default $(,0mcasp3_pins_sleep $(,0uart3_pins_defaultH L mmc1_pins_default@TX\`dhl|pinmux_usb1_pins i2c5_pins_default  lcd_pins_defaultdpinmux_hdmi_pins pinmux_hdmi_conn_pins  scm_conf@1c04syscon scm_conf@1c24syscon$$dma-router@b78ti,dra7-dma-crossbar x dma-router@c78ti,dra7-dma-crossbar x|cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ck\ti,dra7-atl-clockB??atl_clkin1_ck\ti,dra7-atl-clockB>>atl_clkin2_ck\ti,dra7-atl-clockB==atl_clkin3_ck\ti,dra7-atl-clockB<<hdmi_clkin_ck\ fixed-clock--mlb_clkin_ck\ fixed-clockmlbp_clkin_ck\ fixed-clockpciesref_acs_clk_ck\ fixed-clockVVref_clkin0_ck\ fixed-clockAAref_clkin1_ck\ fixed-clockBBref_clkin2_ck\ fixed-clockCCref_clkin3_ck\ fixed-clockDDrmii_clk_ck\ fixed-clockmmsdvenc_clkin_ck\ fixed-clocksecure_32k_clk_src_ck\ fixed-clocksys_clk32_crystal_ck\ fixed-clock  sys_clk32_pseudo_ck\fixed-factor-clockB#b  virt_12000000_ck\ fixed-clockzzvirt_13000000_ck\ fixed-clock]@virt_16800000_ck\ fixed-clockY||virt_19200000_ck\ fixed-clock$}}virt_20000000_ck\ fixed-clock1-{{virt_26000000_ck\ fixed-clock~~virt_27000000_ck\ fixed-clockvirt_38400000_ck\ fixed-clockIsys_clkin2\ fixed-clockX@@usb_otg_clkin_ck\ fixed-clockvideo1_clkin_ck\ fixed-clock66video1_m2_clkin_ck\ fixed-clock,,video2_clkin_ck\ fixed-clock77video2_m2_clkin_ck\ fixed-clock++dpll_abe_ck@1e0\ti,omap4-dpll-m4xen-clockBdpll_abe_x2_ck\ti,omap4-dpll-x2-clockBdpll_abe_m2x2_ck@1f0\ti,divider-clockB-8Jaabe_clk@108\ti,divider-clockB-xdpll_abe_m2_ck@1f0\ti,divider-clockB-8Jakkdpll_abe_m3x2_ck@1f4\ti,divider-clockB-8Jadpll_core_byp_mux@12c\ ti,mux-clockBi,dpll_core_ck@120\ti,omap4-dpll-core-clockB $,(dpll_core_x2_ck\ti,omap4-dpll-x2-clockBdpll_core_h12x2_ck@13c\ti,divider-clockB-?8<Jampu_dpll_hs_clk_div\fixed-factor-clockB#dpll_mpu_ck@160\ti,omap5-mpu-dpll-clockB`dlhdpll_mpu_m2_ck@170\ti,divider-clockB-8pJampu_dclk_div\fixed-factor-clockB#dsp_dpll_hs_clk_div\fixed-factor-clockB#dpll_dsp_byp_mux@240\ ti,mux-clockBi@dpll_dsp_ck@234\ti,omap4-dpll-clockB48@<dpll_dsp_m2_ck@244\ti,divider-clockB-8DJaiva_dpll_hs_clk_div\fixed-factor-clockB#  dpll_iva_byp_mux@1ac\ ti,mux-clockB i!!dpll_iva_ck@1a0\ti,omap4-dpll-clockB!""dpll_iva_m2_ck@1b0\ti,divider-clockB"-8Ja##iva_dclk\fixed-factor-clockB##dpll_gpu_byp_mux@2e4\ ti,mux-clockBi$$dpll_gpu_ck@2d8\ti,omap4-dpll-clockB$%%dpll_gpu_m2_ck@2e8\ti,divider-clockB%-8Jappdpll_core_m2_ck@130\ti,divider-clockB-80Ja&&core_dpll_out_dclk_div\fixed-factor-clockB&#dpll_ddr_byp_mux@21c\ ti,mux-clockBi''dpll_ddr_ck@210\ti,omap4-dpll-clockB'((dpll_ddr_m2_ck@220\ti,divider-clockB(-8 Jadpll_gmac_byp_mux@2b4\ ti,mux-clockBi))dpll_gmac_ck@2a8\ti,omap4-dpll-clockB)**dpll_gmac_m2_ck@2b8\ti,divider-clockB*-8Javideo2_dclk_div\fixed-factor-clockB+#video1_dclk_div\fixed-factor-clockB,#hdmi_dclk_div\fixed-factor-clockB-#per_dpll_hs_clk_div\fixed-factor-clockB#ZZusb_dpll_hs_clk_div\fixed-factor-clockB#^^eve_dpll_hs_clk_div\fixed-factor-clockB#..dpll_eve_byp_mux@290\ ti,mux-clockB.i//dpll_eve_ck@284\ti,omap4-dpll-clockB/00dpll_eve_m2_ck@294\ti,divider-clockB0-8Ja11eve_dclk_div\fixed-factor-clockB1#dpll_core_h13x2_ck@140\ti,divider-clockB-?8@Jadpll_core_h14x2_ck@144\ti,divider-clockB-?8DJanndpll_core_h22x2_ck@154\ti,divider-clockB-?8TJa88dpll_core_h23x2_ck@158\ti,divider-clockB-?8XJayydpll_core_h24x2_ck@15c\ti,divider-clockB-?8\Jadpll_ddr_x2_ck\ti,omap4-dpll-x2-clockB(22dpll_ddr_h11x2_ck@228\ti,divider-clockB2-?8(Jadpll_dsp_x2_ck\ti,omap4-dpll-x2-clockB33dpll_dsp_m3x2_ck@248\ti,divider-clockB3-8HJadpll_gmac_x2_ck\ti,omap4-dpll-x2-clockB*44dpll_gmac_h11x2_ck@2c0\ti,divider-clockB4-?8Ja55dpll_gmac_h12x2_ck@2c4\ti,divider-clockB4-?8Jadpll_gmac_h13x2_ck@2c8\ti,divider-clockB4-?8Jadpll_gmac_m3x2_ck@2bc\ti,divider-clockB4-8Jagmii_m_clk_div\fixed-factor-clockB5#hdmi_clk2_div\fixed-factor-clockB-#JJhdmi_div_clk\fixed-factor-clockB-#PPl3_iclk_div@100\ti,divider-clock-iBx  l4_root_clk_div\fixed-factor-clockB #  video1_clk2_div\fixed-factor-clockB6#HHvideo1_div_clk\fixed-factor-clockB6#NNvideo2_clk2_div\fixed-factor-clockB7#IIvideo2_div_clk\fixed-factor-clockB7#OOipu1_gfclk_mux@520\ ti,mux-clockB8i mcasp1_ahclkr_mux@550\ ti,mux-clock8B9:;<=>?@ABCDEFiPmcasp1_ahclkx_mux@550\ ti,mux-clock8B9:;<=>?@ABCDEFiPmcasp1_aux_gfclk_mux@550\ ti,mux-clockBGHIJiPtimer5_gfclk_mux@558\ ti,mux-clock0BKL@ABCDMNOPQiXtimer6_gfclk_mux@560\ ti,mux-clock0BKL@ABCDMNOPQi`timer7_gfclk_mux@568\ ti,mux-clock0BKL@ABCDMNOPQihtimer8_gfclk_mux@570\ ti,mux-clock0BKL@ABCDMNOPQipuart6_gfclk_mux@580\ ti,mux-clockBRSidummy_ck\ fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200\ti,omap4-dpll-clockB TTdpll_pcie_ref_m2ldo_ck@210\ti,divider-clockBT-8JaUUapll_pcie_in_clk_mux@4ae06118 ti,mux-clockBUV\iWWapll_pcie_ck@21c\ti,dra7-apll-clockBWT XXoptfclk_pciephy1_32khz@4a0093b0ti,gate-clockBL\ioptfclk_pciephy2_32khz@4a0093b8ti,gate-clockBL\ioptfclk_pciephy_div@4a00821cti,divider-clockBX\i-YYoptfclk_pciephy1_clk@4a0093b0ti,gate-clockBX\i optfclk_pciephy2_clk@4a0093b8ti,gate-clockBX\i optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockBY\i optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockBY\i apll_pcie_clkvcoldo\fixed-factor-clockBX#apll_pcie_clkvcoldo_div\fixed-factor-clockBX#apll_pcie_m2_ck\fixed-factor-clockBX#dpll_per_byp_mux@14c\ ti,mux-clockBZiL[[dpll_per_ck@140\ti,omap4-dpll-clockB[@DLH\\dpll_per_m2_ck@150\ti,divider-clockB\-8PJa]]func_96m_aon_dclk_div\fixed-factor-clockB]#dpll_usb_byp_mux@18c\ ti,mux-clockB^i__dpll_usb_ck@180\ti,omap4-dpll-j-type-clockB_``dpll_usb_m2_ck@190\ti,divider-clockB`-8Jaccdpll_pcie_ref_m2_ck@210\ti,divider-clockBT-8Jadpll_per_x2_ck\ti,omap4-dpll-x2-clockB\aadpll_per_h11x2_ck@158\ti,divider-clockBa-?8XJabbdpll_per_h12x2_ck@15c\ti,divider-clockBa-?8\Jaffdpll_per_h13x2_ck@160\ti,divider-clockBa-?8`Jawwdpll_per_h14x2_ck@164\ti,divider-clockBa-?8dJaoodpll_per_m2x2_ck@150\ti,divider-clockBa-8PJaSSdpll_usb_clkdcoldo\fixed-factor-clockB`#eefunc_128m_clk\fixed-factor-clockBb#rrfunc_12m_fclk\fixed-factor-clockBS#func_24m_clk\fixed-factor-clockB]#;;func_48m_fclk\fixed-factor-clockBS#RRfunc_96m_fclk\fixed-factor-clockBS#l3init_60m_fclk@104\ti,divider-clockBcclkout2_clk@6b0\ti,gate-clockBdil3init_960m_gfclk@6c0\ti,gate-clockBeijjdss_32khz_clk@1120\ti,gate-clockBLi  dss_48mhz_clk@1120\ti,gate-clockBRi  dss_dss_clk@1120\ti,gate-clockBfi dss_hdmi_clk@1120\ti,gate-clockBgi  dss_video1_clk@1120\ti,gate-clockBhi  dss_video2_clk@1120\ti,gate-clockBii  gpio2_dbclk@1760\ti,gate-clockBLi`gpio3_dbclk@1768\ti,gate-clockBLihgpio4_dbclk@1770\ti,gate-clockBLipgpio5_dbclk@1778\ti,gate-clockBLixgpio6_dbclk@1780\ti,gate-clockBLigpio7_dbclk@1810\ti,gate-clockBLigpio8_dbclk@1818\ti,gate-clockBLimmc1_clk32k@1328\ti,gate-clockBLi(mmc2_clk32k@1330\ti,gate-clockBLi0mmc3_clk32k@1820\ti,gate-clockBLi mmc4_clk32k@1828\ti,gate-clockBLi(sata_ref_clk@1388\ti,gate-clockBiusb_otg_ss1_refclk960m@13f0\ti,gate-clockBjiusb_otg_ss2_refclk960m@1340\ti,gate-clockBji@usb_phy1_always_on_clk32k@640\ti,gate-clockBLi@usb_phy2_always_on_clk32k@688\ti,gate-clockBLiusb_phy3_always_on_clk32k@698\ti,gate-clockBLiatl_dpll_clk_mux@c00\ ti,mux-clockBL67-i llatl_gfclk_mux@c00\ ti,mux-clock B kli rmii_50mhz_clk_mux@13d0\ ti,mux-clockB5migmac_rft_clk_mux@13d0\ ti,mux-clockB67k- igpu_core_gclk_mux@1220\ ti,mux-clock Bnopi gpu_hyd_gclk_mux@1220\ ti,mux-clock Bnopi l3instr_ts_gclk_div@e50\ti,divider-clockBqiP  mcasp2_ahclkr_mux@1860\ ti,mux-clock8B9:;<=>?@ABCDEFi`mcasp2_ahclkx_mux@1860\ ti,mux-clock8B9:;<=>?@ABCDEFi`mcasp2_aux_gfclk_mux@1860\ ti,mux-clockBGHIJi`mcasp3_ahclkx_mux@1868\ ti,mux-clock8B9:;<=>?@ABCDEFihmcasp3_aux_gfclk_mux@1868\ ti,mux-clockBGHIJihmcasp4_ahclkx_mux@1898\ ti,mux-clock8B9:;<=>?@ABCDEFimcasp4_aux_gfclk_mux@1898\ ti,mux-clockBGHIJimcasp5_ahclkx_mux@1878\ ti,mux-clock8B9:;<=>?@ABCDEFixmcasp5_aux_gfclk_mux@1878\ ti,mux-clockBGHIJixmcasp6_ahclkx_mux@1904\ ti,mux-clock8B9:;<=>?@ABCDEFimcasp6_aux_gfclk_mux@1904\ ti,mux-clockBGHIJimcasp7_ahclkx_mux@1908\ ti,mux-clock8B9:;<=>?@ABCDEFimcasp7_aux_gfclk_mux@1908\ ti,mux-clockBGHIJimcasp8_ahclkx_mux@1890\ ti,mux-clock8B9:;<=>?@ABCDEFimcasp8_aux_gfclk_mux@1890\ ti,mux-clockBGHIJimmc1_fclk_mux@1328\ ti,mux-clockBrSi(ssmmc1_fclk_div@1328\ti,divider-clockBsi-(xmmc2_fclk_mux@1330\ ti,mux-clockBrSi0ttmmc2_fclk_div@1330\ti,divider-clockBti-0xmmc3_gfclk_mux@1820\ ti,mux-clockBRSi uummc3_gfclk_div@1820\ti,divider-clockBui- xmmc4_gfclk_mux@1828\ ti,mux-clockBRSi(vvmmc4_gfclk_div@1828\ti,divider-clockBvi-(xqspi_gfclk_mux@1838\ ti,mux-clockBrwi8xxqspi_gfclk_div@1838\ti,divider-clockBxi-8xtimer10_gfclk_mux@1728\ ti,mux-clock,BKL@ABCDMNOPi(timer11_gfclk_mux@1730\ ti,mux-clock,BKL@ABCDMNOPi0timer13_gfclk_mux@17c8\ ti,mux-clock,BKL@ABCDMNOPitimer14_gfclk_mux@17d0\ ti,mux-clock,BKL@ABCDMNOPitimer15_gfclk_mux@17d8\ ti,mux-clock,BKL@ABCDMNOPitimer16_gfclk_mux@1830\ ti,mux-clock,BKL@ABCDMNOPi0timer2_gfclk_mux@1738\ ti,mux-clock,BKL@ABCDMNOPi8timer3_gfclk_mux@1740\ ti,mux-clock,BKL@ABCDMNOPi@timer4_gfclk_mux@1748\ ti,mux-clock,BKL@ABCDMNOPiHtimer9_gfclk_mux@1750\ ti,mux-clock,BKL@ABCDMNOPiPuart1_gfclk_mux@1840\ ti,mux-clockBRSi@uart2_gfclk_mux@1848\ ti,mux-clockBRSiHuart3_gfclk_mux@1850\ ti,mux-clockBRSiPuart4_gfclk_mux@1858\ ti,mux-clockBRSiXuart5_gfclk_mux@1870\ ti,mux-clockBRSipuart7_gfclk_mux@18d0\ ti,mux-clockBRSiuart8_gfclk_mux@18e0\ ti,mux-clockBRSiuart9_gfclk_mux@18e8\ ti,mux-clockBRSivip1_gclk_mux@1020\ ti,mux-clockB yi vip2_gclk_mux@1028\ ti,mux-clockB yi(vip3_gclk_mux@1030\ ti,mux-clockB yi0clockdomainscoreaon_clkdmti,clockdomainB`l4@4ae00000ti,dra7-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110\ ti,mux-clockBz{|}~Jabe_dpll_sys_clk_mux@118\ ti,mux-clockB@abe_dpll_bypass_clk_mux@114\ ti,mux-clockBLabe_dpll_clk_mux@10c\ ti,mux-clockBL abe_24m_fclk@11c\ti,divider-clockB99aess_fclk@178\ti,divider-clockBx-abe_giclk_div@174\ti,divider-clockBt-MMabe_lp_clk_div@1d8\ti,divider-clockB abe_sys_clk_div@120\ti,divider-clockB -::adc_gfclk_mux@1dc\ ti,mux-clock B@Lsys_clk1_dclk_div@1c8\ti,divider-clockB-@xsys_clk2_dclk_div@1cc\ti,divider-clockB@-@xper_abe_x1_dclk_div@1bc\ti,divider-clockBk-@xdsp_gclk_div@18c\ti,divider-clockB-@xgpu_dclk@1a0\ti,divider-clockBp-@xemif_phy_dclk_div@190\ti,divider-clockB-@xgmac_250m_dclk_div@19c\ti,divider-clockB-@xgmac_main_clk\fixed-factor-clockB#l3init_480m_dclk_div@1ac\ti,divider-clockBc-@xusb_otg_dclk_div@184\ti,divider-clockB-@xsata_dclk_div@1c0\ti,divider-clockB-@xpcie2_dclk_div@1b8\ti,divider-clockB-@xpcie_dclk_div@1b4\ti,divider-clockB-@xemu_dclk_div@194\ti,divider-clockB-@xsecure_32k_dclk_div@1c4\ti,divider-clockB-@xclkoutmux0_clk_mux@158\ ti,mux-clockXBXQQclkoutmux1_clk_mux@15c\ ti,mux-clockXB\clkoutmux2_clk_mux@160\ ti,mux-clockXB`ddcustefuse_sys_gfclk_div\fixed-factor-clockB#eve_clk@180\ ti,mux-clockB1hdmi_dpll_clk_mux@164\ ti,mux-clockB@dggmlb_clk@134\ti,divider-clockB-@4xEEmlbp_clk@130\ti,divider-clockB-@0xFFper_abe_x1_gfclk2_div@138\ti,divider-clockBk-@8xGGtimer_sys_clk_div@144\ti,divider-clockBD-KKvideo1_dpll_clk_mux@168\ ti,mux-clockB@hhhvideo2_dpll_clk_mux@16c\ ti,mux-clockB@liiwkupaon_iclk_mux@108\ ti,mux-clockBqqgpio1_dbclk@1838\ti,gate-clockBLi8dcan1_sys_clk_mux@1888\ ti,mux-clockB@itimer1_gfclk_mux@1840\ ti,mux-clock,BKL@ABCDMNOPi@uart10_gfclk_mux@1880\ ti,mux-clockBRSiclockdomainsscm_conf@c000sysconaxi@0 simple-busQQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfig"pci00 00pcie1 pcie-phy0`interrupt-controlleraxi@1 simple-busQQ00  disabledpcie@51800000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcd"pci00000pcie2 pcie-phy0`interrupt-controllerocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000  disabled mmio-sram@@ @@ocmcram@40500000  disabled mmio-sram@P @Pbandgap@4a0021e00J! J#, J#,J#txrx okaydefault  mmc@480b4000ti,omap4-hsmmcH @ Qmmc2/0txrx okaydefault mmc@480ad000ti,omap4-hsmmcH  Ymmc3MNtxrx  disabledmmc@480d1000ti,omap4-hsmmcH  [mmc49:txrx  disabledmmu@40d01000ti,dra7-dsp-iommu@  mmu0_dsp1 -  disabledmmu@40d02000ti,dra7-dsp-iommu@   mmu1_dsp1 -  disabledmmu@58882000ti,dra7-iommuX   mmu_ipu1 A  disabledmmu@55082000ti,dra7-iommuU   mmu_ipu2 A  disabledregulator-abb-mpu ti,abb-v3abb_mpuBW2h(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addressxH,@vregulator-abb-ivahd ti,abb-v3 abb_ivahdBW2h(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-addressx@H0regulator-abb-dspeve ti,abb-v3 abb_dspeveBW2h(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-addressx H0regulator-abb-gpu ti,abb-v3abb_gpuBW2h(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-addressxHvspi@48098000ti,omap4-mcspiH  <mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3  disabledspi@4809a000ti,omap4-mcspiH  =mcspi2 +,-.tx0rx0tx1rx1  disabledspi@480b8000ti,omap4-mcspiH  Vmcspi3tx0rx0  disabledspi@480ba000ti,omap4-mcspiH  +mcspi4FGtx0rx0  disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmapXqspiBIfck W okaydefaultlspi_flash@0spansion,m25p80jedec,spi-norlpartition@0uboot partition@c0000uboot environment partition@100000 reservedads7846@0default ti,ads7846`&  #,5>N^n ~Zocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrltBIsysclkrefclkpciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_txBTUY;Idpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkpciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx BTUY;Idpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk  disabledsata@4a141100snps,dwc-ahciJJ 1 sata-phyBsata okayrtc@48838000ti,am3352-rtcHrtcssBLocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1phy@4a084000ti,dra7x-usb2ti,omap-usb2J@BIwkupclkrefclkphy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPtBIwkupclkrefclkphy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlp BIwkupclksysclkrefclkomap_dwc3_1@48880000ti,dwc3 usb_otg_ss1H Husb@48890000 snps,dwc3Hp$GGH6peripheralhostotgusb2-phyusb3-phy super-speedhostdefaultomap_dwc3_2@488c0000ti,dwc3 usb_otg_ss2H Wusb@488d0000 snps,dwc3Hp$IIW6peripheralhostotg usb2-phy high-speedhostomap_dwc3_3@48900000ti,dwc3 usb_otg_ss3H X  disabledusb@48910000 snps,dwc3Hp$XXX6peripheralhostotg high-speedotgelm@48078000ti,am3352-elmH elm  disabledgpmc@50000000ti,am3352-gpmcgpmcP|  rxtx4@O_  disabledatl@4843c000 ti,dra7-atlHCatlR?>=<BIfck  disabledmcasp@48460000ti,dra7-mcasp-audiomcasp1HF Empudathg6txrxtxrx BIfckahclkxahclkr  disabledmcasp@48464000ti,dra7-mcasp-audiomcasp2HF@ Empudat6txrxtxrx BIfckahclkxahclkr  disabledmcasp@48468000ti,dra7-mcasp-audiomcasp3HF Fmpudat6txrxtxrxB Ifckahclkx okaydefaultsleepeowmcasp@4846c000ti,dra7-mcasp-audiomcasp4HF HC`mpudat6txrxtxrxB Ifckahclkx  disabledmcasp@48470000ti,dra7-mcasp-audiomcasp5HG HCmpudat6txrxtxrxB Ifckahclkx  disabledmcasp@48474000ti,dra7-mcasp-audiomcasp6HG@ HDmpudat6txrxtxrxB Ifckahclkx  disabledmcasp@48478000ti,dra7-mcasp-audiomcasp7HG HEmpudat6txrxtxrxB Ifckahclkx  disabledmcasp@4847c000ti,dra7-mcasp-audiomcasp8HG HE@mpudat6txrxtxrxB Ifckahclkx  disabledcrossbar@4a002a48ti,irq-crossbarJ*H0&  ethernet@48484000ti,dra7-cpswti,cpswgmacB Ifckcpts      % 2xL BHH@HHR. S0NOPQ okaydefaultsleepe ^mdio@48485000ti,cpsw-mdioti,davinci_mdio davinci_mdio hB@HHPdefaultsleepeslave@48480200 q } rgmii-txid slave@48480300 q } rgmii-txid cpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_candcan1J  X B  disabledcan@481d0000ti,dra7-d_candcan2HH  X B  disableddss@58000000 ti,dra7-dss ok dss_core 8(XX@TXC XTX (dsspll1_clkctrlpll1pll2_clkctrlpll2 BIfckvideo1_clkvideo2_clk dispc@58001000ti,dra7-dispcX  dss_dispcBIfck 4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore ` ok dss_hdmiB Ifcksys_clk defaultportendpoint    portendpoint    epwmss@4843e000 ti,dra746-pwmssti,am33xx-pwmssHC0epwmss0  disabledpwm@4843e200"ti,dra746-ehrpwmti,am3352-ehrpwm HCB  Itbclkfck  disabledecap@4843e100ti,dra746-ecapti,am3352-ecap HCB Ifck  disabledepwmss@48440000 ti,dra746-pwmssti,am33xx-pwmssHD0epwmss1  disabledpwm@48440200"ti,dra746-ehrpwmti,am3352-ehrpwm HDB  Itbclkfck  disabledecap@48440100ti,dra746-ecapti,am3352-ecap HDB Ifck  disabledepwmss@48442000 ti,dra746-pwmssti,am33xx-pwmssHD 0epwmss2  disabledpwm@48442200"ti,dra746-ehrpwmti,am3352-ehrpwm HD"B  Itbclkfck  disabledecap@48442100ti,dra746-ecapti,am3352-ecap HD!B Ifck  disabledaes@4b500000 ti,omap4-aesaes1KP PontxrxB Ifckaes@4b700000 ti,omap4-aesaes2Kp ;rqtxrxB Ifckdes@480a5000 ti,omap4-desdesH P MuttxrxB Ifcksham@53100000ti,omap5-shamshamK . wrxB Ifckrng@48090000 ti,omap4-rngrngH  /B Ifckdsp_system@41500000sysconAPomap_dwc3_4@48940000ti,dwc3 usb_otg_ss4H Z  disabledusb@48950000 snps,dwc3Hp$YYZ6peripheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  mmu0_dsp2 -  disabledmmu@41502000ti,dra7-dsp-iommuAP   mmu1_dsp2 -  disabledthermal-zonescpu_thermal  $ 2 Btripscpu_alert O [)passivecpu_crit O [ )criticalcooling-mapsmap0 f kgpu_thermal  $ 2 Btripsgpu_crit OH [ )criticalcore_thermal  $ 2 Btripscore_crit OH [ )criticaldspeve_thermal  $ 2 Btripsdspeve_crit OH [ )criticaliva_thermal  $ 2 Btripsiva_crit OH [ )criticalpmuarm,cortex-a15-pmu&memory@0"memory leds gpio-ledsdefaultled0cl-som-am57x:green  zheartbeat offfixedregulator-vdd_3v3regulator-fixedvdd_3v3,2ZD2Zfixedregulator-ads7846-regregulator-fixed ads7846-reg,2ZD2Zsound0simple-audio-card CL-SOM-AM57x-Sound-Card i2s  C HeadphoneHeadphone JackMicrophoneMicrophone JackLineLine Jackf )Headphone JackRHPOUTHeadphone JackLHPOUTLLINEINLine JackMICINMic BiasMic BiasMicrophone Jacksimple-audio-card,cpu Csimple-audio-card,codec C Mfixedregulator-v3_3regulator-fixedvsb_3v3,2ZD2Z4 ddisplay!startek,startek-kd050cpanel-dpilcddefault wpanel-timing@    ( ( +       portendpoint   connectorhdmi-connectorhdmi)adefault   portendpoint   #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0display0display1interruptsinterrupt-controller#interrupt-cellsreglinux,phandledevice_typeoperating-points-v2clocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-tolerancesysconopp-sharedopp-hzopp-microvoltopp-supported-hwopp-suspendti,hwmodsrangesinterrupts-extendedregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shift#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesbus-rangenum-laneslinux,pci-domainphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsti,no-reset-on-initdmasdma-namespinctrl-namespinctrl-0#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellsti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondspagesize#sound-dai-cellsti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpioswp-gpiosti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsspi-max-frequencylabelvcc-supplypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsports-implementedphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,provided-clockspinctrl-1op-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointdata-lines#pwm-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicelinux,default-triggerdefault-statesimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpios