y8s (r+Engicam i.CoreM6 DualLite/Solo Starter Kit!engicam,imx6-icorefsl,imx6dlchosenmemory,memory8aliases):zcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi8@ ([ppzipgper   rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi8@ ( [qqzipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi8@ (![rrzipgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi8@@ ("[sszipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart8@ ([zipgper   rxtx disabledesai@02024000!fsl,imx35-esai8@@ (3([vzcorememextalfsysspba   rxtx disabledssi@02028000!fsl,imx6q-ssifsl,imx51-ssi8@ (.[ zipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssi8@ (/[ zipgbaud  ) *rxtx disabledssi@02030000!fsl,imx6q-ssifsl,imx51-ssi8@ (0[ zipgbaud  - .rxtx disabledasrc@02034000!fsl,imx53-asrc8@@ (2[kzmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`      rxarxbrxctxatxbtxcokayspba@0203c0008@vpu@02040000!fsl,imx6dl-vpucnm,coda9608(  3bitjpeg[zperahb  aipstz@0207c0008@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm8@ (S[>zipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm8@@ (T[>zipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm8@ (U[>zipgperokaydefault b9h9pwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm8@ (V[>zipgper disabledflexcan@02090000!fsl,imx6q-flexcan8 @ (n[lmzipgperokaydefault flexcan@02094000!fsl,imx6q-flexcan8 @@ (o[nozipgperokaydefaultgpt@02098000!fsl,imx6dl-gpt8 @ (7[wxzipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio8 @(BC@   {y~zb#h#gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio8 @(DEJIHGFEDOvuqgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio8 @@(FG@ai cQgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio8 @(HI     '8=.gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio8 @(JKxML/ 9%$#&gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio8 @(LM K   Ngpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio8 @@(NO   b!h!kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp8 @ (R[> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt8 @ (P[wdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt8 @ (Q[ disabledccm@020c4000!fsl,imx6q-ccm8 @@(WX-bhanatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus8 $(16bhregulator-1p1!fsl,anatop-regulatorDvdd1p1SB@kO 5regulator-3p0!fsl,anatop-regulatorDvdd3p0S*k0 ( 3@regulator-2p5!fsl,anatop-regulatorDvdd2p5S"Uk)00 +xregulator-vddcore!fsl,anatop-regulatorDvddarmS k @ p$;  b3h3regulator-vddpu!fsl,anatop-regulatorDvddpuS k R@  p$;  bhregulator-vddsoc!fsl,anatop-regulatorDvddsocS k @ p$;  b4h4tempmon!fsl,imx6q-tempmon (1nz[usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy8  (,[bhusbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy8  (-[bhsnvs@020cc000#!fsl,sec-v4.0-monsysconsimple-mfd8 @bhsnvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4(snvs-poweroff!syscon-poweroff8` disabledepit@020d00008 @ (8epit@020d40008 @@ (9src@020d8000!fsl,imx6q-srcfsl,imx51-src8 @([`b h gpc@020dc000!fsl,imx6q-gpc8 @(YZ0[zJybhiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon88bhiomuxc@020e0000!fsl,imx6dl-iomuxc8@bhenetgrp( b h flexcan1grp0`H L4 b h flexcan2grp0T< hP bhgpmi-nandpXlTt\x`<$8 lptx|@(bhi2c1grp0X(h@tDl@b$h$i2c2grp0p@dLt@b%h%i2c3grpH0x@L|@ 0b&h&uart4grp0D,X@ b)h)pwm3grpD,b h usbotggrppYbhusdhc1grppp (pppppppppb"h"ldb!fsl,imx6q-ldbfsl,imx53-ldb disabled0[!"'((zdi0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@08 disabledport@08endpointb,h,port@18endpointb0h0lvds-channel@18 disabledport@08endpointb-h-port@18endpointb1h1dcic@020e40008@@ (|dcic@020e80008@ (}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma8@ ([zipgahbCimx/sdma/sdma-imx6q.binb h pxp@020f00008@ (bepdc@020f40008@@ (alcdif@020f80008@ ('aips-bus@02100000!fsl,aips-bussimple-bus8!caam@2100000 !fsl,sec-v4.08 ! [zmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ring8 (ijr1@2000!fsl,sec-v4.0-job-ring8  (jaipstz@0217c0008@usb@02184000!fsl,imx6q-usbfsl,imx27-usb8@ (+[ 2okayFdefaultRusb@02184200!fsl,imx6q-usbfsl,imx27-usb8B (([ghost 2okayFRusb@02184400!fsl,imx6q-usbfsl,imx27-usb8D ()[ghost 2 disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usb8F (*[ghost 2 disabledusbmisc@02184800o!fsl,imx6q-usbmisc8H[bhethernet@02188000!fsl,imx6q-fec8@ |vw[uu zipgahbptpokaydefault  ! rmiimlb@0218c0008@$(5u~usdhc@02190000!fsl,imx6q-usdhc8@ ([ zipgahbperokaydefault" #usdhc@02194000!fsl,imx6q-usdhc8@@ ([ zipgahbper disabledusdhc@02198000!fsl,imx6q-usdhc8@ ([ zipgahbper disabledusdhc@0219c000!fsl,imx6q-usdhc8@ ([ zipgahbper disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c8@ ($[}okaydefault$i2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c8@@ (%[~okaydefault%i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c8@ (&[okaydefault&romcp@021ac0008@mmdc@021b0000!fsl,imx6q-mmdc8@mmdc@021b40008@@weim@021b8000!fsl,imx6q-weim8@ ([ disabledocotp@021bc000!fsl,imx6q-ocotpsyscon8@[bhtzasc@021d00008@ (ltzasc@021d40008@@ (maudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux8@ disabledmipi@021dc0008@mipi@021e00008@ disabledportsport@08endpoint'b+h+port@18endpoint(b/h/vdoa@021e4000!fsl,imx6q-vdoa8@@ ([serial@021e8000!fsl,imx6q-uartfsl,imx21-uart8@ ([zipgper   rxtx disabledserial@021ec000!fsl,imx6q-uartfsl,imx21-uart8@ ([zipgper   rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart8@ ([zipgper   rxtxokaydefault)serial@021f4000!fsl,imx6q-uartfsl,imx21-uart8@@ ([zipgper  ! "rxtx disabledi2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c8@ (#[t disabledipu@02400000!fsl,imx6q-ipu8@@([ zbusdi0di1 port@08port@18port@28b5h5disp0-endpointhdmi-endpoint*bhmipi-endpoint+b'h'lvds0-endpoint,bhlvds1-endpoint-bhport@38b6h6disp1-endpointhdmi-endpoint.bhmipi-endpoint/b(h(lvds0-endpoint0bhlvds1-endpoint1bhsram@00900000 !mmio-sram8[b h cpuscpu@0!arm,cortex-a9,cpu822  02  l([h)zarmpll2_pfd2_396msteppll1_swpll1_sys3)4cpu@1!arm,cortex-a9,cpu82display-subsystem!fsl,imx-display-subsystem456gpu-subsystem!fsl,imx-gpu-subsystem:78backlight!pwm-backlight @9 E @Wregulator-3p3v!regulator-fixedD3P3VS2Zk2Zpbhregulator-usb-h1-vbus!regulator-fixed Dusb_h1_vbusSLK@kLK@pbhregulator-usb-otg-vbus!regulator-fixed Dusb_otg_vbusSLK@kLK@pbhclock-rmii-clk !fixed-clock}x@bh #address-cells#size-cellsmodelcompatibledevice_typeregethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclockslinux,phandlereg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0nand-on-flash-bbtgprremote-endpointpower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridebus-rangenum-lanesinterrupt-map-maskinterrupt-map#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsxceiver-supplygpio-controller#gpio-cellsgpio-rangesassigned-clocksassigned-clock-parentsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatopregmap#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-reset-gpiosphy-modebus-widthcd-gpiosno-1-8-vfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportscorespwmsbrightness-levelsdefault-brightness-levelregulator-boot-on