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`dlhdpll_mpu_m2_ck@170ti,divider-clockpper_dpll_hs_clk_divfixed-factor-clock..usb_dpll_hs_clk_divfixed-factor-clock44l3_iclk_div@100ti,divider-clock!!gpu_l3_iclkfixed-factor-clock!l4_root_clk_div@100ti,divider-clock!slimbus1_slimbus_clk@560ti,gate-clock" `aess_fclk@528ti,divider-clock#(dmic_sync_mux_ck@538 ti,mux-clock $%&8''dmic_gfclk@538 ti,mux-clock '("8mcasp_sync_mux_ck@540 ti,mux-clock $%&@))mcasp_gfclk@540 ti,mux-clock )("@mcbsp1_sync_mux_ck@548 ti,mux-clock $%&H**mcbsp1_gfclk@548 ti,mux-clock *("Hmcbsp2_sync_mux_ck@550 ti,mux-clock $%&P++mcbsp2_gfclk@550 ti,mux-clock +("Pmcbsp3_sync_mux_ck@558 ti,mux-clock $%&X,,mcbsp3_gfclk@558 ti,mux-clock ,("Xtimer5_gfclk_mux@568 ti,mux-clock%-htimer6_gfclk_mux@570 ti,mux-clock%-ptimer7_gfclk_mux@578 ti,mux-clock%-xtimer8_gfclk_mux@580 ti,mux-clock%-dummy_ck fixed-clockclockdomainscm_core@8000ti,omap5-cm-core0clocksdpll_per_byp_mux@14c ti,mux-clock.L//dpll_per_ck@140ti,omap4-dpll-clock/@DLH00dpll_per_x2_ckti,omap4-dpll-x2-clock011dpll_per_h11x2_ck@158ti,divider-clock1?X77dpll_per_h12x2_ck@15cti,divider-clock1?\<<dpll_per_h14x2_ck@164ti,divider-clock1?dGGdpll_per_m2_ck@150ti,divider-clock0P99dpll_per_m2x2_ck@150ti,divider-clock1P88dpll_per_m3x2_ck@154ti,divider-clock1TUUdpll_unipro1_ck@200ti,omap4-dpll-clock 22dpll_unipro1_clkdcoldofixed-factor-clock2>>dpll_unipro1_m2_ck@210ti,divider-clock2??dpll_unipro2_ck@1c0ti,omap4-dpll-clock33dpll_unipro2_clkdcoldofixed-factor-clock3dpll_unipro2_m2_ck@1d0ti,divider-clock3dpll_usb_byp_mux@18c ti,mux-clock455dpll_usb_ck@180ti,omap4-dpll-j-type-clock566dpll_usb_clkdcoldofixed-factor-clock6EEdpll_usb_m2_ck@190ti,divider-clock6::func_128m_clkfixed-factor-clock7HHfunc_12m_fclkfixed-factor-clock8func_24m_clkfixed-factor-clock9&&func_48m_fclkfixed-factor-clock8;;func_96m_fclkfixed-factor-clock8==l3init_60m_fclk@104ti,divider-clock: @@dss_32khz_clk@1420ti,gate-clock-  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custefuse_sys_gfclk_divfixed-factor-clockdss_syc_gfclk_divfixed-factor-clock%%wkupaon_iclk_mux@108 ti,mux-clockRSSl3instr_ts_gclk_divfixed-factor-clockSgpio1_dbclk@1938ti,gate-clock-8timer1_gfclk_mux@1940 ti,mux-clock-@clockdomainsscrm@a000ti,omap5-scrm clocksauxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockTVVauxclk0_src_mux_ck@310ti,composite-mux-clock TUWWauxclk0_src_ckti,composite-clockVWXXauxclk0_ck@310ti,divider-clockXeeauxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockTYYauxclk1_src_mux_ck@314ti,composite-mux-clock TUZZauxclk1_src_ckti,composite-clockYZ[[auxclk1_ck@314ti,divider-clock[ffauxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockT\\auxclk2_src_mux_ck@318ti,composite-mux-clock TU]]auxclk2_src_ckti,composite-clock\]^^auxclk2_ck@318ti,divider-clock^ggauxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockT__auxclk3_src_mux_ck@31cti,composite-mux-clock TU``auxclk3_src_ckti,composite-clock_`aaauxclk3_ck@31cti,divider-clockahhauxclk4_src_gate_ck@320 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bdisabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma commonmcbsp1k!k"txrxbokay$default2mcbsp@40124000ti,omap4-mcbsp@@I@mpudma commonmcbsp2kktxrxbokay$default2mcbsp@40126000ti,omap4-mcbsp@`I`mpudma commonmcbsp3kktxrx bdisabledmailbox@4a0f4000ti,omap4-mailboxJ@ mailboxmbox_ipu  mbox_dsp  timer@4ae18000ti,omap5430-timerJ %timer1timer@48032000ti,omap5430-timerH  &timer2timer@48034000ti,omap5430-timerH@ 'timer3timer@48036000ti,omap5430-timerH` (timer4timer@40138000ti,omap5430-timer@I )timer5 timer@4013a000ti,omap5430-timer@I *timer6 timer@4013c000ti,omap5430-timer@I +timer7timer@4013e000ti,omap5430-timer@I ,timer8 timer@4803e000ti,omap5430-timerH -timer9 timer@48086000ti,omap5430-timerH` .timer10 timer@48088000ti,omap5430-timerH /timer11 wdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ P wd_timer2dmm@4e000000 ti,omap5-dmmN qdmmemif@4c000000 ti,emif-4d5emif1*L n3J_emif@4d000000 ti,emif-4d5emif2*M o3J_omap_dwc3@4a020000ti,dwc3 usb_otg_ssJ ]r|dwc3@4a030000 snps,dwc3J$\\]peripheralhostotgusb2-phyusb3-phy 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J#, J#,J#< ~ti,omap5430-bandgapocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4a096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrltsysclkrefclksata@4a141100snps,dwc-ahciJJ 6 sata-physatadss@58000000 ti,omap5-dssXbok dss_corefckdispc@58001000ti,omap5-dispcX  dss_dispcfckencoder@58002000ti,omap5-rfbiX  bdisabled dss_rfbi!fckickencoder@58004000 ti,omap5-dsiX@XB@XC@protophypll 5 bdisabled dss_dsi1 fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@protophypll 7 bdisabled dss_dsi2 fcksys_clkencoder@58060000ti,omap5-hdmi XXXXwppllphycore ebok dss_hdmi fcksys_clkkL audio_tx$default2 portendpoint regulator-abb-mpu ti,abb-v2Wabb_mpu 2 - J|J`J!J3base-addressint-addressefuse-addressldo-address = V n0 ,regulator-abb-mm ti,abb-v2Wabb_mm 2 - J|J`J!J3base-addressint-addressefuse-addressldo-address = V n0 fixedregulator-vmainregulator-fixedWvmainfLK@~LK@fixedregulator-vsys_cobraregulator-fixed Wvsys_cobra fLK@~LK@qqfixedregulator-vdds_1v8_mainregulator-fixedWvdds_1v8_main ufw@~w@rrfixedregulator-mmcsdregulator-fixed Wvmmcsd_fixedf-~-sssdhci0_pwrseqmmc-pwrseq-simplew ext_clockfixedregulator-mmcsdioregulator-fixedWvmmcsdio_fixedfw@~w@ x  p$default2hsusb2_phyusb-nop-xceiv f main_clk$hsusb3_phyusb-nop-xceiv encoder ti,tpd12s015$default2$portsport@0endpoint port@1endpoint connectorhdmi-connector hdmibportendpoint soundti,abe-twl6040 omap5-uevm  $   Headset StereophoneHSOLHeadset StereophoneHSORLine OutAUXLLine OutAUXRHSMICHeadset MicHeadset MicHeadset Mic BiasAFMLLine InAFMRLine Inmemory@80000000memoryleds gpio-ledsled1 omap5:blue:usr1 x heartbeat offevm_keys gpio-keys$default2btn1 BTN1 - i 8 C2evm_leds gpio-ledsled1 omap5:red:led  mmc0 offled2 omap5:green:led  mmc1 offled3 omap5:blue:led  mmc2 offled4 omap5:green:led1  heartbeat offled5 omap5:green:led2  default-on offled6 omap5:green:led3  heartbeat offled7 omap5:green:led4  default-on offled8 omap5:green:led5  heartbeat off #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0ethernetdevice_typeregoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramranges#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,index-power-of-twoti,dividersti,set-rate-parent#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-highline-namedmasdma-namesgpmc,num-csgpmc,num-waitpinsti,system-power-controllerti,mux-pad1ti,mux-pad2ti,enable-vbus-detectionti,enable-id-detectionti,wakeupid-gpiosti,backup-battery-chargeableti,backup-battery-charge-high-current#io-channel-cellsti,channel0-current-microampti,channel3-current-microampinterrupt-namesti,ldo6-vibratorsmps123-in-supplysmps45-in-supplysmps6-in-supplysmps7-in-supplysmps8-in-supplysmps9-in-supplysmps10_out2-in-supplysmps10_out1-in-supplyldo1-in-supplyldo2-in-supplyldo3-in-supplyldo4-in-supplyldo5-in-supplyldo6-in-supplyldo7-in-supplyldo8-in-supplyldo9-in-supplyldoln-in-supplyldousb-in-supplyregulator-always-onregulator-boot-onti,smps-rangestatuswakeup-sourcevio-supplyv2v1-supplyenable-active-highti,audpwron-gpio#hwlock-cellsti,spi-num-csinterrupts-extendedti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablemmc-pwrseqcap-power-off-cardref-clock-frequency#iommu-cellsti,iommu-bus-err-backreg-namesti,buffer-size#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertutmi-modeextconvbus-supplyphysphy-namesdr_modesyscon-phy-power#phy-cellsport2-modeport3-mode#thermal-sensor-cellsports-implementedvdda-supplyremote-endpointti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplystartup-delay-usreset-gpioslabelti,modelti,jack-detectionti,mclk-freqti,mcpdmti,twl6040ti,audio-routinglinux,default-triggerdefault-statelinux,codeautorepeatdebounce_interval