Π ών‘8œ(td"nvidia,p2371-0000nvidia,tegra210 +57NVIDIA Tegra210 P2371 (P2530/P2595) reference designhost1x@0,50000000"nvidia,tegra210-host1xsimple-bus=P@AACLShost1x_fhost1x+rTTdpaux@0,54040000nvidia,tegra210-dpaux=T A LΟ/ Sdpauxparent_Οfdpaux ydisabledvi@0,54080000nvidia,tegra210-vi=T AE ydisabledtsec@0,54100000nvidia,tegra210-tsec=Tdc@0,54200000nvidia,tegra210-dc=T  AILσ Sdcparent_fdc€‡dc@0,54240000nvidia,tegra210-dc=T$ AJLσ Sdcparent_fdc€‡dsi@0,54300000nvidia,tegra210-dsi=T0L0“ϋSdsilpparent_0fdsi“ΐ ydisabled+vic@0,54340000nvidia,tegra210-vic=T4 ydisablednvjpg@0,54380000nvidia,tegra210-nvjpg=T8 ydisableddsi@0,54400000nvidia,tegra210-dsi=T@LR”ϋSdsilpparent_Rfdsi“ ydisabled+nvdec@0,54480000nvidia,tegra210-nvdec=TH ydisablednvenc@0,544c0000nvidia,tegra210-nvenc=TL ydisabledtsec@0,54500000nvidia,tegra210-tsec=TP ydisabledsor@0,54540000nvidia,tegra210-sor=TT AL LΆϋ/ήSsorparentdpsafe_Άfsor ydisabledsor@0,54580000nvidia,tegra210-sor1=TX AK L·ύ/ήSsorparentdpsafe_·fsor ydisableddpaux@0,545c0000nvidia,tegra124-dpaux=T\ AŸL΅/ Sdpauxparent_΅fdpaux ydisabledisp@0,54600000nvidia,tegra210-isp=T` AG ydisabledisp@0,54680000nvidia,tegra210-isp=Th AF ydisabledi2c@0,546c0000nvidia,tegra210-i2c-vi=Tl A ydisabledinterrupt-controller@0,50041000 arm,gic-400©Ί@=PP P@ P`  A  ΟΥgpu@0,57000000 nvidia,gm20b =WXAžέstallnonstallLΈ+Sgpupwr_Έfgpu ydisabledinterrupt-controller@0,60004000nvidia,tegra210-ictlr`=`@@`A@`B@`C@`D@`E@Ί© ΟΥtimer@0,60005000+nvidia,tegra210-timernvidia,tegra20-timer=`PHA)*yzLStimerclock@0,60006000nvidia,tegra210-car=``νϊΟΥflow-controller@0,60007000nvidia,tegra210-flowctrl=`pgpio@0,6000d000>nvidia,tegra210-gpionvidia,tegra124-gpionvidia,tegra30-gpio=`Π`A !"#7WY}©Ίdma@0,60020000.nvidia,tegra210-apbdmanvidia,tegra148-apbdma=`€Ahijklmnopqrstuvw€‚ƒ„…†‡ˆ‰Š‹ŒŽL"Sdma_"fdma#ΟΥapbmisc@0,70000800/nvidia,tegra210-apbmiscnvidia,tegra20-apbmisc =pdpθdpinmux@0,700008d4nvidia,tegra210-pinmux =pΤœp0”.boot<pinmuxΟΥpex_l0_rst_n_pa0Fpex_l0_rst_n_pa0Rpe0bn~’€pex_l0_clkreq_n_pa1Fpex_l0_clkreq_n_pa1Rpe0bn~’€pex_wake_n_pa2Fpex_wake_n_pa2Rpebn~’€pex_l1_rst_n_pa3Fpex_l1_rst_n_pa3Rpe1bn~’€pex_l1_clkreq_n_pa4Fpex_l1_clkreq_n_pa4Rpe1bn~’€sata_led_active_pa5Fsata_led_active_pa5bn~’pa6Fpa6Rrsvd1bn~’dap1_fs_pb0 Fdap1_fs_pb0Ri2s1bn~’dap1_din_pb1 Fdap1_din_pb1Ri2s1bn~’dap1_dout_pb2Fdap1_dout_pb2Ri2s1bn~’dap1_sclk_pb3Fdap1_sclk_pb3Ri2s1bn~’spi2_mosi_pb4Fspi2_mosi_pb4Rrsvd2bn~’spi2_miso_pb5Fspi2_miso_pb5Rrsvd2bn~’spi2_sck_pb6 Fspi2_sck_pb6Rrsvd2bn~’spi2_cs0_pb7 Fspi2_cs0_pb7Rrsvd2bn~’spi1_mosi_pc0Fspi1_mosi_pc0Rspi1bn~’spi1_miso_pc1Fspi1_miso_pc1Rspi1bn~’spi1_sck_pc2 Fspi1_sck_pc2Rspi1bn~’spi1_cs0_pc3 Fspi1_cs0_pc3Rspi1bn~’spi1_cs1_pc4 Fspi1_cs1_pc4Rspi1bn~’spi4_sck_pc5 Fspi4_sck_pc5Rspi4bn~’spi4_cs0_pc6 Fspi4_cs0_pc6Rspi4bn~’spi4_mosi_pc7Fspi4_mosi_pc7Rspi4bn~’spi4_miso_pd0Fspi4_miso_pd0Rspi4bn~’uart3_tx_pd1 Fuart3_tx_pd1Ruartcbn~’uart3_rx_pd2 Fuart3_rx_pd2Ruartcbn~’uart3_rts_pd3Fuart3_rts_pd3Ruartcbn~’uart3_cts_pd4Fuart3_cts_pd4Ruartcbn~’dmic1_clk_pe0Fdmic1_clk_pe0Rdmic1bn~’dmic1_dat_pe1Fdmic1_dat_pe1Rdmic1bn~’dmic2_clk_pe2Fdmic2_clk_pe2Rdmic2bn~’dmic2_dat_pe3Fdmic2_dat_pe3Rdmic2bn~’dmic3_clk_pe4Fdmic3_clk_pe4bn~’dmic3_dat_pe5Fdmic3_dat_pe5Rrsvd2bn~’pe6Fpe6bn~’pe7Fpe7Rpwm3bn~’gen3_i2c_scl_pf0Fgen3_i2c_scl_pf0Ri2c3bn~’€gen3_i2c_sda_pf1Fgen3_i2c_sda_pf1Ri2c3bn~’€uart2_tx_pg0 Fuart2_tx_pg0bn~’uart2_rx_pg1 Fuart2_rx_pg1Ruartbbn~’uart2_rts_pg2Fuart2_rts_pg2Rrsvd2bn~’uart2_cts_pg3Fuart2_cts_pg3bn~’wifi_en_ph0 Fwifi_en_ph0bn~’wifi_rst_ph1 Fwifi_rst_ph1Rrsvd0bn~’wifi_wake_ap_ph2Fwifi_wake_ap_ph2bn~’ap_wake_bt_ph3Fap_wake_bt_ph3bn~’bt_rst_ph4 Fbt_rst_ph4bn~’bt_wake_ap_ph5Fbt_wake_ap_ph5bn~’ph6Fph6bn~’ap_wake_nfc_ph7Fap_wake_nfc_ph7bn~’nfc_en_pi0 Fnfc_en_pi0bn~’nfc_int_pi1 Fnfc_int_pi1bn~’gps_en_pi2 Fgps_en_pi2bn~’gps_rst_pi3 Fgps_rst_pi3bn~’uart4_tx_pi4 Fuart4_tx_pi4Ruartdbn~’uart4_rx_pi5 Fuart4_rx_pi5Ruartdbn~’uart4_rts_pi6Fuart4_rts_pi6Ruartdbn~’uart4_cts_pi7Fuart4_cts_pi7Ruartdbn~’gen1_i2c_sda_pj0Fgen1_i2c_sda_pj0Ri2c1bn~’€gen1_i2c_scl_pj1Fgen1_i2c_scl_pj1Ri2c1bn~’€gen2_i2c_scl_pj2Fgen2_i2c_scl_pj2Ri2c2bn~’€gen2_i2c_sda_pj3Fgen2_i2c_sda_pj3Ri2c2bn~’€dap4_fs_pj4 Fdap4_fs_pj4Ri2s4bbn~’dap4_din_pj5 Fdap4_din_pj5Ri2s4bbn~’dap4_dout_pj6Fdap4_dout_pj6Ri2s4bbn~’dap4_sclk_pj7Fdap4_sclk_pj7Ri2s4bbn~’pk0Fpk0Ri2s5bbn~’pk1Fpk1Ri2s5bbn~’pk2Fpk2Ri2s5bbn~’pk3Fpk3Ri2s5bbn~’pk4Fpk4bn~’pk5Fpk5bn~’pk6Fpk6bn~’pk7Fpk7bn~’pl0Fpl0bn~’pl1Fpl1Rsocbn~’sdmmc1_clk_pm0Fsdmmc1_clk_pm0Rsdmmc1bn~’sdmmc1_cmd_pm1Fsdmmc1_cmd_pm1Rsdmmc1bn~’sdmmc1_dat3_pm2Fsdmmc1_dat3_pm2Rsdmmc1bn~’sdmmc1_dat2_pm3Fsdmmc1_dat2_pm3Rsdmmc1bn~’sdmmc1_dat1_pm4Fsdmmc1_dat1_pm4Rsdmmc1bn~’sdmmc1_dat0_pm5Fsdmmc1_dat0_pm5Rsdmmc1bn~’sdmmc3_clk_pp0Fsdmmc3_clk_pp0Rsdmmc3bn~’sdmmc3_cmd_pp1Fsdmmc3_cmd_pp1Rsdmmc3bn~’sdmmc3_dat3_pp2Fsdmmc3_dat3_pp2Rsdmmc3bn~’sdmmc3_dat2_pp3Fsdmmc3_dat2_pp3Rsdmmc3bn~’sdmmc3_dat1_pp4Fsdmmc3_dat1_pp4Rsdmmc3bn~’sdmmc3_dat0_pp5Fsdmmc3_dat0_pp5Rsdmmc3bn~’cam1_mclk_ps0Fcam1_mclk_ps0 Rextperiph3bn~’cam2_mclk_ps1Fcam2_mclk_ps1 Rextperiph3bn~’cam_i2c_scl_ps2Fcam_i2c_scl_ps2Ri2cvibn~’€cam_i2c_sda_ps3Fcam_i2c_sda_ps3Ri2cvibn~’€cam_rst_ps4 Fcam_rst_ps4bn~’cam_af_en_ps5Fcam_af_en_ps5bn~’cam_flash_en_ps6Fcam_flash_en_ps6bn~’cam1_pwdn_ps7Fcam1_pwdn_ps7bn~’cam2_pwdn_pt0Fcam2_pwdn_pt0bn~’cam1_strobe_pt1Fcam1_strobe_pt1bn~’uart1_tx_pu0 Fuart1_tx_pu0Ruartabn~’uart1_rx_pu1 Fuart1_rx_pu1Ruartabn~’uart1_rts_pu2Fuart1_rts_pu2Ruartabn~’uart1_cts_pu3Fuart1_cts_pu3Ruartabn~’lcd_bl_pwm_pv0Flcd_bl_pwm_pv0Rpwm0bn~’lcd_bl_en_pv1Flcd_bl_en_pv1bn~’lcd_rst_pv2 Flcd_rst_pv2bn~’lcd_gpio1_pv3Flcd_gpio1_pv3Rrsvd1bn~’lcd_gpio2_pv4Flcd_gpio2_pv4Rpwm1bn~’ap_ready_pv5 Fap_ready_pv5bn~’touch_rst_pv6Ftouch_rst_pv6bn~’touch_clk_pv7Ftouch_clk_pv7bn~’modem_wake_ap_px0Fmodem_wake_ap_px0bn~’touch_int_px1Ftouch_int_px1bn~’motion_int_px2Fmotion_int_px2bn~’als_prox_int_px3Fals_prox_int_px3bn~’temp_alert_px4Ftemp_alert_px4bn~’button_power_on_px5Fbutton_power_on_px5bn~’button_vol_up_px6Fbutton_vol_up_px6bn~’button_vol_down_px7Fbutton_vol_down_px7bn~’button_slide_sw_py0Fbutton_slide_sw_py0Rrsvd0bn~’button_home_py1Fbutton_home_py1bn~’lcd_te_py2 Flcd_te_py2 Rdisplayabn~’pwr_i2c_scl_py3Fpwr_i2c_scl_py3Ri2cpmubn~’€pwr_i2c_sda_py4Fpwr_i2c_sda_py4Ri2cpmubn~’€clk_32k_out_py5Fclk_32k_out_py5Rsocbn~’pz0Fpz0bn~’pz1Fpz1Rsdmmc1bn~’pz2Fpz2Rrsvd2bn~’pz3Fpz3Rrsvd1bn~’pz4Fpz4bn~’pz5Fpz5Rsocbn~’dap2_fs_paa0 Fdap2_fs_paa0Ri2s2bn~’dap2_sclk_paa1Fdap2_sclk_paa1Ri2s2bn~’dap2_din_paa2Fdap2_din_paa2Ri2s2bn~’dap2_dout_paa3Fdap2_dout_paa3Ri2s2bn~’aud_mclk_pbb0Faud_mclk_pbb0Raudbn~’dvfs_pwm_pbb1Fdvfs_pwm_pbb1Rcldvfsbn~’dvfs_clk_pbb2Fdvfs_clk_pbb2bn~’gpio_x1_aud_pbb3Fgpio_x1_aud_pbb3bn~’gpio_x3_aud_pbb4Fgpio_x3_aud_pbb4Rrsvd0bn~’hdmi_cec_pcc0Fhdmi_cec_pcc0Rcecbn~’€hdmi_int_dp_hpd_pcc1Fhdmi_int_dp_hpd_pcc1bn~’€spdif_out_pcc2Fspdif_out_pcc2Rrsvd1bn~’spdif_in_pcc3Fspdif_in_pcc3Rrsvd1bn~’usb_vbus_en0_pcc4Fusb_vbus_en0_pcc4Rusbbn~’€usb_vbus_en1_pcc5Fusb_vbus_en1_pcc5Rrsvd1bn~’€dp_hpd0_pcc6 Fdp_hpd0_pcc6bn~’pcc7Fpcc7bn~’€spi2_cs1_pdd0Fspi2_cs1_pdd0Rrsvd1bn~’qspi_sck_pee0Fqspi_sck_pee0Rrsvd1bn~’qspi_cs_n_pee1Fqspi_cs_n_pee1Rrsvd1bn~’qspi_io0_pee2Fqspi_io0_pee2Rrsvd1bn~’qspi_io1_pee3Fqspi_io1_pee3Rrsvd1bn~’qspi_io2_pee4Fqspi_io2_pee4Rrsvd1bn~’qspi_io3_pee5Fqspi_io3_pee5Rrsvd1bn~’core_pwr_req Fcore_pwr_reqRcorebn~’cpu_pwr_req Fcpu_pwr_reqRcpubn~’pwr_int_n Fpwr_int_nRpmibn~’clk_32k_in Fclk_32k_inRclkbn~’jtag_rtck Fjtag_rtckRjtagbn~’clk_reqFclk_reqRsysbn~’shutdown Fshutdown Rshutdownbn~’serial@0,70006000)nvidia,tegra210-uartnvidia,tegra20-uart=p`@± A$LSserial_fserial»ΐrxtxyokayserial@0,70006040)nvidia,tegra210-uartnvidia,tegra20-uart=p`@@± A%LΰSserial_fserial»  ΐrxtx ydisabledserial@0,70006200)nvidia,tegra210-uartnvidia,tegra20-uart=pb@± A.L7Sserial_7fserial»  ΐrxtx ydisabledserial@0,70006300)nvidia,tegra210-uartnvidia,tegra20-uart=pc@± AZLASserial_Afserial»ΐrxtx ydisabledpwm@0,7000a000'nvidia,tegra210-pwmnvidia,tegra20-pwm=p ΚLSpwm_fpwm ydisabledi2c@0,7000c000(nvidia,tegra210-i2cnvidia,tegra114-i2c=pΐ A&+L Sdiv-clk_ fi2c»ΐrxtx ydisabledi2c@0,7000c400(nvidia,tegra210-i2cnvidia,tegra114-i2c=pΔ AT+L6Sdiv-clk_6fi2c»ΐrxtx ydisabledi2c@0,7000c500(nvidia,tegra210-i2cnvidia,tegra114-i2c=pΕ A\+LCSdiv-clk_Cfi2c»ΐrxtx ydisabledi2c@0,7000c700(nvidia,tegra210-i2cnvidia,tegra114-i2c=pΗ Ax+LgSdiv-clk_gfi2c»ΐrxtx ydisabledi2c@0,7000d000(nvidia,tegra210-i2cnvidia,tegra114-i2c=pΠ A5+L/Sdiv-clk_/fi2c»ΐrxtxyokayΥ€i2c@0,7000d100(nvidia,tegra210-i2cnvidia,tegra114-i2c=pΡ A?+L¦Sdiv-clk_¦fi2c»ΐrxtx ydisabledspi@0,7000d400(nvidia,tegra210-spinvidia,tegra114-spi=pΤ A;+L)Sspi_)fspi»ΐrxtx ydisabledspi@0,7000d600(nvidia,tegra210-spinvidia,tegra114-spi=pΦ AR+L,Sspi_,fspi»ΐrxtx ydisabledspi@0,7000d800(nvidia,tegra210-spinvidia,tegra114-spi=pΨ AS+L.Sspi_.fspi»ΐrxtx ydisabledspi@0,7000da00(nvidia,tegra210-spinvidia,tegra114-spi=pΪ A]+LDSspi_Dfspi»ΐrxtx ydisabledrtc@0,7000e000'nvidia,tegra210-rtcnvidia,tegra20-rtc=pΰ ALSrtcpmc@0,7000e400nvidia,tegra210-pmc=pδ L%Spclkclk32k_inεωfuse@0,7000f800nvidia,tegra210-efuse=pψLζSfuse_'ffusememory-controller@0,70019000nvidia,tegra210-mc=pL Smc AMΟΥhda@0,70030000'nvidia,tegra210-hdanvidia,tegra30-hda=p AQL}€oShdahda2hdmihda2codec_2x_}€ofhdahda2hdmihda2codec_2x ydisabledsdhci@0,700b0000,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhci ydisabledsdhci@0,700b0200,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  AL Ssdhci_ fsdhci ydisabledsdhci@0,700b0400,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALESsdhci_Efsdhci ydisabledsdhci@0,700b0600,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhciyokay(mipi@0,700e3000nvidia,tegra210-mipi=p0L8 Smipi-cal6ΟΥspi@0,70410000nvidia,tegra210-qspi=pA A +LΣSqspi_Σfqspi»ΐrxtx ydisabledusb@0,7d0000002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@ ASutmiLSusb_fusb\  ydisabledusb-phy@0,7d000000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@}@SutmiLώSregpll_uutmi-pads_fusbutmi-padsg˜­Γ Υιύ* = ydisabledΟ Υ usb@0,7d0040002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@@ ASutmiL:Susb_:fusb\  ydisabledusb-phy@0,7d004000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@@}@SutmiL:ώSregpll_uutmi-pads_:fusbutmi-padsg˜­Γ Υιύ*  ydisabledΟ Υ cpus+cpu@0[cpuarm,cortex-a57=cpu@1[cpuarm,cortex-a57=cpu@2[cpuarm,cortex-a57=cpu@3[cpuarm,cortex-a57=timerarm,armv8-timer0A    aliasesg/rtc@0,7000e000l/serial@0,70006000memory[memory=€ΐclocks simple-bus+clock@0 fixed-clock=νΥ€ΟΥ compatibleinterrupt-parent#address-cells#size-cellsmodelreginterruptsclocksclock-namesresetsreset-namesrangesstatusiommusnvidia,headnvidia,mipi-calibrate#interrupt-cellsinterrupt-controllerlinux,phandleinterrupt-names#clock-cells#reset-cells#gpio-cellsgpio-controller#dma-cellspinctrl-namespinctrl-0nvidia,pinsnvidia,functionnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-hvreg-shiftdmasdma-names#pwm-cellsclock-frequency#power-domain-cellsnvidia,invert-interrupt#iommu-cellsbus-widthnon-removable#nvidia,mipi-calibrate-cellsphy_typenvidia,phynvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,xcvr-hsslewnvidia,has-utmi-pad-registersdevice_typertc1serial0