Ð þí Þ8(ÚœÌ"nvidia,p2371-0000nvidia,tegra210 +57NVIDIA Tegra210 P2371 (P2530/P2595) reference designhost1x@50000000"nvidia,tegra210-host1xsimple-bus=P@AACLShost1x_fhost1x+rTTdpaux@54040000nvidia,tegra210-dpaux=T A LÏ/ Sdpauxparent_Ïfdpaux ydisabledpinmux-aux €dpaux-io‡aux–pinmux-i2c €dpaux-io‡i2c – pinmux-off €dpaux-io‡off – i2c-bus+vi@54080000nvidia,tegra210-vi=T AE ydisabledtsec@54100000nvidia,tegra210-tsec=Tdc@54200000nvidia,tegra210-dc=T  AILó Sdcparent_fdcž¥dc@54240000nvidia,tegra210-dc=T$ AJLó Sdcparent_fdcž¥dsi@54300000nvidia,tegra210-dsi=T0L0“ûSdsilpparent_0fdsi±À ydisabled+vic@54340000nvidia,tegra210-vic=T4 ydisablednvjpg@54380000nvidia,tegra210-nvjpg=T8 ydisableddsi@54400000nvidia,tegra210-dsi=T@LR”ûSdsilpparent_Rfdsi± ydisabled+nvdec@54480000nvidia,tegra210-nvdec=TH ydisablednvenc@544c0000nvidia,tegra210-nvenc=TL ydisabledtsec@54500000nvidia,tegra210-tsec=TP ydisabledsor@54540000nvidia,tegra210-sor=TT AL L¶û/ÞSsorparentdpsafe_¶fsorÇÑÛ åauxi2coff ydisabledsor@54580000nvidia,tegra210-sor1=TX AK(L·ý/ÞSsorsourceparentdpsafe_·fsorÇÑ Û  åauxi2coff ydisableddpaux@545c0000nvidia,tegra124-dpaux=T\ AŸLµ/ Sdpauxparent_µfdpaux ydisabledpinmux-aux €dpaux-io‡aux–pinmux-i2c €dpaux-io‡i2c–pinmux-off €dpaux-io‡off–i2c-bus+isp@54600000nvidia,tegra210-isp=T` AG ydisabledisp@54680000nvidia,tegra210-isp=Th AF ydisabledi2c@546c0000nvidia,tegra210-i2c-vi=Tl A ydisabledinterrupt-controller@50041000 arm,gic-400ó@=PP P@ P`  A   – gpu@57000000 nvidia,gm20b =WXAžstallnonstallL¸+½ Sgpupwrref_¸fgpuž ydisabledinterrupt-controller@60004000nvidia,tegra210-ictlr`=`@@`A@`B@`C@`D@`E@ó –timer@60005000+nvidia,tegra210-timernvidia,tegra20-timer=`PHA)*yzLStimerclock@60006000nvidia,tegra210-car=``)6–flow-controller@60007000nvidia,tegra210-flowctrl=`pgpio@6000d000>nvidia,tegra210-gpionvidia,tegra124-gpionvidia,tegra30-gpio=`Ð`A !"#7WY}COódma@60020000.nvidia,tegra210-apbdmanvidia,tegra148-apbdma=`€Ahijklmnopqrstuvw€‚ƒ„…†‡ˆ‰Š‹ŒŽL"Sdma_"fdma_ – apbmisc@70000800/nvidia,tegra210-apbmiscnvidia,tegra20-apbmisc =pdpèdpinmux@700008d4nvidia,tegra210-pinmux =pÔœp0”åbootÇ pinmux – pex_l0_rst_n_pa0jpex_l0_rst_n_pa0vpe0†’¢¶Èpex_l0_clkreq_n_pa1jpex_l0_clkreq_n_pa1vpe0†’¢¶Èpex_wake_n_pa2jpex_wake_n_pa2vpe†’¢¶Èpex_l1_rst_n_pa3jpex_l1_rst_n_pa3vpe1†’¢¶Èpex_l1_clkreq_n_pa4jpex_l1_clkreq_n_pa4vpe1†’¢¶Èsata_led_active_pa5jsata_led_active_pa5†’¢¶pa6jpa6vrsvd1†’¢¶dap1_fs_pb0 jdap1_fs_pb0vi2s1†’¢¶dap1_din_pb1 jdap1_din_pb1vi2s1†’¢¶dap1_dout_pb2jdap1_dout_pb2vi2s1†’¢¶dap1_sclk_pb3jdap1_sclk_pb3vi2s1†’¢¶spi2_mosi_pb4jspi2_mosi_pb4vrsvd2†’¢¶spi2_miso_pb5jspi2_miso_pb5vrsvd2†’¢¶spi2_sck_pb6 jspi2_sck_pb6vrsvd2†’¢¶spi2_cs0_pb7 jspi2_cs0_pb7vrsvd2†’¢¶spi1_mosi_pc0jspi1_mosi_pc0vspi1†’¢¶spi1_miso_pc1jspi1_miso_pc1vspi1†’¢¶spi1_sck_pc2 jspi1_sck_pc2vspi1†’¢¶spi1_cs0_pc3 jspi1_cs0_pc3vspi1†’¢¶spi1_cs1_pc4 jspi1_cs1_pc4vspi1†’¢¶spi4_sck_pc5 jspi4_sck_pc5vspi4†’¢¶spi4_cs0_pc6 jspi4_cs0_pc6vspi4†’¢¶spi4_mosi_pc7jspi4_mosi_pc7vspi4†’¢¶spi4_miso_pd0jspi4_miso_pd0vspi4†’¢¶uart3_tx_pd1 juart3_tx_pd1vuartc†’¢¶uart3_rx_pd2 juart3_rx_pd2vuartc†’¢¶uart3_rts_pd3juart3_rts_pd3vuartc†’¢¶uart3_cts_pd4juart3_cts_pd4vuartc†’¢¶dmic1_clk_pe0jdmic1_clk_pe0vdmic1†’¢¶dmic1_dat_pe1jdmic1_dat_pe1vdmic1†’¢¶dmic2_clk_pe2jdmic2_clk_pe2vdmic2†’¢¶dmic2_dat_pe3jdmic2_dat_pe3vdmic2†’¢¶dmic3_clk_pe4jdmic3_clk_pe4†’¢¶dmic3_dat_pe5jdmic3_dat_pe5vrsvd2†’¢¶pe6jpe6†’¢¶pe7jpe7vpwm3†’¢¶gen3_i2c_scl_pf0jgen3_i2c_scl_pf0vi2c3†’¢¶Ègen3_i2c_sda_pf1jgen3_i2c_sda_pf1vi2c3†’¢¶Èuart2_tx_pg0 juart2_tx_pg0†’¢¶uart2_rx_pg1 juart2_rx_pg1vuartb†’¢¶uart2_rts_pg2juart2_rts_pg2vrsvd2†’¢¶uart2_cts_pg3juart2_cts_pg3†’¢¶wifi_en_ph0 jwifi_en_ph0†’¢¶wifi_rst_ph1 jwifi_rst_ph1vrsvd0†’¢¶wifi_wake_ap_ph2jwifi_wake_ap_ph2†’¢¶ap_wake_bt_ph3jap_wake_bt_ph3†’¢¶bt_rst_ph4 jbt_rst_ph4†’¢¶bt_wake_ap_ph5jbt_wake_ap_ph5†’¢¶ph6jph6†’¢¶ap_wake_nfc_ph7jap_wake_nfc_ph7†’¢¶nfc_en_pi0 jnfc_en_pi0†’¢¶nfc_int_pi1 jnfc_int_pi1†’¢¶gps_en_pi2 jgps_en_pi2†’¢¶gps_rst_pi3 jgps_rst_pi3†’¢¶uart4_tx_pi4 juart4_tx_pi4vuartd†’¢¶uart4_rx_pi5 juart4_rx_pi5vuartd†’¢¶uart4_rts_pi6juart4_rts_pi6vuartd†’¢¶uart4_cts_pi7juart4_cts_pi7vuartd†’¢¶gen1_i2c_sda_pj0jgen1_i2c_sda_pj0vi2c1†’¢¶Ègen1_i2c_scl_pj1jgen1_i2c_scl_pj1vi2c1†’¢¶Ègen2_i2c_scl_pj2jgen2_i2c_scl_pj2vi2c2†’¢¶Ègen2_i2c_sda_pj3jgen2_i2c_sda_pj3vi2c2†’¢¶Èdap4_fs_pj4 jdap4_fs_pj4vi2s4b†’¢¶dap4_din_pj5 jdap4_din_pj5vi2s4b†’¢¶dap4_dout_pj6jdap4_dout_pj6vi2s4b†’¢¶dap4_sclk_pj7jdap4_sclk_pj7vi2s4b†’¢¶pk0jpk0vi2s5b†’¢¶pk1jpk1vi2s5b†’¢¶pk2jpk2vi2s5b†’¢¶pk3jpk3vi2s5b†’¢¶pk4jpk4†’¢¶pk5jpk5†’¢¶pk6jpk6†’¢¶pk7jpk7†’¢¶pl0jpl0†’¢¶pl1jpl1vsoc†’¢¶sdmmc1_clk_pm0jsdmmc1_clk_pm0vsdmmc1†’¢¶sdmmc1_cmd_pm1jsdmmc1_cmd_pm1vsdmmc1†’¢¶sdmmc1_dat3_pm2jsdmmc1_dat3_pm2vsdmmc1†’¢¶sdmmc1_dat2_pm3jsdmmc1_dat2_pm3vsdmmc1†’¢¶sdmmc1_dat1_pm4jsdmmc1_dat1_pm4vsdmmc1†’¢¶sdmmc1_dat0_pm5jsdmmc1_dat0_pm5vsdmmc1†’¢¶sdmmc3_clk_pp0jsdmmc3_clk_pp0vsdmmc3†’¢¶sdmmc3_cmd_pp1jsdmmc3_cmd_pp1vsdmmc3†’¢¶sdmmc3_dat3_pp2jsdmmc3_dat3_pp2vsdmmc3†’¢¶sdmmc3_dat2_pp3jsdmmc3_dat2_pp3vsdmmc3†’¢¶sdmmc3_dat1_pp4jsdmmc3_dat1_pp4vsdmmc3†’¢¶sdmmc3_dat0_pp5jsdmmc3_dat0_pp5vsdmmc3†’¢¶cam1_mclk_ps0jcam1_mclk_ps0 vextperiph3†’¢¶cam2_mclk_ps1jcam2_mclk_ps1 vextperiph3†’¢¶cam_i2c_scl_ps2jcam_i2c_scl_ps2vi2cvi†’¢¶Ècam_i2c_sda_ps3jcam_i2c_sda_ps3vi2cvi†’¢¶Ècam_rst_ps4 jcam_rst_ps4†’¢¶cam_af_en_ps5jcam_af_en_ps5†’¢¶cam_flash_en_ps6jcam_flash_en_ps6†’¢¶cam1_pwdn_ps7jcam1_pwdn_ps7†’¢¶cam2_pwdn_pt0jcam2_pwdn_pt0†’¢¶cam1_strobe_pt1jcam1_strobe_pt1†’¢¶uart1_tx_pu0 juart1_tx_pu0vuarta†’¢¶uart1_rx_pu1 juart1_rx_pu1vuarta†’¢¶uart1_rts_pu2juart1_rts_pu2vuarta†’¢¶uart1_cts_pu3juart1_cts_pu3vuarta†’¢¶lcd_bl_pwm_pv0jlcd_bl_pwm_pv0vpwm0†’¢¶lcd_bl_en_pv1jlcd_bl_en_pv1†’¢¶lcd_rst_pv2 jlcd_rst_pv2†’¢¶lcd_gpio1_pv3jlcd_gpio1_pv3vrsvd1†’¢¶lcd_gpio2_pv4jlcd_gpio2_pv4vpwm1†’¢¶ap_ready_pv5 jap_ready_pv5†’¢¶touch_rst_pv6jtouch_rst_pv6†’¢¶touch_clk_pv7jtouch_clk_pv7†’¢¶modem_wake_ap_px0jmodem_wake_ap_px0†’¢¶touch_int_px1jtouch_int_px1†’¢¶motion_int_px2jmotion_int_px2†’¢¶als_prox_int_px3jals_prox_int_px3†’¢¶temp_alert_px4jtemp_alert_px4†’¢¶button_power_on_px5jbutton_power_on_px5†’¢¶button_vol_up_px6jbutton_vol_up_px6†’¢¶button_vol_down_px7jbutton_vol_down_px7†’¢¶button_slide_sw_py0jbutton_slide_sw_py0vrsvd0†’¢¶button_home_py1jbutton_home_py1†’¢¶lcd_te_py2 jlcd_te_py2 vdisplaya†’¢¶pwr_i2c_scl_py3jpwr_i2c_scl_py3vi2cpmu†’¢¶Èpwr_i2c_sda_py4jpwr_i2c_sda_py4vi2cpmu†’¢¶Èclk_32k_out_py5jclk_32k_out_py5vsoc†’¢¶pz0jpz0†’¢¶pz1jpz1vsdmmc1†’¢¶pz2jpz2vrsvd2†’¢¶pz3jpz3vrsvd1†’¢¶pz4jpz4†’¢¶pz5jpz5vsoc†’¢¶dap2_fs_paa0 jdap2_fs_paa0vi2s2†’¢¶dap2_sclk_paa1jdap2_sclk_paa1vi2s2†’¢¶dap2_din_paa2jdap2_din_paa2vi2s2†’¢¶dap2_dout_paa3jdap2_dout_paa3vi2s2†’¢¶aud_mclk_pbb0jaud_mclk_pbb0vaud†’¢¶dvfs_pwm_pbb1jdvfs_pwm_pbb1vcldvfs†’¢¶dvfs_clk_pbb2jdvfs_clk_pbb2†’¢¶gpio_x1_aud_pbb3jgpio_x1_aud_pbb3†’¢¶gpio_x3_aud_pbb4jgpio_x3_aud_pbb4vrsvd0†’¢¶hdmi_cec_pcc0jhdmi_cec_pcc0vcec†’¢¶Èhdmi_int_dp_hpd_pcc1jhdmi_int_dp_hpd_pcc1†’¢¶Èspdif_out_pcc2jspdif_out_pcc2vrsvd1†’¢¶spdif_in_pcc3jspdif_in_pcc3vrsvd1†’¢¶usb_vbus_en0_pcc4jusb_vbus_en0_pcc4vusb†’¢¶Èusb_vbus_en1_pcc5jusb_vbus_en1_pcc5vrsvd1†’¢¶Èdp_hpd0_pcc6 jdp_hpd0_pcc6†’¢¶pcc7jpcc7†’¢¶Èspi2_cs1_pdd0jspi2_cs1_pdd0vrsvd1†’¢¶qspi_sck_pee0jqspi_sck_pee0vrsvd1†’¢¶qspi_cs_n_pee1jqspi_cs_n_pee1vrsvd1†’¢¶qspi_io0_pee2jqspi_io0_pee2vrsvd1†’¢¶qspi_io1_pee3jqspi_io1_pee3vrsvd1†’¢¶qspi_io2_pee4jqspi_io2_pee4vrsvd1†’¢¶qspi_io3_pee5jqspi_io3_pee5vrsvd1†’¢¶core_pwr_req jcore_pwr_reqvcore†’¢¶cpu_pwr_req jcpu_pwr_reqvcpu†’¢¶pwr_int_n jpwr_int_nvpmi†’¢¶clk_32k_in jclk_32k_invclk†’¢¶jtag_rtck jjtag_rtckvjtag†’¢¶clk_reqjclk_reqvsys†’¢¶shutdown jshutdown vshutdown†’¢¶serial@70006000)nvidia,tegra210-uartnvidia,tegra20-uart=p`@Õ A$LSserial_fserialß  ärxtxyokayserial@70006040)nvidia,tegra210-uartnvidia,tegra20-uart=p`@@Õ A%LàSserial_fserialß ärxtx ydisabledserial@70006200)nvidia,tegra210-uartnvidia,tegra20-uart=pb@Õ A.L7Sserial_7fserialß ärxtx ydisabledserial@70006300)nvidia,tegra210-uartnvidia,tegra20-uart=pc@Õ AZLASserial_Afserialß  ärxtx ydisabledpwm@7000a000'nvidia,tegra210-pwmnvidia,tegra20-pwm=p îLSpwm_fpwm ydisabledi2c@7000c000(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÀ A&+L Sdiv-clk_ fi2cß  ärxtx ydisabledi2c@7000c400(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÄ AT+L6Sdiv-clk_6fi2cß  ärxtx ydisabledi2c@7000c500(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÅ A\+LCSdiv-clk_Cfi2cß  ärxtx ydisabledi2c@7000c700(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÇ Ax+LgSdiv-clk_gfi2cß  ärxtxÇ Ñ  ådefaultidle ydisabledi2c@7000d000(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÐ A5+L/Sdiv-clk_/fi2cß  ärxtxyokayù€i2c@7000d100(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÑ A?+L¦Sdiv-clk_¦fi2cß  ärxtxÇÑ ådefaultidle ydisabledspi@7000d400(nvidia,tegra210-spinvidia,tegra114-spi=pÔ A;+L)Sspi_)fspiß  ärxtx ydisabledspi@7000d600(nvidia,tegra210-spinvidia,tegra114-spi=pÖ AR+L,Sspi_,fspiß  ärxtx ydisabledspi@7000d800(nvidia,tegra210-spinvidia,tegra114-spi=pØ AS+L.Sspi_.fspiß  ärxtx ydisabledspi@7000da00(nvidia,tegra210-spinvidia,tegra114-spi=pÚ A]+LDSspi_Dfspiß  ärxtx ydisabledrtc@7000e000'nvidia,tegra210-rtcnvidia,tegra20-rtc=pà ALSrtcpmc@7000e400nvidia,tegra210-pmc=pä L%Spclkclk32k_in powergatesaudLÆk_Æ!–xusbaLœSxusb-ss_œfxusb-ss!xusbbL! Sxusb-dev__ fxusb-dev!xusbcLY Sxusb-host_Y fxusb-host!fuse@7000f800nvidia,tegra210-efuse=pøLæSfuse_'ffusememory-controller@70019000nvidia,tegra210-mc=pL Smc AM5–hda@70030000'nvidia,tegra210-hdanvidia,tegra30-hda=p AQL}€oShdahda2hdmihda2codec_2x_}€ofhdahda2hdmihda2codec_2x ydisabledusb@70090000nvidia,tegra210-xusb0=p €p €p BhcdfpciipfsA'(XLYœj"ÿéxSxusb_hostxusb_host_srcxusb_falcon_srcxusb_ssxusb_ss_div2xusb_ss_srcxusb_hs_srcxusb_fs_srcpll_u_480mclk_mpll_e_Yœfxusb_hostxusb_ssxusb_srcL ydisabledpadctl@7009f000nvidia,tegra210-xusb-padctl=p ð_Žfpadctl ydisabled–padsusb2LÒStrk ydisabledlanesusb2-0 ydisabled_usb2-1 ydisabled_usb2-2 ydisabled_usb2-3 ydisabled_hsicLÑStrk ydisabledlaneshsic-0 ydisabled_hsic-1 ydisabled_pcieLSpll_Ífphy ydisabledlanespcie-0 ydisabled_pcie-1 ydisabled_pcie-2 ydisabled_pcie-3 ydisabled_pcie-4 ydisabled_pcie-5 ydisabled_pcie-6 ydisabled_sataLSpll_Ìfphy ydisabledlanessata-0 ydisabled_portsusb2-0 ydisabledusb2-1 ydisabledusb2-2 ydisabledusb2-3 ydisabledhsic-0 ydisabledusb3-0 ydisabledusb3-1 ydisabledusb3-2 ydisabledusb3-3 ydisabledsdhci@700b0000,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhci ydisabledsdhci@700b0200,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  AL Ssdhci_ fsdhci ydisabledsdhci@700b0400,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALESsdhci_Efsdhci ydisabledsdhci@700b0600,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhciyokayjtmipi@700e3000nvidia,tegra210-mipi=p0L8 Smipi-cal‚–aconnect@702c0000nvidia,tegra210-aconnectLÆk Sapeapb2apeŸ+rp,p, ydisabledspi@70410000nvidia,tegra210-qspi=pA A +LÓSqspi_Ófqspiß  ärxtx ydisabledusb@7d0000002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@ A­utmiLSusb_fusb¶ ydisabledusb-phy@7d000000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@}@­utmiLþSregpll_uutmi-pads_fusbutmi-padsÁÛò /CWn„ — ydisabled–usb@7d0040002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@@ A­utmiL:Susb_:fusb¶ ydisabledusb-phy@7d004000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@@}@­utmiL:þSregpll_uutmi-pads_:fusbutmi-padsÁÛò /CWn„  ydisabled–cpus+cpu@0µcpuarm,cortex-a57=cpu@1µcpuarm,cortex-a57=cpu@2µcpuarm,cortex-a57=cpu@3µcpuarm,cortex-a57=timerarm,armv8-timer0A    aliasesÁ/rtc@7000e000Æ/serial@70006000chosenÎserial0:115200n8memoryµmemory=€Àclocks simple-bus+clock@0 fixed-clock=)ù€– compatibleinterrupt-parent#address-cells#size-cellsmodelreginterruptsclocksclock-namesresetsreset-namesrangesstatusgroupsfunctionlinux,phandleiommusnvidia,headnvidia,mipi-calibratepinctrl-0pinctrl-1pinctrl-2pinctrl-names#interrupt-cellsinterrupt-controllerinterrupt-names#clock-cells#reset-cells#gpio-cellsgpio-controller#dma-cellsnvidia,pinsnvidia,functionnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-hvreg-shiftdmasdma-names#pwm-cellsclock-frequencynvidia,invert-interrupt#power-domain-cells#iommu-cellsreg-namesnvidia,xusb-padctl#phy-cellsbus-widthnon-removable#nvidia,mipi-calibrate-cellspower-domainsphy_typenvidia,phynvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,xcvr-hsslewnvidia,has-utmi-pad-registersdevice_typertc1serial0stdout-path