4l3_main_1l3_main_2 DE E l4@4a000000ti,dra7-l4-cfgsimple-bus >J"scm@2000ti,dra7-scm-coresimple-bus  > scm_conf@0sysconsimple-bus >&,pbias_regulatorti,pbias-dra7ti,pbias-omapYpbias_mmc_omap5`pbias_mmc_omap5ow@-&,clocksdss_deshdcp_clkti,gate-clockXehrpwm0_tbclkti,gate-clockXehrpwm1_tbclkti,gate-clockXehrpwm2_tbclkti,gate-clockXsys_32k_ck ti,mux-clock&G,Gpinmux@1400ti,dra7-padconfpinctrl-singleh ?&,leds_pins_default &,i2c1_pins_default&,pinmux_hdmi_pins &,i2c3_pins_default  &,uart3_pins_default  &,mmc1_pins_default8lTX\`dh&,mmc2_pins_defaultP&,cpsw_pins_defaultPTX\`dhlptx|&,cpsw_pins_sleepPTX\`dhlptx|&,davinci_mdio_pins_default<@&,davinci_mdio_pins_sleep<@&,tps659038_pins_default&,tmp102_pins_default&,mcp79410_pins_default$&,pinmux_usb1_pins &,pinmux_tpd12s015_pinsp&,clkout2_pins_default &,clkout2_pins_sleep&,mcasp3_pins_default $(,0&,mcasp3_pins_sleep $(,0&,scm_conf@1c04syscon scm_conf@1c24syscon$$&,cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ckti,dra7-atl-clock &:,:atl_clkin1_ckti,dra7-atl-clock &9,9atl_clkin2_ckti,dra7-atl-clock &8,8atl_clkin3_ckti,dra7-atl-clock &7,7hdmi_clkin_ck fixed-clock&(,(mlb_clkin_ck fixed-clock&,mlbp_clkin_ck fixed-clock&,pciesref_acs_clk_ck fixed-clock&Q,Qref_clkin0_ck fixed-clock&<,<ref_clkin1_ck fixed-clock&=,=ref_clkin2_ck fixed-clock&>,>ref_clkin3_ck fixed-clock&?,?rmii_clk_ck fixed-clocksdvenc_clkin_ck fixed-clocksecure_32k_clk_src_ck fixed-clock&,sys_clk32_crystal_ck fixed-clock&,sys_clk32_pseudo_ckfixed-factor-clock *b&,virt_12000000_ck fixed-clock&u,uvirt_13000000_ck fixed-clock]@virt_16800000_ck fixed-clockY&w,wvirt_19200000_ck fixed-clock$&x,xvirt_20000000_ck fixed-clock1-&v,vvirt_26000000_ck fixed-clock&y,yvirt_27000000_ck fixed-clock&z,zvirt_38400000_ck fixed-clockI&{,{sys_clkin2 fixed-clockX&;,;usb_otg_clkin_ck fixed-clock&,video1_clkin_ck fixed-clock&1,1video1_m2_clkin_ck fixed-clock&','video2_clkin_ck fixed-clock&2,2video2_m2_clkin_ck fixed-clock&&,&dpll_abe_ckti,omap4-dpll-m4xen-clock & , dpll_abe_x2_ckti,omap4-dpll-x2-clock &,dpll_abe_m2x2_ckti,divider-clock4?Qh&,abe_clkti,divider-clock4&},}dpll_abe_m2_ckti,divider-clock 4?Qh&f,fdpll_abe_m3x2_ckti,divider-clock4?Qh&,dpll_core_byp_mux ti,mux-clock ,&,dpll_core_ckti,omap4-dpll-core-clock  $,(&,dpll_core_x2_ckti,omap4-dpll-x2-clock&,dpll_core_h12x2_ckti,divider-clock4??<Qh&,mpu_dpll_hs_clk_divfixed-factor-clock*&,dpll_mpu_ckti,omap5-mpu-dpll-clock `dlh&,dpll_mpu_m2_ckti,divider-clock4?pQh&,mpu_dclk_divfixed-factor-clock*&,dsp_dpll_hs_clk_divfixed-factor-clock*&,dpll_dsp_byp_mux ti,mux-clock @&,dpll_dsp_ckti,omap4-dpll-clock 48@<&,dpll_dsp_m2_ckti,divider-clock4?DQh&,iva_dpll_hs_clk_divfixed-factor-clock*&,dpll_iva_byp_mux ti,mux-clock &,dpll_iva_ckti,omap4-dpll-clock &,dpll_iva_m2_ckti,divider-clock4?Qh&,iva_dclkfixed-factor-clock*&,dpll_gpu_byp_mux ti,mux-clock &,dpll_gpu_ckti,omap4-dpll-clock & , dpll_gpu_m2_ckti,divider-clock 4?Qh&k,kdpll_core_m2_ckti,divider-clock4?0Qh&!,!core_dpll_out_dclk_divfixed-factor-clock!*&,dpll_ddr_byp_mux ti,mux-clock &","dpll_ddr_ckti,omap4-dpll-clock "&#,#dpll_ddr_m2_ckti,divider-clock#4? Qh&,dpll_gmac_byp_mux ti,mux-clock &$,$dpll_gmac_ckti,omap4-dpll-clock $&%,%dpll_gmac_m2_ckti,divider-clock%4?Qh&h,hvideo2_dclk_divfixed-factor-clock&*&,video1_dclk_divfixed-factor-clock'*&,hdmi_dclk_divfixed-factor-clock(*&,per_dpll_hs_clk_divfixed-factor-clock*&U,Uusb_dpll_hs_clk_divfixed-factor-clock*&Y,Yeve_dpll_hs_clk_divfixed-factor-clock*&),)dpll_eve_byp_mux ti,mux-clock )&*,*dpll_eve_ckti,omap4-dpll-clock *&+,+dpll_eve_m2_ckti,divider-clock+4?Qh&,,,eve_dclk_divfixed-factor-clock,*&,dpll_core_h13x2_ckti,divider-clock4??@Qhdpll_core_h14x2_ckti,divider-clock4??DQh&i,idpll_core_h22x2_ckti,divider-clock4??TQh&3,3dpll_core_h23x2_ckti,divider-clock4??XQh&t,tdpll_core_h24x2_ckti,divider-clock4??\Qhdpll_ddr_x2_ckti,omap4-dpll-x2-clock#&-,-dpll_ddr_h11x2_ckti,divider-clock-4??(Qhdpll_dsp_x2_ckti,omap4-dpll-x2-clock&.,.dpll_dsp_m3x2_ckti,divider-clock.4?HQh&,dpll_gmac_x2_ckti,omap4-dpll-x2-clock%&/,/dpll_gmac_h11x2_ckti,divider-clock/4??Qh&0,0dpll_gmac_h12x2_ckti,divider-clock/4??Qhdpll_gmac_h13x2_ckti,divider-clock/4??Qhdpll_gmac_m3x2_ckti,divider-clock/4?Qhgmii_m_clk_divfixed-factor-clock0*hdmi_clk2_divfixed-factor-clock(*&E,Ehdmi_div_clkfixed-factor-clock(*&K,Kl3_iclk_divti,divider-clock4&,l4_root_clk_divfixed-factor-clock*&,video1_clk2_divfixed-factor-clock1*&C,Cvideo1_div_clkfixed-factor-clock1*&I,Ivideo2_clk2_divfixed-factor-clock2*&D,Dvideo2_div_clkfixed-factor-clock2*&J,Jipu1_gfclk_mux ti,mux-clock3 mcasp1_ahclkr_mux ti,mux-clock8456789:;<=>?@APmcasp1_ahclkx_mux ti,mux-clock8456789:;<=>?@APmcasp1_aux_gfclk_mux ti,mux-clockBCDEPtimer5_gfclk_mux ti,mux-clock0FG;<=>?HIJKLXtimer6_gfclk_mux ti,mux-clock0FG;<=>?HIJKL`timer7_gfclk_mux ti,mux-clock0FG;<=>?HIJKLhtimer8_gfclk_mux ti,mux-clock0FG;<=>?HIJKLpuart6_gfclk_mux ti,mux-clockMNdummy_ck fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ckti,omap4-dpll-clock  &O,Odpll_pcie_ref_m2ldo_ckti,divider-clockO4?Qh&P,Papll_pcie_in_clk_mux@4ae06118 ti,mux-clockPQ&R,Rapll_pcie_ckti,dra7-apll-clockRO &S,Soptfclk_pciephy1_32khz@4a0093b0ti,gate-clockG&,optfclk_pciephy2_32khz@4a0093b8ti,gate-clockG&,optfclk_pciephy_div@4a00821cti,divider-clockS4&T,Toptfclk_pciephy1_clk@4a0093b0ti,gate-clockS &,optfclk_pciephy2_clk@4a0093b8ti,gate-clockS &,optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockT &,optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockT &,apll_pcie_clkvcoldofixed-factor-clockS*apll_pcie_clkvcoldo_divfixed-factor-clockS*apll_pcie_m2_ckfixed-factor-clockS*&,dpll_per_byp_mux ti,mux-clock UL&V,Vdpll_per_ckti,omap4-dpll-clock V@DLH&W,Wdpll_per_m2_ckti,divider-clockW4?PQh&X,Xfunc_96m_aon_dclk_divfixed-factor-clockX*&,dpll_usb_byp_mux ti,mux-clock Y&Z,Zdpll_usb_ckti,omap4-dpll-j-type-clock Z&[,[dpll_usb_m2_ckti,divider-clock[4?Qh&^,^dpll_pcie_ref_m2_ckti,divider-clockO4?Qh&,dpll_per_x2_ckti,omap4-dpll-x2-clockW&\,\dpll_per_h11x2_ckti,divider-clock\4??XQh&],]dpll_per_h12x2_ckti,divider-clock\4??\Qh&a,adpll_per_h13x2_ckti,divider-clock\4??`Qh&r,rdpll_per_h14x2_ckti,divider-clock\4??dQh&j,jdpll_per_m2x2_ckti,divider-clock\4?PQh&N,Ndpll_usb_clkdcoldofixed-factor-clock[*&`,`func_128m_clkfixed-factor-clock]*&m,mfunc_12m_fclkfixed-factor-clockN*func_24m_clkfixed-factor-clockX*&6,6func_48m_fclkfixed-factor-clockN*&M,Mfunc_96m_fclkfixed-factor-clockN*l3init_60m_fclkti,divider-clock^clkout2_clkti,gate-clock_&,l3init_960m_gfclkti,gate-clock`&e,edss_32khz_clkti,gate-clockG  dss_48mhz_clkti,gate-clockM  &,dss_dss_clkti,gate-clocka &,dss_hdmi_clkti,gate-clockb  &,dss_video1_clkti,gate-clockc  &,dss_video2_clkti,gate-clockd  &,gpio2_dbclkti,gate-clockG`gpio3_dbclkti,gate-clockGhgpio4_dbclkti,gate-clockGpgpio5_dbclkti,gate-clockGxgpio6_dbclkti,gate-clockGgpio7_dbclkti,gate-clockGgpio8_dbclkti,gate-clockGmmc1_clk32kti,gate-clockG(mmc2_clk32kti,gate-clockG0mmc3_clk32kti,gate-clockG mmc4_clk32kti,gate-clockG(sata_ref_clkti,gate-clock &,usb_otg_ss1_refclk960mti,gate-clocke&,usb_otg_ss2_refclk960mti,gate-clocke@&,usb_phy1_always_on_clk32kti,gate-clockG@&,usb_phy2_always_on_clk32kti,gate-clockG&,usb_phy3_always_on_clk32kti,gate-clockG&,atl_dpll_clk_mux ti,mux-clockG12( &g,gatl_gfclk_mux ti,mux-clock fg & , gmac_gmii_ref_clk_divti,divider-clockh&,gmac_rft_clk_mux ti,mux-clock12f(gpu_core_gclk_mux ti,mux-clock ijk gpu_hyd_gclk_mux ti,mux-clock ijk l3instr_ts_gclk_divti,divider-clocklP  mcasp2_ahclkr_mux ti,mux-clock8456789:;<=>?@A`mcasp2_ahclkx_mux ti,mux-clock8456789:;<=>?@A`mcasp2_aux_gfclk_mux ti,mux-clockBCDE`mcasp3_ahclkx_mux ti,mux-clock8456789:;<=>?@Ah&,mcasp3_aux_gfclk_mux ti,mux-clockBCDEh&,mcasp4_ahclkx_mux ti,mux-clock8456789:;<=>?@Amcasp4_aux_gfclk_mux ti,mux-clockBCDEmcasp5_ahclkx_mux ti,mux-clock8456789:;<=>?@Axmcasp5_aux_gfclk_mux ti,mux-clockBCDExmcasp6_ahclkx_mux ti,mux-clock8456789:;<=>?@Amcasp6_aux_gfclk_mux ti,mux-clockBCDEmcasp7_ahclkx_mux ti,mux-clock8456789:;<=>?@Amcasp7_aux_gfclk_mux ti,mux-clockBCDEmcasp8_ahclk_mux ti,mux-clock8456789:;<=>?@Amcasp8_aux_gfclk_mux ti,mux-clockBCDEmmc1_fclk_mux ti,mux-clockmN(&n,nmmc1_fclk_divti,divider-clockn4(mmc2_fclk_mux ti,mux-clockmN0&o,ommc2_fclk_divti,divider-clocko40mmc3_gfclk_mux ti,mux-clockMN &p,pmmc3_gfclk_divti,divider-clockp4 mmc4_gfclk_mux ti,mux-clockMN(&q,qmmc4_gfclk_divti,divider-clockq4(qspi_gfclk_mux ti,mux-clockmr8&s,sqspi_gfclk_divti,divider-clocks48&,timer10_gfclk_mux ti,mux-clock,FG;<=>?HIJK(timer11_gfclk_mux ti,mux-clock,FG;<=>?HIJK0timer13_gfclk_mux ti,mux-clock,FG;<=>?HIJKtimer14_gfclk_mux ti,mux-clock,FG;<=>?HIJKtimer15_gfclk_mux ti,mux-clock,FG;<=>?HIJKtimer16_gfclk_mux ti,mux-clock,FG;<=>?HIJK0timer2_gfclk_mux ti,mux-clock,FG;<=>?HIJK8timer3_gfclk_mux ti,mux-clock,FG;<=>?HIJK@timer4_gfclk_mux ti,mux-clock,FG;<=>?HIJKHtimer9_gfclk_mux ti,mux-clock,FG;<=>?HIJKPuart1_gfclk_mux ti,mux-clockMN@uart2_gfclk_mux ti,mux-clockMNHuart3_gfclk_mux ti,mux-clockMNPuart4_gfclk_mux ti,mux-clockMNXuart5_gfclk_mux ti,mux-clockMNpuart7_gfclk_mux ti,mux-clockMNuart8_gfclk_mux ti,mux-clockMNuart9_gfclk_mux ti,mux-clockMNvip1_gclk_mux ti,mux-clockt vip2_gclk_mux ti,mux-clockt(vip3_gclk_mux ti,mux-clockt0clockdomainscoreaon_clkdmti,clockdomain[l4@4ae00000ti,dra7-l4-wkupsimple-bus >Jcounter@4000ti,omap-counter32k@@ 4counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1 ti,mux-clockuvwxyz{Q& , abe_dpll_sys_clk_mux ti,mux-clock ;&|,|abe_dpll_bypass_clk_mux ti,mux-clock|G& , abe_dpll_clk_mux ti,mux-clock|G & , abe_24m_fclkti,divider-clock&4,4aess_fclkti,divider-clock}x4&~,~abe_giclk_divti,divider-clock~t4&H,Habe_lp_clk_divti,divider-clock &,abe_sys_clk_divti,divider-clock  4&5,5adc_gfclk_mux ti,mux-clock  ;Gsys_clk1_dclk_divti,divider-clock 4@&,sys_clk2_dclk_divti,divider-clock;4@&,per_abe_x1_dclk_divti,divider-clockf4@&,dsp_gclk_divti,divider-clock4@&,gpu_dclkti,divider-clockk4@&,emif_phy_dclk_divti,divider-clock4@&,gmac_250m_dclk_divti,divider-clockh4@&,l3init_480m_dclk_divti,divider-clock^4@&,usb_otg_dclk_divti,divider-clock4@&,sata_dclk_divti,divider-clock 4@&,pcie2_dclk_divti,divider-clock4@&,pcie_dclk_divti,divider-clock4@&,emu_dclk_divti,divider-clock 4@&,secure_32k_dclk_divti,divider-clock4@&,clkoutmux0_clk_mux ti,mux-clockXX&L,Lclkoutmux1_clk_mux ti,mux-clockX\clkoutmux2_clk_mux ti,mux-clockX`&_,_custefuse_sys_gfclk_divfixed-factor-clock *eve_clk ti,mux-clock,hdmi_dpll_clk_mux ti,mux-clock ;d&b,bmlb_clkti,divider-clock4@4&@,@mlbp_clkti,divider-clock4@0&A,Aper_abe_x1_gfclk2_divti,divider-clockf4@8&B,Btimer_sys_clk_divti,divider-clock D4&F,Fvideo1_dpll_clk_mux ti,mux-clock ;h&c,cvideo2_dpll_clk_mux ti,mux-clock ;l&d,dwkupaon_iclk_mux ti,mux-clock &l,lgpio1_dbclkti,gate-clockG8dcan1_sys_clk_mux ti,mux-clock ;&,timer1_gfclk_mux ti,mux-clock,FG;<=>?HIJK@uart10_gfclk_mux ti,mux-clockMNclockdomainsaxi@0 simple-bus>QQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci0>0 004pcie1 pcie-phy0` interrupt-controller&,axi@1 simple-bus>QQ00 disabledpcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci0>00004pcie2 pcie-phy0`interrupt-controller&,bandgap@4a0021e00J! J#, J#,J#txrxokayRdefault_k ummc@480b4000ti,omap4-hsmmcH @ Q4mmc2;/0txrxokaydefault_k~mmc@480ad000ti,omap4-hsmmcH  Y4mmc3;MNtxrx disabledmmc@480d1000ti,omap4-hsmmcH  [4mmc4;9:txrx disabledmmu@40d01000ti,dra7-dsp-iommu@  4mmu0_dsp1 disabledmmu@40d02000ti,dra7-dsp-iommu@   4mmu1_dsp1 disabledmmu@58882000ti,dra7-iommuX   4mmu_ipu1 disabledmmu@55082000ti,dra7-iommuU   4mmu_ipu2 disabledregulator-abb-mpu ti,abb-v3`abb_mpu 2(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-address/HC,@vregulator-abb-ivahd ti,abb-v3 `abb_ivahd 2(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-address@/HC0regulator-abb-dspeve ti,abb-v3 `abb_dspeve 2(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-address /HC0regulator-abb-gpu ti,abb-v3`abb_gpu 2(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-address/HCvspi@48098000ti,omap4-mcspiH  <4mcspi1O@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3 disabledspi@4809a000ti,omap4-mcspiH  =4mcspi2O +,-.tx0rx0tx1rx1 disabledspi@480b8000ti,omap4-mcspiH  V4mcspi3Otx0rx0 disabledspi@480ba000ti,omap4-mcspiH  +4mcspi4OFGtx0rx0 disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmap]X4qspipfckV W disabledocp2scp@4a090000ti,omap-ocp2scp>J  4ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrl|t psysclkrefclk&,pciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_tx|OPT ;pdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk&,pciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx| OPT ;pdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk disabled&,sata@4a141100snps,dwc-ahciJJ 1 sata-phy4sataokayrtc@48838000ti,am3352-rtcH4rtcssGocp2scp@4a080000ti,omap-ocp2scp>J  4ocp2scp1phy@4a084000 ti,omap-usb2J@|pwkupclkrefclk&,phy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JP|tpwkupclkrefclk&,phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrl|p  pwkupclksysclkrefclk&,omap_dwc3_1@48880000ti,dwc3 4usb_otg_ss1H H>usb@48890000 snps,dwc3Hp$GGHperipheralhostotgusb2-phyusb3-phy super-speedhostdefaultomap_dwc3_2@488c0000ti,dwc3 4usb_otg_ss2H W>usb@488d0000 snps,dwc3Hp$IIWperipheralhostotg usb2-phy high-speed peripheralomap_dwc3_3@48900000ti,dwc3 4usb_otg_ss3H X> disabledusb@48910000 snps,dwc3Hp$XXXperipheralhostotg high-speedotgelm@48078000ti,am3352-elmH 4elm disabledgpmc@50000000ti,am3352-gpmc4gpmcP| # disabledatl@4843c000 ti,dra7-atlHC4atl5:987 pfck disabledmcasp@48468000ti,dra7-mcasp-audio4mcasp3HF mputxrxtxrx pfckahclkxokaydefaultsleepHX;ow&,crossbar@4a002a48ti,irq-crossbarJ*H0&  &,ethernet@48484000ti,dra7-cpswti,cpsw4gmac% pfckcpts @% 18EUHH@HHR.f0NOPQ>Yokaydefaultsleepqmdio@48485000ti,davinci_mdio 4davinci_mdio{B@HHPdefaultsleep&,slave@48480200rgmiislave@48480300rgmiicpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_can4dcan1J  X  disabledcan@481d0000ti,dra7-d_can4dcan2HH  X   disableddss@58000000 ti,dra7-dssok 4dss_core8>(XX@TXC XPTXS (dsspll1_clkctrlpll1pll2_clkctrlpll2 pfckvideo1_clkvideo2_clkdispc@58001000ti,dra7-dispcX  4dss_dispcpfck4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore `ok 4dss_hdmi pfcksys_clkdefaultportendpoint&,dsp_system@41500000sysconAP&,omap_dwc3_4@48940000ti,dwc3 4usb_otg_ss4H Z> disabledusb@48950000 snps,dwc3Hp$YYZperipheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  4mmu0_dsp2 disabledmmu@41502000ti,dra7-dsp-iommuAP   4mmu1_dsp2 disabledthermal-zonescpu_thermal  ! /tripscpu_alert ? Kpassive&,cpu_crit ?H K criticalcpu_alert1 ?P Kactive&,cooling-mapsmap0 V [map1 V [gpu_thermal  ! /tripsgpu_crit ?H K criticalcore_thermal  ! /tripscore_crit ?H K criticaldspeve_thermal  ! /tripsdspeve_crit ?H K criticaliva_thermal  ! /tripsiva_crit ?H K criticalboard_thermal  ! /tripsboard_alert ?@ Kactive&,board_crit ?( K criticalcooling-mapsmap0 V [cpuscpu@0cpuarm,cortex-a15 jB@,@pcpu {     &,cpu@1cpuarm,cortex-a15pmuarm,cortex-a15-pmu&fixedregulator-vdd_3v3regulator-fixed`vdd_3v3 o2Z2Z&,fixedregulator-aic_dvddregulator-fixed`aic_dvdd_fixed ow@w@&,fixedregulator-vttregulator-fixed `vtt_fixed o2Z2ZDX   leds gpio-ledsdefaultled@0 beagle-x15:usr0   heartbeat offled@1 beagle-x15:usr1  cpu0 offled@2 beagle-x15:usr2  mmc0 offled@3 beagle-x15:usr3  ide-disk offgpio_fan gpio-fan  "2 &,connectorhdmi-connector hdmiaportendpoint&,encoder ti,tpd12s015default$  portsport@0endpoint&,port@1endpoint&,sound@0simple-audio-card 5BeagleBoard-X15 LLineLine OutLineLine In: fLine OutLLOUTLine OutRLOUTMIC2LLine InMIC2RLine In dsp_b   simple-audio-card,cpu simple-audio-card,codec H_X&, #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0rtc0rtc1rtc2display0device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclocksti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapgpiosstatus#thermal-sensor-cells#dma-cellsdma-channelsdma-requeststi,dma-safe-mapdma-mastersgpio-controller#gpio-cellsti,no-reset-on-initti,no-idle-on-initdmasdma-namespinctrl-namespinctrl-0#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwon#hwlock-cellsti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondsti,enable-vbus-detectionvbus-gpio#sound-dai-cellspinctrl-1adc-settle-msAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyinterrupt-namesvcc-supplyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpiosti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsclock-namessyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkextcongpmc,num-csgpmc,num-waitpinsti,provided-clocksassigned-clocksassigned-clock-parentsop-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceoperating-pointsclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-tolerancevin-supplyenable-active-highlabellinux,default-triggerdefault-stategpio-fan,speed-mapsimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,bitclock-inversionsound-dai