:8.8( .(ti,dra72-evmti,dra722ti,dra72ti,dra7& 7TI DRA722chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000 /connectormemorymemory@timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&socti,omap-inframpu ti,omap5-mpu%mpuocpti,dra7-l3-nocsimple-bus/%l3_main_1l3_main_2 DE 6 l4@4a000000ti,dra7-l4-cfgsimple-bus /J"scm@2000ti,dra7-scm-coresimple-bus  / scm_conf@0sysconsimple-bus /pbias_regulatorti,pbias-dra7ti,pbias-omapJpbias_mmc_omap5Qpbias_mmc_omap5`w@x-clocksdss_deshdcp_clkti,gate-clockXehrpwm0_tbclkti,gate-clockXehrpwm1_tbclkti,gate-clockXehrpwm2_tbclkti,gate-clockXsys_32k_ck ti,mux-clockGGpinmux@1400ti,dra7-padconfpinctrl-singleh ?pinmux_i2c1_pinspinmux_i2c5_pins  nand_default  $(,048<pinmux_usb1_pins pinmux_usb2_pins tps65917_pins_default$mmc1_pins_default8lTX\`dhmmc2_pins_defaultPdcan1_pins_defaultdcan1_pins_sleeppinmux_qspi1_pins8tx|pinmux_hdmi_pins pinmux_tpd12s015_pinspinmux_atl_pinspinmux_mcasp3_pins $(,0pinmux_mcasp3_sleep_pins $(,0cpsw_default`cpsw_sleep`davinci_mdio_default<@davinci_mdio_sleep<@scm_conf@1c04syscon scm_conf@1c24syscon$$cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ckti,dra7-atl-clock ::atl_clkin1_ckti,dra7-atl-clock 99atl_clkin2_ckti,dra7-atl-clock 88atl_clkin3_ckti,dra7-atl-clock 77hdmi_clkin_ck fixed-clock((mlb_clkin_ck fixed-clockmlbp_clkin_ck fixed-clockpciesref_acs_clk_ck fixed-clockQQref_clkin0_ck fixed-clock<<ref_clkin1_ck fixed-clock==ref_clkin2_ck fixed-clock>>ref_clkin3_ck fixed-clock??rmii_clk_ck fixed-clocksdvenc_clkin_ck fixed-clocksecure_32k_clk_src_ck fixed-clocksys_clk32_crystal_ck fixed-clocksys_clk32_pseudo_ckfixed-factor-clock bvirt_12000000_ck fixed-clockuuvirt_13000000_ck fixed-clock]@virt_16800000_ck fixed-clockYwwvirt_19200000_ck fixed-clock$xxvirt_20000000_ck fixed-clock1-vvvirt_26000000_ck fixed-clockyyvirt_27000000_ck fixed-clockzzvirt_38400000_ck fixed-clockI{{sys_clkin2 fixed-clockX;;usb_otg_clkin_ck fixed-clockvideo1_clkin_ck fixed-clock11video1_m2_clkin_ck fixed-clock''video2_clkin_ck fixed-clock22video2_m2_clkin_ck fixed-clock&&dpll_abe_ckti,omap4-dpll-m4xen-clock   dpll_abe_x2_ckti,omap4-dpll-x2-clock dpll_abe_m2x2_ckti,divider-clock%0BYabe_clkti,divider-clock%p}}dpll_abe_m2_ckti,divider-clock %0BYffdpll_abe_m3x2_ckti,divider-clock%0BYdpll_core_byp_mux ti,mux-clock ,dpll_core_ckti,omap4-dpll-core-clock  $,(dpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_h12x2_ckti,divider-clock%?0<BYmpu_dpll_hs_clk_divfixed-factor-clockdpll_mpu_ckti,omap5-mpu-dpll-clock `dlhdpll_mpu_m2_ckti,divider-clock%0pBYmpu_dclk_divfixed-factor-clockdsp_dpll_hs_clk_divfixed-factor-clockdpll_dsp_byp_mux ti,mux-clock @dpll_dsp_ckti,omap4-dpll-clock 48@<dpll_dsp_m2_ckti,divider-clock%0DBYiva_dpll_hs_clk_divfixed-factor-clockdpll_iva_byp_mux ti,mux-clock dpll_iva_ckti,omap4-dpll-clock dpll_iva_m2_ckti,divider-clock%0BYiva_dclkfixed-factor-clockdpll_gpu_byp_mux ti,mux-clock dpll_gpu_ckti,omap4-dpll-clock   dpll_gpu_m2_ckti,divider-clock %0BYkkdpll_core_m2_ckti,divider-clock%00BY!!core_dpll_out_dclk_divfixed-factor-clock!dpll_ddr_byp_mux ti,mux-clock ""dpll_ddr_ckti,omap4-dpll-clock "##dpll_ddr_m2_ckti,divider-clock#%0 BYdpll_gmac_byp_mux ti,mux-clock $$dpll_gmac_ckti,omap4-dpll-clock $%%dpll_gmac_m2_ckti,divider-clock%%0BYhhvideo2_dclk_divfixed-factor-clock&video1_dclk_divfixed-factor-clock'hdmi_dclk_divfixed-factor-clock(per_dpll_hs_clk_divfixed-factor-clockUUusb_dpll_hs_clk_divfixed-factor-clockYYeve_dpll_hs_clk_divfixed-factor-clock))dpll_eve_byp_mux ti,mux-clock )**dpll_eve_ckti,omap4-dpll-clock *++dpll_eve_m2_ckti,divider-clock+%0BY,,eve_dclk_divfixed-factor-clock,dpll_core_h13x2_ckti,divider-clock%?0@BYdpll_core_h14x2_ckti,divider-clock%?0DBYiidpll_core_h22x2_ckti,divider-clock%?0TBY33dpll_core_h23x2_ckti,divider-clock%?0XBYttdpll_core_h24x2_ckti,divider-clock%?0\BYdpll_ddr_x2_ckti,omap4-dpll-x2-clock#--dpll_ddr_h11x2_ckti,divider-clock-%?0(BYdpll_dsp_x2_ckti,omap4-dpll-x2-clock..dpll_dsp_m3x2_ckti,divider-clock.%0HBYdpll_gmac_x2_ckti,omap4-dpll-x2-clock%//dpll_gmac_h11x2_ckti,divider-clock/%?0BY00dpll_gmac_h12x2_ckti,divider-clock/%?0BYdpll_gmac_h13x2_ckti,divider-clock/%?0BYdpll_gmac_m3x2_ckti,divider-clock/%0BYgmii_m_clk_divfixed-factor-clock0hdmi_clk2_divfixed-factor-clock(EEhdmi_div_clkfixed-factor-clock(KKl3_iclk_divti,divider-clock%pl4_root_clk_divfixed-factor-clockvideo1_clk2_divfixed-factor-clock1CCvideo1_div_clkfixed-factor-clock1IIvideo2_clk2_divfixed-factor-clock2DDvideo2_div_clkfixed-factor-clock2JJipu1_gfclk_mux ti,mux-clock3 mcasp1_ahclkr_mux ti,mux-clock8456789:;<=>?@APmcasp1_ahclkx_mux ti,mux-clock8456789:;<=>?@APmcasp1_aux_gfclk_mux ti,mux-clockBCDEPtimer5_gfclk_mux ti,mux-clock0FG;<=>?HIJKLXtimer6_gfclk_mux ti,mux-clock0FG;<=>?HIJKL`timer7_gfclk_mux ti,mux-clock0FG;<=>?HIJKLhtimer8_gfclk_mux ti,mux-clock0FG;<=>?HIJKLpuart6_gfclk_mux ti,mux-clockMNdummy_ck fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ckti,omap4-dpll-clock  OOdpll_pcie_ref_m2ldo_ckti,divider-clockO%0BYPPapll_pcie_in_clk_mux@4ae06118 ti,mux-clockPQRRapll_pcie_ckti,dra7-apll-clockRO SSoptfclk_pciephy1_32khz@4a0093b0ti,gate-clockGoptfclk_pciephy2_32khz@4a0093b8ti,gate-clockGoptfclk_pciephy_div@4a00821cti,divider-clockS%TToptfclk_pciephy1_clk@4a0093b0ti,gate-clockS optfclk_pciephy2_clk@4a0093b8ti,gate-clockS optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockT optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockT apll_pcie_clkvcoldofixed-factor-clockSapll_pcie_clkvcoldo_divfixed-factor-clockSapll_pcie_m2_ckfixed-factor-clockSdpll_per_byp_mux ti,mux-clock ULVVdpll_per_ckti,omap4-dpll-clock V@DLHWWdpll_per_m2_ckti,divider-clockW%0PBYXXfunc_96m_aon_dclk_divfixed-factor-clockXdpll_usb_byp_mux ti,mux-clock YZZdpll_usb_ckti,omap4-dpll-j-type-clock Z[[dpll_usb_m2_ckti,divider-clock[%0BY^^dpll_pcie_ref_m2_ckti,divider-clockO%0BYdpll_per_x2_ckti,omap4-dpll-x2-clockW\\dpll_per_h11x2_ckti,divider-clock\%?0XBY]]dpll_per_h12x2_ckti,divider-clock\%?0\BYaadpll_per_h13x2_ckti,divider-clock\%?0`BYrrdpll_per_h14x2_ckti,divider-clock\%?0dBYjjdpll_per_m2x2_ckti,divider-clock\%0PBYNNdpll_usb_clkdcoldofixed-factor-clock[``func_128m_clkfixed-factor-clock]mmfunc_12m_fclkfixed-factor-clockNfunc_24m_clkfixed-factor-clockX66func_48m_fclkfixed-factor-clockNMMfunc_96m_fclkfixed-factor-clockNl3init_60m_fclkti,divider-clock^clkout2_clkti,gate-clock_l3init_960m_gfclkti,gate-clock`eedss_32khz_clkti,gate-clockG  dss_48mhz_clkti,gate-clockM  dss_dss_clkti,gate-clocka dss_hdmi_clkti,gate-clockb  dss_video1_clkti,gate-clockc  dss_video2_clkti,gate-clockd  gpio2_dbclkti,gate-clockG`gpio3_dbclkti,gate-clockGhgpio4_dbclkti,gate-clockGpgpio5_dbclkti,gate-clockGxgpio6_dbclkti,gate-clockGgpio7_dbclkti,gate-clockGgpio8_dbclkti,gate-clockGmmc1_clk32kti,gate-clockG(mmc2_clk32kti,gate-clockG0mmc3_clk32kti,gate-clockG mmc4_clk32kti,gate-clockG(sata_ref_clkti,gate-clock usb_otg_ss1_refclk960mti,gate-clockeusb_otg_ss2_refclk960mti,gate-clocke@usb_phy1_always_on_clk32kti,gate-clockG@usb_phy2_always_on_clk32kti,gate-clockGusb_phy3_always_on_clk32kti,gate-clockGatl_dpll_clk_mux ti,mux-clockG12( ggatl_gfclk_mux ti,mux-clock fg   gmac_gmii_ref_clk_divti,divider-clockhgmac_rft_clk_mux ti,mux-clock12f(gpu_core_gclk_mux ti,mux-clock ijk gpu_hyd_gclk_mux ti,mux-clock ijk l3instr_ts_gclk_divti,divider-clocklP  mcasp2_ahclkr_mux ti,mux-clock8456789:;<=>?@A`mcasp2_ahclkx_mux ti,mux-clock8456789:;<=>?@A`mcasp2_aux_gfclk_mux ti,mux-clockBCDE`mcasp3_ahclkx_mux ti,mux-clock8456789:;<=>?@Ahmcasp3_aux_gfclk_mux ti,mux-clockBCDEhmcasp4_ahclkx_mux ti,mux-clock8456789:;<=>?@Amcasp4_aux_gfclk_mux ti,mux-clockBCDEmcasp5_ahclkx_mux ti,mux-clock8456789:;<=>?@Axmcasp5_aux_gfclk_mux ti,mux-clockBCDExmcasp6_ahclkx_mux ti,mux-clock8456789:;<=>?@Amcasp6_aux_gfclk_mux ti,mux-clockBCDEmcasp7_ahclkx_mux ti,mux-clock8456789:;<=>?@Amcasp7_aux_gfclk_mux ti,mux-clockBCDEmcasp8_ahclk_mux ti,mux-clock8456789:;<=>?@Amcasp8_aux_gfclk_mux ti,mux-clockBCDEmmc1_fclk_mux ti,mux-clockmN(nnmmc1_fclk_divti,divider-clockn%(pmmc2_fclk_mux ti,mux-clockmN0oommc2_fclk_divti,divider-clocko%0pmmc3_gfclk_mux ti,mux-clockMN ppmmc3_gfclk_divti,divider-clockp% pmmc4_gfclk_mux ti,mux-clockMN(qqmmc4_gfclk_divti,divider-clockq%(pqspi_gfclk_mux ti,mux-clockmr8ssqspi_gfclk_divti,divider-clocks%8ptimer10_gfclk_mux ti,mux-clock,FG;<=>?HIJK(timer11_gfclk_mux ti,mux-clock,FG;<=>?HIJK0timer13_gfclk_mux ti,mux-clock,FG;<=>?HIJKtimer14_gfclk_mux ti,mux-clock,FG;<=>?HIJKtimer15_gfclk_mux ti,mux-clock,FG;<=>?HIJKtimer16_gfclk_mux ti,mux-clock,FG;<=>?HIJK0timer2_gfclk_mux ti,mux-clock,FG;<=>?HIJK8timer3_gfclk_mux ti,mux-clock,FG;<=>?HIJK@timer4_gfclk_mux ti,mux-clock,FG;<=>?HIJKHtimer9_gfclk_mux ti,mux-clock,FG;<=>?HIJKPuart1_gfclk_mux ti,mux-clockMN@uart2_gfclk_mux ti,mux-clockMNHuart3_gfclk_mux ti,mux-clockMNPuart4_gfclk_mux ti,mux-clockMNXuart5_gfclk_mux ti,mux-clockMNpuart7_gfclk_mux ti,mux-clockMNuart8_gfclk_mux ti,mux-clockMNuart9_gfclk_mux ti,mux-clockMNvip1_gclk_mux ti,mux-clockt vip2_gclk_mux ti,mux-clockt(vip3_gclk_mux ti,mux-clockt0clockdomainscoreaon_clkdmti,clockdomain[l4@4ae00000ti,dra7-l4-wkupsimple-bus /Jcounter@4000ti,omap-counter32k@@ %counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1 ti,mux-clockuvwxyz{B  abe_dpll_sys_clk_mux ti,mux-clock ;||abe_dpll_bypass_clk_mux ti,mux-clock|G  abe_dpll_clk_mux ti,mux-clock|G   abe_24m_fclkti,divider-clock44aess_fclkti,divider-clock}x%~~abe_giclk_divti,divider-clock~t%HHabe_lp_clk_divti,divider-clock abe_sys_clk_divti,divider-clock  %55adc_gfclk_mux ti,mux-clock  ;Gsys_clk1_dclk_divti,divider-clock %@psys_clk2_dclk_divti,divider-clock;%@pper_abe_x1_dclk_divti,divider-clockf%@pdsp_gclk_divti,divider-clock%@pgpu_dclkti,divider-clockk%@pemif_phy_dclk_divti,divider-clock%@pgmac_250m_dclk_divti,divider-clockh%@pl3init_480m_dclk_divti,divider-clock^%@pusb_otg_dclk_divti,divider-clock%@psata_dclk_divti,divider-clock %@ppcie2_dclk_divti,divider-clock%@ppcie_dclk_divti,divider-clock%@pemu_dclk_divti,divider-clock %@psecure_32k_dclk_divti,divider-clock%@pclkoutmux0_clk_mux ti,mux-clockXXLLclkoutmux1_clk_mux ti,mux-clockX\clkoutmux2_clk_mux ti,mux-clockX`__custefuse_sys_gfclk_divfixed-factor-clock eve_clk ti,mux-clock,hdmi_dpll_clk_mux ti,mux-clock ;dbbmlb_clkti,divider-clock%@4p@@mlbp_clkti,divider-clock%@0pAAper_abe_x1_gfclk2_divti,divider-clockf%@8pBBtimer_sys_clk_divti,divider-clock D%FFvideo1_dpll_clk_mux ti,mux-clock ;hccvideo2_dpll_clk_mux ti,mux-clock ;lddwkupaon_iclk_mux ti,mux-clock llgpio1_dbclkti,gate-clockG8dcan1_sys_clk_mux ti,mux-clock ;timer1_gfclk_mux ti,mux-clock,FG;<=>?HIJK@uart10_gfclk_mux ti,mux-clockMNclockdomainsaxi@0 simple-bus/QQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci0/0 00%pcie1 pcie-phy0`interrupt-controlleraxi@1 simple-bus/QQ00 disabledpcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci0/0000%pcie2 pcie-phy0`interrupt-controllerbandgap@4a0021e00J! J#, J#,J#htxrxokay.default;GW aj qmmc@480b4000ti,omap4-hsmmcH @ Q%mmc2c/0htxrxokaydefault;Wxj qmmc@480ad000ti,omap4-hsmmcH  Y%mmc3cMNhtxrx disabledmmc@480d1000ti,omap4-hsmmcH  [%mmc4c9:htxrx disabledmmu@40d01000ti,dra7-dsp-iommu@  %mmu0_dsp1 disabledmmu@40d02000ti,dra7-dsp-iommu@   %mmu1_dsp1 disabledmmu@58882000ti,dra7-iommuX   %mmu_ipu1 disabledmmu@55082000ti,dra7-iommuU   %mmu_ipu2 disabledregulator-abb-mpu ti,abb-v3Qabb_mpu 2(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addressH&,@vregulator-abb-ivahd ti,abb-v3 Qabb_ivahd 2(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-address@H&0regulator-abb-dspeve ti,abb-v3 Qabb_dspeve 2(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-address H&0regulator-abb-gpu ti,abb-v3Qabb_gpu 2(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-addressH&vspi@48098000ti,omap4-mcspiH  <%mcspi12@c#$%&'()* htx0rx0tx1rx1tx2rx2tx3rx3 disabledspi@4809a000ti,omap4-mcspiH  =%mcspi22 c+,-.htx0rx0tx1rx1 disabledspi@480b8000ti,omap4-mcspiH  V%mcspi32chtx0rx0 disabledspi@480ba000ti,omap4-mcspiH  +%mcspi42cFGhtx0rx0 disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmap@X%qspiSfck9 Wokaydefault_lm25p80@0 s25fl256s1_lqpartition@0 QSPI.SPLpartition@1QSPI.SPL.backup1partition@2QSPI.SPL.backup2partition@3QSPI.SPL.backup3partition@4 QSPI.u-bootpartition@5QSPI.u-boot-spl-ospartition@6QSPI.u-boot-envpartition@7QSPI.u-boot-env.backup1partition@8 QSPI.kernelpartition@9QSPI.file-systembocp2scp@4a090000ti,omap-ocp2scp/J  %ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlt Ssysclkrefclkpciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_txOPT ;Sdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkpciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx OPT ;Sdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk disabledsata@4a141100snps,dwc-ahciJJ 1 sata-phy%satartc@48838000ti,am3352-rtcH%rtcssGocp2scp@4a080000ti,omap-ocp2scp/J  %ocp2scp1phy@4a084000 ti,omap-usb2J@Swkupclkrefclkphy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPtSwkupclkrefclkphy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlp  Swkupclksysclkrefclkomap_dwc3_1@48880000ti,dwc3 %usb_otg_ss1H H/usb@48890000 snps,dwc3Hp$GGHperipheralhostotgusb2-phyusb3-phy super-speed peripheral$=defaultomap_dwc3_2@488c0000ti,dwc3 %usb_otg_ss2H W/usb@488d0000 snps,dwc3Hp$IIWperipheralhostotg usb2-phy high-speedhost$=defaultomap_dwc3_3@48900000ti,dwc3 %usb_otg_ss3H X/ disabledusb@48910000 snps,dwc3Hp$XXXperipheralhostotg high-speedotg$=elm@48078000ti,am3352-elmH %elmokaygpmc@50000000ti,am3352-gpmc%gpmcP| Vbokaydefault/nand@0,0ti,omap2-nand &tbch8PP<<' 52DR(a(pPPPpartition@0 NAND.SPLpartition@1NAND.SPL.backup1partition@2NAND.SPL.backup2partition@3NAND.SPL.backup3partition@4NAND.u-boot-spl-ospartition@5 NAND.u-boot partition@6NAND.u-boot-envpartition@7NAND.u-boot-env.backup1partition@8 NAND.kernel partition@9NAND.file-system`atl@4843c000 ti,dra7-atlHC%atl :987 Sfckokaydefault | 8 ';f > @V"atl2 S Wmcasp@48468000ti,dra7-mcasp-audio%mcasp3HF mputxrxchtxrx Sfckahclkxokaydefaultsleep [  '8 e m wcrossbar@4a002a48ti,irq-crossbarJ*H0&      ethernet@48484000ti,dra7-cpswti,cpsw%gmac% Sfckcpts     @   ' . ; KHH@HHR. \0NOPQ/Jokaydefaultsleep [ gmdio@48485000ti,davinci_mdio %davinci_mdio rB@HHPdefaultsleep [slave@48480200 {  rgmiislave@48480300 {cpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_can%dcan1J  X okdefaultsleepactive [ can@481d0000ti,dra7-d_can%dcan2HH  X   disableddss@58000000 ti,dra7-dssok %dss_core 8/XX@TXC dsspll1_clkctrlpll1Sfckvideo1_clk dispc@58001000ti,dra7-dispcX  %dss_dispcSfck 4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore `ok %dss_hdmi Sfcksys_clk defaultportendpoint thermal-zonescpu_thermal   tripscpu_alert - 9passivecpu_crit -H 9 criticalcooling-mapsmap0 D Igpu_thermal   tripsgpu_crit -H 9 criticalcore_thermal   tripscore_crit -H 9 criticaldspeve_thermal   tripsdspeve_crit -H 9 criticaliva_thermal   tripsiva_crit -H 9 criticalcpuscpu@0cpuarm,cortex-a15 X j |pmuarm,cortex-a15-pmu& fixedregulator-evm_3v3regulator-fixedQevm_3v3`2Zx2Zfixedregulator-aic_dvddregulator-fixed Qaic_dvdd `w@xw@fixedregulator-sdregulator-fixed Qevm_3v3_sd`2Zx2Z  extcon_usb1linux,extcon-usb-gpio extcon_usb2linux,extcon-usb-gpio connectorhdmi-connectorhdmiaportendpoint encoder ti,tpd12s015default$ portsport@0endpoint port@1endpoint sound@0simple-audio-card DRA7xx-EVMH HeadphoneHeadphone JackLineLine OutMicrophoneMic JackLineLine In Headphone JackHPLOUTHeadphone JackHPROUTLine OutLLOUTLine OutRLOUTMIC3LMic JackMIC3RMic JackMic JackMic BiasLINE1LLine InLINE1RLine In dsp_b  < [simple-audio-card,cpu  V"simple-audio-card,codec 8 #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0display0device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclocksti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cells#dma-cellsdma-channelsdma-requeststi,dma-safe-mapdma-mastersgpio-controller#gpio-cellsdmasdma-names#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwon#hwlock-cellspinctrl-namespinctrl-0ti,system-power-controllerregulator-always-onregulator-boot-onregulator-allow-bypasswakeup-sourceti,palmas-long-press-secondslines-initial-states#sound-dai-cellsadc-settle-msai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplygpio-hoggpiosoutput-lowline-nameti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpiosmax-frequencyti,non-removable#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsclock-namesspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthspi-cpolspi-cphalabelsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsphy-supplyutmi-modeextconinterrupt-namesmaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,wr-access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsti,provided-clocksassigned-clocksassigned-clock-parentsassigned-clock-ratesbwsawspinctrl-1op-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idlemode-gpiosbus_freqmac-addressphy_idphy-modesyscon-raminitpinctrl-2syscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicecooling-min-levelcooling-max-level#cooling-cellsvin-supplyenable-active-highgpioid-gpiosimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,bitclock-inversionsound-daisystem-clock-frequency