EF8?(6>&rockchip,rk3036-kylinrockchip,rk3036&7Rockchip RK3036 KylinBoardchosenaliases=/i2c@20072000B/i2c@20056000G/i2c@2005a000L/dwmmc@1021c000R/dwmmc@10214000X/dwmmc@10218000^/serial@20060000f/serial@20064000n/serial@20068000v/spi@20074000memoryzmemory`@cpusrockchip,rk3036-smpcpu@f00zcpuarm,cortex-a7 sB@@cpu@f01zcpuarm,cortex-a7amba simple-buspdma@20078000arm,pl330arm,primecell @  apb_pclkarm-pmuarm,cortex-a7-pmuLMtimerarm,armv7-timer*0   Nn6oscillator fixed-clockNn6^xin24mqbus_intmem@10080000 mmio-sram   smp-sram@0rockchip,rk3066-smp-sraminterrupt-controller@10139000 arm,gic-400~     usb@101800002rockchip,rk3036-usbrockchip,rk3066-usbsnps,dwc2  otgotg@@ okayusb@101c00002rockchip,rk3036-usbrockchip,rk3066-usbsnps,dwc2  otghostokayethernet@10200000#rockchip,rk3036-emacsnps,arc-emac @  hclkmacrefmacclk !d+rmiiokay4defaultBL P ` ethernet-phy@0dwmmc@102140000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@@N<4`s<4`D biuciu  disabled4defaultB dwmmc@102180000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@s<4` Esw biuciuciu_drvciu_sample okayZ'24default B@MZgdwmmc@1021c0000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@ N<4`s<4` Guy biuciuciu_drvciu_sampleu zrx-tx24default Bokayi2s@10220000(rockchip,rk3036-i2srockchip,rk3066-i2s"@ 3 i2s_clki2s_hclkRuztxrx4defaultBokay33clock-controller@20000000rockchip,rk3036-cru q#gsyscon@20008000rockchip,rk3036-grfsyscon acodec-ana@20030000 rk3036-codec @  acodec_pclkqokaytimer@20044000,rockchip,rk3036-timerrockchip,rk3288-timer @   a  timerpclkpwm@20050000(rockchip,rk3036-pwmrockchip,rk2928-pwm ^ pwm4defaultB disabledpwm@20050010(rockchip,rk3036-pwmrockchip,rk2928-pwm ^ pwm4defaultB disabledpwm@20050020(rockchip,rk3036-pwmrockchip,rk2928-pwm  ^ pwm4defaultB disabledpwm@20050030(rockchip,rk3036-pwmrockchip,rk2928-pwm 0^ pwm4defaultB disabledi2c@20056000(rockchip,rk3036-i2crockchip,rk3288-i2c `  i2cM4defaultBokayNpmic@1brockchip,rk808& 4defaultBq^xin32krk808-clkout2 ".:F R!^!kx!"regulatorsDCDC_REG1 qpvdd_armregulator-state-memDCDC_REG2 Pvdd_gpuregulator-state-mem(B@DCDC_REG3vcc_ddrregulator-state-memDCDC_REG42Z2Zvcc_io!!regulator-state-mem(2ZLDO_REG12Z2Z vccio_pmu""regulator-state-mem(2ZLDO_REG22Z2Zvcc_tpregulator-state-memLDO_REG3B@B@vdd_10regulator-state-mem(B@LDO_REG4w@w@ vcc18_lcdregulator-state-mem(w@LDO_REG5w@2Z vccio_sdregulator-state-mem(2ZLDO_REG6w@&%vout5regulator-state-mem(w@LDO_REG7w@w@vcc_18  regulator-state-mem(w@LDO_REG8w@w@ vcca_codecregulator-state-mem(w@SWITCH_REG1vcc_wlregulator-state-memSWITCH_REG2vcc_lcdregulator-state-memi2c@2005a000(rockchip,rk3036-i2crockchip,rk3288-i2c   i2cN4defaultB#okayrt5616@1brt5616q mclk44serial@20060000&rockchip,rk3036-uartsnps,dw-apb-uart  DNNn6MU baudclkapb_pclk4default B$%&okayserial@20064000&rockchip,rk3036-uartsnps,dw-apb-uart @ DNNn6NV baudclkapb_pclk4defaultB' disabledserial@20068000&rockchip,rk3036-uartsnps,dw-apb-uart  DNNn6OW baudclkapb_pclk4defaultB(okayi2c@20072000(rockchip,rk3036-i2crockchip,rk3288-i2c    i2cL4defaultB) disabledspi@20074000rockchip,rockchip-spi @ RA apb-pclkspi_pclku ztxrx4defaultB*+,- disabledpinctrlrockchip,rk3036-pinctrlgpio0@2007c000rockchip,gpio-bank  $@[k~22gpio1@20080000rockchip,gpio-bank  %A[k~gpio2@20084000rockchip,gpio-bank @ &B[k~  pcfg_pull_defaultw//pcfg-pull-none..pwm0pwm0-pin.pwm1pwm1-pin.pwm2pwm2-pin.pwm3pwm3-pin.sdmmcsdmmc-clk.  sdmmc-cmd/  sdmcc-cd/  sdmmc-bus1/sdmmc-bus4@////  sdmmc-pwr.sdiosdio-bus1 /sdio-bus4@ / / //sdio-cmd/sdio-clk .bt-wake-h/11emmcemmc-clk.emmc-cmd/emmc-bus8////////emacemac-xfer / ///////emac-mdio  //i2c0i2c0-xfer ..))i2c1i2c1-xfer ..i2c2i2c2-xfer ..##i2si2s-bus`//////uart0uart0-xfer /.$$uart0-cts/%%uart0-rts.&&uart1uart1-xfer /.''uart2uart2-xfer /.((spispi-txd/**spi-rxd/++spi-clk/,,spi-cs0/--spi-cs1/ledsled-ctl.00pmicpmic-int/sleepglobal-pwroff.gpio-leds gpio-ledswork Z kylin:red:led4defaultB0sdio-pwrseqmmc-pwrseq-simple4defaultB1$T22 soundsimple-audio-cardi2srockchip,rt5616-codec4MicrophoneMicrophone JackHeadphoneHeadphone JackkMIC1Microphone JackMIC2Microphone JackMicrophone Jackmicbias1Headphone JackHPOLHeadphone JackHPORsimple-audio-card,cpu,3simple-audio-card,codec,4vsys-regulatorregulator-fixedvcc_sysLK@LK@ #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2mshc0mshc1mshc2serial0serial1serial2spidevice_typeregenable-methodresetsoperating-pointsclock-latencyclockslinux,phandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclock-namesinterrupt-affinityarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsinterrupt-controller#interrupt-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmastatusrockchip,grfassigned-clocksassigned-clock-parentsmax-speedphy-modepinctrl-namespinctrl-0phyphy-reset-gpiosphy-reset-durationclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotsbroken-cdcap-sdio-irqdefault-sample-phasekeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104dmasdma-namesmmc-ddr-1_8v#sound-dai-cells#reset-cellsassigned-clock-rates#pwm-cellsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltreg-shiftreg-io-widthgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinslabelsimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssimple-audio-card,widgetssimple-audio-card,routingsound-dai