Ð þíNˆ8IÜ(¬I¤',mundoreader,bq-curie2rockchip,rk3066a 7bq Curie 2chosenaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/dwmmc@1021c000f/dwmmc@10214000l/dwmmc@10218000r/serial@10124000z/serial@10126000‚/serial@20064000Š/serial@20068000’/spi@20070000—/spi@20074000memoryœmemory¨`@amba ,simple-bus¬dma-controller@20018000,arm,pl330arm,primecell¨ €@³¾ÉäÀ ëapb_pclk÷)ý)dma-controller@2001c000,arm,pl330arm,primecell¨ À@³¾ÉäÀ ëapb_pclk disableddma-controller@20078000,arm,pl330arm,primecell¨ €@³¾ÉäÁ ëapb_pclk÷ýoscillator ,fixed-clock n6)xin24ml2-cache-controller@10138000,arm,pl310-cache¨€<J÷&ý&scu@1013c000,arm,cortex-a9-scu¨Àglobal-timer@1013c200,arm,cortex-a9-global-timer¨  ³ älocal-timer@1013c600,arm,cortex-a9-twd-timer¨Æ  ³ äinterrupt-controller@1013d000,arm,cortex-a9-gicVk¨ÐÁ÷ýserial@10124000,snps,dw-apb-uart¨@ ³"|†ëbaudclkapb_pclkä@Lokay“default¡serial@10126000,snps,dw-apb-uart¨` ³#|†ëbaudclkapb_pclkäAMokay“default¡usb@10180000,rockchip,rk3066-usbsnps,dwc2¨ ³äÃëotg«otg³ÅÔ€€@@ ãí òusb2-phy disabledusb@101c0000 ,snps,dwc2¨ ³äÉëotg«hostí òusb2-phy disabledethernet@10204000,rockchip,rk3066-emac¨ @< ³üäÄD ëhclkmacref drmii disableddwmmc@10214000,rockchip,rk2928-dw-mshc¨!@ ³äÀHëbiuciuokay“default¡ '1 =GYjdwmmc@10218000,rockchip,rk2928-dw-mshc¨!€ ³äÁIëbiuciuokay“default ¡ 'u=jdwmmc@1021c000,rockchip,rk2928-dw-mshc¨!À ³äÂJëbiuciu disabledpmu@20004000,rockchip,rk3066-pmusyscon¨ @grf@20008000,syscon¨ €÷ýi2c@2002d000,rockchip,rk3066-i2c¨ Ð ³(üëi2cäP disabled“default¡i2c@2002f000,rockchip,rk3066-i2c¨ ð ³)üäQëi2cokay“default¡ €tps@2d¨-³ƒ ,ti,tps65910regulatorsregulator@0›vcc_rtcª¨¾vrtcregulator@1›vcc_ioª¨¾vio÷ýregulator@2›vdd_armÓ 'Àëã`ª¨¾vdd1÷'ý'regulator@3›vcc_ddrÓ 'Àëã`ª¨¾vdd2regulator@5 ›vcc18_cifª¨¾vdig1regulator@6›vdd_11ª¨¾vdig2regulator@7›vcc_25ª¨¾vpllregulator@8›vcc_18ª¨¾vdacregulator@9 ›vcc25_hdmiª¨ ¾vaux1regulator@10›vcca_33ª¨ ¾vaux2regulator@11›vcc_tpª¨ ¾vaux33regulator@12 ›vcc28_cifª¨ ¾vmmcregulator@4¨¾vdd3regulator@13¨ ¾vbbpwm@20030000,rockchip,rk2928-pwm¨ äF disabled“default¡pwm@20030010,rockchip,rk2928-pwm¨ äF disabled“default¡watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt¨ ÀäK ³3okaypwm@20050020,rockchip,rk2928-pwm¨  äG disabled“default¡pwm@20050030,rockchip,rk2928-pwm¨ 0äGokay“default¡÷.ý.i2c@20056000,rockchip,rk3066-i2c¨ ` ³*üäRëi2c disabled“default¡i2c@2005a000,rockchip,rk3066-i2c¨   ³+üäSëi2c disabled“default¡i2c@2005e000,rockchip,rk3066-i2c¨ à ³4üäTëi2c disabled“default¡serial@20064000,snps,dw-apb-uart¨ @ ³$|†ëbaudclkapb_pclkäBNokay“default¡serial@20068000,snps,dw-apb-uart¨ € ³%|†ëbaudclkapb_pclkäCOokay“default¡saradc@2006c000,rockchip,saradc¨ À ³ äGJësaradcapb_pclk disabledspi@20070000,rockchip,rk3066-spiäEHëspiclkapb_pclk ³&¨ 2  7txrx disabled“default¡ !spi@20074000,rockchip,rk3066-spiäFIëspiclkapb_pclk ³'¨ @2  7txrx disabled“default¡"#$%cpusArockchip,rk3066-smpcpu@0œcpu,arm,cortex-a9O&¨8`›@Ö O€íØa€*ˆ s€*ˆ 'ÀÈà°ÀÈàÂÀg8qœ@ä'cpu@1œcpu,arm,cortex-a9O&¨sram@10080000 ,mmio-sram¨ ¬smp-sram@0,rockchip,rk3066-smp-sram¨Pi2s@10118000,rockchip,rk3066-i2s¨€  ³“default¡(2))7txrxëi2s_hclki2s_clkäÆK‹¦ disabledi2s@1011a000,rockchip,rk3066-i2s¨   ³ “default¡*2))7txrxëi2s_hclki2s_clkäÇL‹¦ disabledi2s@1011c000,rockchip,rk3066-i2s¨À  ³“default¡+2) ) 7txrxëi2s_hclki2s_clkäÈM‹¦ disabledclock-controller@20000000,rockchip,rk3066a-cru¨ üÀ÷ýtimer@2000e000,snps,dw-apb-timer-osc¨ à ³.äVD ëtimerpclkefuse@20010000,rockchip,rockchip-efuse¨ @ä[ ëpclk_efusecpu_leakage¨timer@20038000,snps,dw-apb-timer-osc¨ € ³,äTB ëtimerpclktimer@2003a000,snps,dw-apb-timer-osc¨   ³-äUC ëtimerpclktsadc@20060000,rockchip,rk3066-tsadc¨ ä]]ësaradcapb_pclk ³  disabledphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phyü disabledusb-phy0ͨ|äQëphyclk÷ýusb-phy1ͨˆäRëphyclk÷ýpinctrl,rockchip,rk3066a-pinctrlü¬gpio0@20034000,rockchip,gpio-bank¨ @ ³6äUØèVkgpio1@2003c000,rockchip,gpio-bank¨ À ³7äVØèVkgpio2@2003e000,rockchip,gpio-bank¨ à ³8äWØèVkgpio3@20080000,rockchip,gpio-bank¨  ³9äXØèVk÷/ý/gpio4@20084000,rockchip,gpio-bank¨ @ ³:äYØèVk÷0ý0gpio6@2000a000,rockchip,gpio-bank¨   ³<äZØèVk÷ýpcfg_pull_defaultô÷-ý-pcfg_pull_none ÷,ý,emacemac-xfer€,,,,,,,,emac-mdio ,,emmcemmc-clk-emmc-cmd -emmc-rst -i2c0i2c0-xfer ,,÷ýi2c1i2c1-xfer ,,÷ýi2c2i2c2-xfer ,,÷ýi2c3i2c3-xfer ,,÷ýi2c4i2c4-xfer ,,÷ýpwm0pwm0-out,÷ýpwm1pwm1-out,÷ýpwm2pwm2-out,÷ýpwm3pwm3-out,÷ýspi0spi0-clk-÷ýspi0-cs0-÷!ý!spi0-tx-÷ýspi0-rx-÷ ý spi0-cs1-spi1spi1-clk-÷"ý"spi1-cs0-÷%ý%spi1-rx-÷$ý$spi1-tx-÷#ý#spi1-cs1-uart0uart0-xfer --÷ýuart0-cts-uart0-rts-uart1uart1-xfer --÷ýuart1-cts-uart1-rts-uart2uart2-xfer - -÷ýuart3uart3-xfer --÷ýuart3-cts-uart3-rts-sd0sd0-clk-÷ýsd0-cmd -÷ ý sd0-cd-÷ ý sd0-wp-sd0-bus-width1 -sd0-bus-width4@ - - - -÷ ý sd1sd1-clk-÷ ý sd1-cmd-÷ýsd1-cd-sd1-wp-sd1-bus-width1-sd1-bus-width4@----÷ýi2s0i2s0-bus-- - - - - ---÷(ý(i2s1i2s1-bus`------÷*ý*i2s2i2s2-bus`------÷+ý+vdd-log,pwm-regulator %.è›vdd_logÓO€ëO€ª*B@dO€*okayfixed-regulator,regulator-fixed ›sdmmc-supplyÓ-ÆÀë-ÆÀ 8/=† N÷ ý gpio-keys ,gpio-keysYbutton@0 djtuGPIO Key Power{Œšdbutton@1 d0jhuGPIO Key Vol-{šd #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1device_typeregrangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-nameslinux,phandlestatusclock-frequency#clock-cellsclock-output-namescache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaphysphy-namesrockchip,grfmax-speedphy-modefifo-depthnum-slotsvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removablevcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsdmasdma-namesenable-methodnext-level-cacheoperating-pointsclock-latencycpu0-supplyrockchip,playback-channelsrockchip,capture-channels#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinspwmsvoltage-tablegpiostartup-delay-usvin-supplyautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-interval