8}(3}*rockchip,rk3288-evb-rk808rockchip,rk3288&chosenaliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 @,3?Ecpu@501cpuarm,cortex-a12?Ecpu@502cpuarm,cortex-a12?Ecpu@503cpuarm,cortex-a12?Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_, zapb_pclk?Edma-controller@ff600000arm,pl330arm,primecell`@T_, zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_, zapb_pclk?GEGreserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24m? E timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H , a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр ,Drvzbiuciuciu-driveciu-sample  @okay!2DOYdefaultg q}dwmmc@ff0d0000rockchip,rk3288-dw-mshcр ,Eswzbiuciuciu-driveciu-sample ! @ disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр ,Ftxzbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр ,Guyzbiuciuciu-driveciu-sample #@okayDOYdefaultgsaradc@ff100000rockchip,saradc $,I[zsaradcapb_pclk disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi,ARzspiclkapb_pclk  txrx ,Ydefaultg disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi,BSzspiclkapb_pclk txrx -Ydefaultg disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi,CTzspiclkapb_pclktxrx .Ydefaultg !" disabledi2c@ff140000rockchip,rk3288-i2c >zi2c,MYdefaultg# disabledi2c@ff150000rockchip,rk3288-i2c ?zi2c,OYdefaultg$ disabledi2c@ff160000rockchip,rk3288-i2c @zi2c,PYdefaultg% disabledi2c@ff170000rockchip,rk3288-i2c Azi2c,QYdefaultg&okay?SESserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7,MUzbaudclkapb_pclkYdefaultg'okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8,NVzbaudclkapb_pclkYdefaultg(okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9,OWzbaudclkapb_pclkYdefaultg)okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :,PXzbaudclkapb_pclkYdefaultg*okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;,QYzbaudclkapb_pclkYdefaultg+okaythermal-zonesreserve_thermal,cpu_thermald,tripscpu_alert0ppassive?-E-cpu_alert1$passive?.E.cpu_crit_ criticalcooling-mapsmap0%- *map1%. *gpu_thermald,tripsgpu_alert0ppassive?/E/gpu_crit_ criticalcooling-mapsmap0%/ *tsadc@ff280000rockchip,rk3288-tsadc( %,HZztsadcapb_pclk 9tsadc-apbYinitdefaultsleepg0E1O0Yosokay?,E,ethernet@ff290000rockchip,rk3288-gmac) macirq28,fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 9stmmacethok3rgmiiinput 4 'B@1A5Ydefaultg6X0ausb@ff500000 generic-ehciP ,zusbhostj7ousbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ,zotgyhostj8 ousb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ,zotgyotg@@ j9 ousb2-phy disabledusb@ff5c0000 generic-ehci\ ,zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c,LYdefaultg:okaypmic@1brockchip,rk808&;Ydefaultg<=xin32krk808-clkout2>>>>>&>2?>@J@W>d@qAregulatorsDCDC_REG1~ qpvdd_arm?Eregulator-state-memDCDC_REG2~ Pvdd_gpuregulator-state-memB@DCDC_REG3~vcc_ddrregulator-state-memDCDC_REG4~2Z2Zvcc_io?@E@regulator-state-mem2ZLDO_REG1~2Z2Z vccio_pmu?AEAregulator-state-mem2ZLDO_REG2~2Z2Zvcc_tpregulator-state-memLDO_REG3~B@B@vdd_10regulator-state-memB@LDO_REG4~w@w@ vcc18_lcdregulator-state-memw@LDO_REG5~w@2Z vccio_sd?Eregulator-state-mem2ZLDO_REG6~B@B@ vdd10_lcdregulator-state-memB@LDO_REG7~w@w@vcc_18??E?regulator-state-memw@LDO_REG8~2Z2Z vcca_codecregulator-state-mem2ZSWITCH_REG1~vcc_wlregulator-state-memSWITCH_REG2~vcc_lcdregulator-state-memi2c@ff660000rockchip,rk3288-i2cf =zi2c,NYdefaultgB disabledpwm@ff680000rockchip,rk3288-pwmh0YdefaultgC,^zpwmokay?]E]pwm@ff680010rockchip,rk3288-pwmh0YdefaultgD,^zpwm disabledpwm@ff680020rockchip,rk3288-pwmh 0YdefaultgE,^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh00YdefaultgF,^zpwm disabledbus_intmem@ff700000 mmio-sramp Mpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds?Epower-controller!rockchip,rk3288-power-controller;1hA ?JEJpd_vio ,chgfdehilkjpd_hevc ,oppd_video ,pd_gpu ,syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv2OH1jk$\#gׄeрxhрxh?Esyscon@ff770000rockchip,rk3288-grfsysconw?2E2watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt,p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifq zhclkmclk,TGtx UYdefaultgH2 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s UGGtxrxzi2s_hclki2s_clk,RYdefaultgI disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 ,}zaclkhclksclkapb_pclk 9crypto-rstokayvop@ff930000rockchip,rk3288-vop ,zaclk_vopdclk_vophclk_vopJ def 9axiahbdclkKokayport? E endpoint@0L?TETendpoint@2M?QEQiommu@ff930300rockchip,iommu  vopb_mmuJ okay?KEKvop@ff940000rockchip,rk3288-vop ,zaclk_vopdclk_vophclk_vopJ  9axiahbdclkNokayport? E endpoint@0O?UEUendpoint@2P?RERiommu@ff940300rockchip,iommu  vopl_mmuJ okay?NENmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ S,~d zrefpclk2 disabledportsportendpoint@0Q?MEMendpoint@1R?PEPhdmi@ff980000rockchip,rk3288-dw-hdmi2 g,hm ziahbisfrJ okaySportsportendpoint@0T?LELendpoint@1U?OEOinterrupt-controller@ffc01000 arm,gic-400   @ `   ?Eefuse@ffb40000rockchip,rockchip-efuse ,q zpclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy2okayusb-phy0 ,]zphyclk?9E9usb-phy14,^zphyclk?7E7usb-phy2H,_zphyclk?8E8pinctrlrockchip,rk3288-pinctrl2Mgpio0@ff750000rockchip,gpio-banku Q,@&6 ?;E;gpio1@ff780000rockchip,gpio-bankx R,A&6 gpio2@ff790000rockchip,gpio-banky S,B&6 gpio3@ff7a0000rockchip,gpio-bankz T,C&6 gpio4@ff7b0000rockchip,gpio-bank{ U,D&6 ?4E4gpio5@ff7c0000rockchip,gpio-bank| V,E&6 gpio6@ff7d0000rockchip,gpio-bank} W,F&6 gpio7@ff7e0000rockchip,gpio-bank~ X,G&6 ?[E[gpio8@ff7f0000rockchip,gpio-bank Y,H&6 hdmihdmi-ddc BVVpcfg-pull-upP?WEWpcfg-pull-down]pcfg-pull-nonel?VEVpcfg-pull-none-12maly ?ZEZsleepglobal-pwroffBV?=E=ddrio-pwroffBVddr0-retentionBWddr1-retentionBWi2c0i2c0-xfer BVV?:E:i2c1i2c1-xfer BVV?#E#i2c2i2c2-xfer B V V?BEBi2c3i2c3-xfer BVV?$E$i2c4i2c4-xfer BVV?%E%i2c5i2c5-xfer BVV?&E&i2s0i2s0-bus`BVVVVVV?IEIsdmmcsdmmc-clkBX? E sdmmc-cmdBY? E sdmmc-cdBW?Esdmmc-bus1BWsdmmc-bus4@BYYYY?Esdmmc-pwrB V?aEasdio0sdio0-bus1BWsdio0-bus4@BWWWWsdio0-cmdBWsdio0-clkBVsdio0-cdBWsdio0-wpBWsdio0-pwrBWsdio0-bkpwrBWsdio0-intBWsdio1sdio1-bus1BWsdio1-bus4@BWWWWsdio1-cdBWsdio1-wpBWsdio1-bkpwrBWsdio1-intBWsdio1-cmdBWsdio1-clkBVsdio1-pwrB Wemmcemmc-clkBV?Eemmc-cmdBW?Eemmc-pwrB W?Eemmc-bus1BWemmc-bus4@BWWWWemmc-bus8BWWWWWWWW?Espi0spi0-clkB W?Espi0-cs0B W?Espi0-txBW?Espi0-rxBW?Espi0-cs1BWspi1spi1-clkB W?Espi1-cs0B W?Espi1-rxBW?Espi1-txBW?Espi2spi2-cs1BWspi2-clkBW?Espi2-cs0BW?"E"spi2-rxBW?!E!spi2-txB W? E uart0uart0-xfer BWV?'E'uart0-ctsBWuart0-rtsBVuart1uart1-xfer BW V?(E(uart1-ctsB Wuart1-rtsB Vuart2uart2-xfer BWV?)E)uart3uart3-xfer BWV?*E*uart3-ctsB Wuart3-rtsB Vuart4uart4-xfer B W V?+E+uart4-ctsBWuart4-rtsBVtsadcotp-gpioB V?0E0otp-outB V?1E1pwm0pwm0-pinBV?CECpwm1pwm1-pinBV?DEDpwm2pwm2-pinBV?EEEpwm3pwm3-pinBV?FEFgmacrgmii-pinsBVVVVZZZZVVV ZZVV?6E6rmii-pinsBVVVVVVVVVVspdifspdif-txB V?HEHpcfg-pull-none-drv-8may?XEXpcfg-pull-up-drv-8maPy?YEYbacklightbl-enBV?\E\buttonspwrbtnBW?^E^pmicpmic-intBW?<E<usbhost-vbus-drvBV?_E_eth_phyeth-phy-pwrBV?`E`backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ [Ydefaultg\]B@external-gmac-clock fixed-clocksY@ ext_gmac?5E5gpio-keys gpio-keysYdefaultg^button@0 ;tGPIO Key Powerdvcc-host-regulatorregulator-fixed ;Ydefaultg_ vcc_host~vcc-phy-regulatorregulator-fixed ;Ydefaultg`vcc_phy2Z2Z~?3E3vsys-regulatorregulator-fixedvcc_sysLK@LK@~?>E>sdmmc-regulatorregulator-fixed [ Ydefaultgavcc_sd2Z2Z(@?E #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplybroken-cdnon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmarockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthbrightness-levelsdefault-brightness-levelenable-gpiospwmsautorepeatlinux,codelabellinux,input-typedebounce-intervalenable-active-highstartup-delay-usvin-supply