'8(C'firefly,firefly-rk3288rockchip,rk3288&7Firefly-RK3288chosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkESKSreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @okay '8JU_defaultm wdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay JU_default mwdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay JU_defaultmwsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk  txrx ,_defaultm !"okayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk txrx -_defaultm#$%& disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclktxrx ._defaultm'()* disabledi2c@ff140000rockchip,rk3288-i2c >i2c2M_defaultm+okayi2c@ff150000rockchip,rk3288-i2c ?i2c2O_defaultm, disabledi2c@ff160000rockchip,rk3288-i2c @i2c2P_defaultm-okayi2c@ff170000rockchip,rk3288-i2c Ai2c2Q_defaultm.okayE_K_serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclk_default m/01okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclk_defaultm2okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclk_defaultm3okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclk_defaultm4okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclk_defaultm5 disabledthermal-zonesreserve_thermal6cpu_thermald6tripscpu_alert0 p,passiveE7K7cpu_alert1 $,passiveE8K8cpu_crit _, criticalcooling-mapsmap077 <map178 <gpu_thermald6tripsgpu_alert0 p,passiveE9K9gpu_crit _, criticalcooling-mapsmap079 <tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk Ktsadc-apb_initdefaultsleepm:W;a:ksokayE6K6ethernet@ff290000rockchip,rk3288-gmac) macirq<82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Kstmmacethok=input_defaultm>?@AB&rgmii/ E'B@ ZCj0susb@ff500000 generic-ehciP 2usbhost|Dusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost|E usb2-phyokay_defaultmFusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg@@ |G usb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2L_defaultmHokaysyr827@40silergy,syr827@vdd_cpu Pp)=O,k@EKsyr828@41silergy,syr828Avdd_gpu Pp)hym8563@51haoyu,hym8563Qxin32k&I_defaultmJact8846@5aactive-semi,act8846Z_defaultmKLMregulatorsREG1vcc_ddrOO)REG2vcc_io2Z2Z)EKREG3vdd_log)REG4vcc_20)EMKMREG5 vccio_sd2Z2Z)EKREG6 vdd10_lcdB@B@)REG7vcca_18w@w@REG8vcca_332Z2ZEiKiREG9vcc_lan2Z2ZEBKBREG10vdd_10B@B@)REG11vcc_18w@w@)EKREG12 vcc18_lcdw@w@)i2c@ff660000rockchip,rk3288-i2cf =i2c2N_defaultmNokaypwm@ff680000rockchip,rk3288-pwmh_defaultmO2^pwm disabledpwm@ff680010rockchip,rk3288-pwmh_defaultmP2^pwmokaypwm@ff680020rockchip,rk3288-pwmh _defaultmQ2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0_defaultmR2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh EVKVpd_vio 2chgfdehilkjpd_hevc 2oppd_video 2pd_gpu 2syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv<Hjk$#gׄeрxhрxhEKsyscon@ff770000rockchip,rk3288-grfsysconwE<K<watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif4 hclkmclk2TStx U_defaultmT< disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s USStxrxi2s_hclki2s_clk2R_defaultmUE` disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk Kcrypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopzV def KaxiahbdclkWokayportE K endpoint@0XE`K`endpoint@2YE]K]iommu@ff930300rockchip,iommu  vopb_mmuzV okayEWKWvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopzV  KaxiahbdclkZokayportE K endpoint@0[EaKaendpoint@2\E^K^iommu@ff940300rockchip,iommu  vopl_mmuzV okayEZKZmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ S2~d refpclk< disabledportsportendpoint@0]EYKYendpoint@1^E\K\hdmi@ff980000rockchip,rk3288-dw-hdmi< g2hm iahbisfrzV okay_portsportendpoint@0`EXKXendpoint@1aE[K[interrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy<okayusb-phy0 2]phyclkEGKGusb-phy142^phyclkEDKDusb-phy2H2_phyclkEEKEpinctrlrockchip,rk3288-pinctrl<Sgpio0@ff750000rockchip,gpio-banku Q2@ElKlgpio1@ff780000rockchip,gpio-bankx R2Agpio2@ff790000rockchip,gpio-banky S2Bgpio3@ff7a0000rockchip,gpio-bankz T2Cgpio4@ff7b0000rockchip,gpio-bank{ U2DECKCgpio5@ff7c0000rockchip,gpio-bank| V2Egpio6@ff7d0000rockchip,gpio-bank} W2Fgpio7@ff7e0000rockchip,gpio-bank~ X2GEIKIgpio8@ff7f0000rockchip,gpio-bank Y2HEnKnhdmihdmi-ddc bbpcfg-pull-upEcKcpcfg-pull-down pcfg-pull-none/EbKbpcfg-pull-none-12ma/< EdKdsleepglobal-pwroffbddrio-pwroffbddr0-retentioncddr1-retentionci2c0i2c0-xfer bbEHKHi2c1i2c1-xfer bbE+K+i2c2i2c2-xfer  b bENKNi2c3i2c3-xfer bbE,K,i2c4i2c4-xfer bbE-K-i2c5i2c5-xfer bbE.K.i2s0i2s0-bus`bbbbbbEUKUsdmmcsdmmc-clkdE K sdmmc-cmdeE K sdmmc-cdcEKsdmmc-bus1csdmmc-bus4@eeeeEKsdmmc-pwr bEqKqsdio0sdio0-bus1csdio0-bus4@ccccEKsdio0-cmdcEKsdio0-clkbEKsdio0-cdcsdio0-wpcsdio0-pwrcsdio0-bkpwrcsdio0-intcsdio1sdio1-bus1csdio1-bus4@ccccsdio1-cdcsdio1-wpcsdio1-bkpwrcsdio1-intcsdio1-cmdcsdio1-clkbsdio1-pwr cemmcemmc-clkbEKemmc-cmdcEKemmc-pwr cEKemmc-bus1cemmc-bus4@ccccemmc-bus8ccccccccEKspi0spi0-clk cEKspi0-cs0 cEKspi0-txcE K spi0-rxcE!K!spi0-cs1cE"K"spi1spi1-clk cE#K#spi1-cs0 cE&K&spi1-rxcE%K%spi1-txcE$K$spi2spi2-cs1cspi2-clkcE'K'spi2-cs0cE*K*spi2-rxcE)K)spi2-tx cE(K(uart0uart0-xfer cbE/K/uart0-ctscE0K0uart0-rtsbE1K1uart1uart1-xfer c bE2K2uart1-cts cuart1-rts buart2uart2-xfer cbE3K3uart3uart3-xfer cbE4K4uart3-cts cuart3-rts buart4uart4-xfer  c bE5K5uart4-ctscuart4-rtsbtsadcotp-gpio bE:K:otp-out bE;K;pwm0pwm0-pinbEOKOpwm1pwm1-pinbEPKPpwm2pwm2-pinbEQKQpwm3pwm3-pinbERKRgmacrgmii-pinsbbbbddddbbb ddbbE>K>rmii-pinsbbbbbbbbbbphy-int cEAKAphy-pmebcE@K@phy-rstfE?K?spdifspdif-tx bETKTpcfg-output-highKEfKfpcfg-output-lowWEgKgpcfg-pull-up-drv-12ma< EeKeact8846pwr-holdfELKLpmic-vselgEKKKdvpdvp-pwr bEuKuhym8563rtc-intcEJKJkeyspwr-keycEmKmledspower-ledbEpKpwork-ledbEoKousb_hosthost-vbus-drvbErKrusbhub-rstfEFKFusb_otgotg-vbus-drv bEtKtirir-intcEkKkdovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@hEjKjexternal-gmac-clock fixed-clocksY@ ext_gmacE=K=io-domains"rockchip,rk3288-io-voltage-domain<bioyjBir-receivergpio-ir-receiver_defaultmk Igpio-keys gpio-keysbutton@0 l GPIO Powert_defaultmmleds gpio-ledswork nfirefly:blue:user  rc-feedback_defaultmopower nfirefly:green:power  default-on_defaultmpvsys-regulatorregulator-fixedvcc_sysLK@LK@)=EKsdmmc-regulatorregulator-fixed eI _defaultmqvcc_sd2Z2ZEKflash-regulatorregulator-fixed vcc_flashw@w@EKusb-regulatorregulator-fixedvcc_5vLK@LK@)=EsKsusb-host-regulatorregulator-fixed0 el_defaultmr vcc_host_5vLK@LK@)susb-otg-regulatorregulator-fixed0 el _defaultmt vcc_otg_5vLK@LK@)svcc28-dvp-regulatorregulator-fixed0 el _defaultmu vcc28_dvp**)EhKh #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplybroken-cdnon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supplygpioswakeup-sourcelabellinux,codelinux,default-triggerstartup-delay-usenable-active-high