48,( google,veyron-jaq-rev5google,veyron-jaq-rev4google,veyron-jaq-rev3google,veyron-jaq-rev2google,veyron-jaq-rev1google,veyron-jaqgoogle,veyronrockchip,rk3288& 7Google Jaqchosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelmemorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12` @p@ @OOa sB@ ~ ' 9  K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkKNQNreserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @okay-> P YZw defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @okay- *wdefault dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@okayY8*wdefault saradc@ff100000rockchip,saradc $G8I[saradcapb_pclk disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclkY  ^txrx ,default !"okayec@0google,cros-ec-spih& default#-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclkY ^txrx -default$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclkY^txrx .default()*+okay i2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault,okay/2Gdtpm@20infineon,slb9645tt ^i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault.okay/2G,trackpad@15elan,ekth3000& default/v0i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault1okay/,GKZQZserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 234okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault5okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault6okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault7 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault8 disabledthermal-zonesreserve_thermal9cpu_thermald9tripscpu_alert0p passiveK:Q:cpu_alert1$ passiveK;Q;cpu_crit_  criticalcooling-mapsmap0: map1; gpu_thermald9tripsgpu_alert0p passiveK<Q<gpu_crit_  criticalcooling-mapsmap0< tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk *tsadc-apbinitdefaultsleep=6>@=J`sokaywK9Q9ethernet@ff290000rockchip,rk3288-gmac) macirq?88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB *stmmaceth disabledusb@ff500000 generic-ehciP 8usbhost@usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostA usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost@@ #B usb2-phyokayz-Busb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultCokay/2Gdpmic@1brockchip,rk808xin32kwifibt_32kin&Ddefault EFGDeq}H0HH KmQmregulatorsDCDC_REG1vdd_arm+ qC [qKQregulator-state-mempDCDC_REG2vdd_gpu+ 5C[qregulator-state-memB@DCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18+w@Cw@KQregulator-state-memw@LDO_REG1 vcc33_io+2ZC2ZK0Q0regulator-state-mem2ZLDO_REG3vdd_10+B@CB@regulator-state-memB@LDO_REG7vdd10_lcd_pwren_h+&%C&%regulator-state-mempSWITCH_REG1 vcc33_lcdKlQlregulator-state-mempLDO_REG4 vccio_sd+w@C2ZKQregulator-state-mempLDO_REG5 vcc33_sd+2ZC2ZK Q regulator-state-mempLDO_REG8 vcc33_ccd+2ZC2Zregulator-state-mem2ZLDO_REG2mic_vcc+w@Cw@regulator-state-mempi2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultIokay/2G pwm@ff680000rockchip,rk3288-pwmhdefaultJ8^pwm disabledpwm@ff680010rockchip,rk3288-pwmhdefaultK8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultL8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultM8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh- KQQQpd_vio 8chgfdehilkjpd_hevc 8oppd_video 8pd_gpu 8syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv?Hjk$#gׄeрxhрxhKQsyscon@ff770000rockchip,rk3288-grfsysconwK?Q?watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8TYN^tx UdefaultO? disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s UYNN^txrxi2s_hclki2s_clk8RdefaultP disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk *crypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop/Q def *axiahbdclk=RokayportK Q endpoint@0DSK[Q[endpoint@2DTKXQXiommu@ff930300rockchip,iommu  vopb_mmu/Q TokayKRQRvop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop/Q  *axiahbdclk=U disabledportK Q endpoint@0DVK\Q\endpoint@2DWKYQYiommu@ff940300rockchip,iommu  vopl_mmu/Q T disabledKUQUmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ S8~d refpclk? disabledportsportendpoint@0DXKTQTendpoint@1DYKWQWhdmi@ff980000rockchip,rk3288-dw-hdmi? g8hm iahbisfr/Q okayaZportsportendpoint@0D[KSQSendpoint@1D\KVQVinterrupt-controller@ffc01000 arm,gic-400m  @ `   KQefuse@ffb40000rockchip,rockchip-efuse 8q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy?okayusb-phy0 8]phyclkKBQBusb-phy148^phyclkK@Q@usb-phy2H8_phyclkKAQApinctrlrockchip,rk3288-pinctrl?Ydefaultsleep]^6]_gpio0@ff750000rockchip,gpio-banku Q8@mKDQDgpio1@ff780000rockchip,gpio-bankx R8Amgpio2@ff790000rockchip,gpio-banky S8BmKkQkgpio3@ff7a0000rockchip,gpio-bankz T8Cmgpio4@ff7b0000rockchip,gpio-bank{ U8DmKpQpgpio5@ff7c0000rockchip,gpio-bank| V8EmKsQsgpio6@ff7d0000rockchip,gpio-bank} W8Fmgpio7@ff7e0000rockchip,gpio-bank~ X8GmK Q gpio8@ff7f0000rockchip,gpio-bank Y8Hmhdmihdmi-ddc ``vcc50-hdmi-en`KtQtpcfg-pull-upKaQapcfg-pull-downKdQdpcfg-pull-noneK`Q`pcfg-pull-none-12ma KcQcsleepglobal-pwroff`K]Q]ddrio-pwroff`ddr0-retentionaddr1-retentionai2c0i2c0-xfer ``KCQCi2c1i2c1-xfer ``K,Q,i2c2i2c2-xfer  ` `KIQIi2c3i2c3-xfer ``K-Q-i2c4i2c4-xfer ``K.Q.i2c5i2c5-xfer ``K1Q1i2s0i2s0-bus```````KPQPsdmmcsdmmc-clkbKQsdmmc-cmdbKQsdmmc-cdasdmmc-bus1asdmmc-bus4@bbbbKQsdmmc-cd-disabled`KQsdmmc-cd-gpio`KQsdio0sdio0-bus1asdio0-bus4@bbbbKQsdio0-cmdbKQsdio0-clkbKQsdio0-cdasdio0-wpasdio0-pwrasdio0-bkpwrasdio0-intawifienable-h`KoQobt-enable-l`KnQnsdio1sdio1-bus1asdio1-bus4@aaaasdio1-cdasdio1-wpasdio1-bkpwrasdio1-intasdio1-cmdasdio1-clk`sdio1-pwr aemmcemmc-clkbKQemmc-cmdbKQemmc-pwr aemmc-bus1aemmc-bus4@aaaaemmc-bus8bbbbbbbbKQemmc-reset `KjQjspi0spi0-clk aKQspi0-cs0 aK"Q"spi0-txaK Q spi0-rxaK!Q!spi0-cs1aspi1spi1-clk aK$Q$spi1-cs0 aK'Q'spi1-rxaK&Q&spi1-txaK%Q%spi2spi2-cs1aspi2-clkaK(Q(spi2-cs0aK+Q+spi2-rxaK*Q*spi2-tx aK)Q)uart0uart0-xfer a`K2Q2uart0-ctsaK3Q3uart0-rts`K4Q4uart1uart1-xfer a `K5Q5uart1-cts auart1-rts `uart2uart2-xfer a`K6Q6uart3uart3-xfer a`K7Q7uart3-cts auart3-rts `uart4uart4-xfer  a `K8Q8uart4-ctsauart4-rts`tsadcotp-gpio `K=Q=otp-out `K>Q>pwm0pwm0-pin`KJQJpwm1pwm1-pin`KKQKpwm2pwm2-pin`KLQLpwm3pwm3-pin`KMQMgmacrgmii-pins````cccc``` cc``rmii-pins``````````spdifspdif-tx `KOQOpcfg-pull-none-drv-8maKbQbpcfg-pull-up-drv-8mapcfg-output-high KfQfpcfg-output-low KeQebuttonspwr-key-laKgQgap-lid-int-laKhQhpmicpmic-int-laKEQEdvs-1 dKFQFdvs-2dKGQGrebootap-warm-reset-h `KiQirecovery-switchrec-mode-l atpmtpm-int-h`write-protectfw-wp-ap`chargerac-present-apaKuQucros-ecec-int`K#Q#suspendsuspend-l-wakeeK^Q^suspend-l-sleepfK_Q_trackpadtrackpad-intaK/Q/usb-hosthost1-pwr-en `KvQvusbotg-pwren-h `KwQwbacklightbl_pwr_en `KzQzbuck-5vdrv-5v`KrQredpedp_hpd dlcdlcd-en`KxQxavdd-1v8-disp-en `KyQygpio-keys gpio-keysdefaultghpower Power SD t (dlid Lid SD  : (gpio-restart gpio-restart SD defaulti Kemmc-pwrseqmmc-pwrseq-emmcjdefault Tk KQio-domains"rockchip,rk3288-io-voltage-domain? `0 j u 0 0 l  sdio-pwrseqmmc-pwrseq-simple8m ext_clockdefaultno TpKQvcc-5vregulator-fixedvcc_5v+LK@CLK@ q  defaultrKHQHvcc33-sysregulator-fixed vcc33_sys+2ZC2Z qKQvcc50-hdmiregulator-fixed vcc50_hdmi H  sdefaulttgpio-charger gpio-charger mains SDdefaultuvccsysregulator-fixedvccsysKqQqvcc5-host1-regulatorregulator-fixed  D defaultv vcc5_host1vcc5v-otg-regulatorregulator-fixed  D defaultw vcc5_host2panel-regulatorregulator-fixed  defaultxpanel_regulator vcc18-lcdregulator-fixed  k defaulty vcc18_lcd backlight-regulatorregulator-fixed  k defaultzbacklight_regulator  : #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0broken-cdcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cells#reset-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplysdcard-supplyvin-supplyenable-active-highgpiocharger-typestartup-delay-us