Ð þí@s8=(o<ÌAltera SOCFPGA VT!altr,socfpga-vtaltr,socfpgachosen,console=ttyS0,57600aliases5/soc/ethernet@ff700000?/soc/ethernet@ff702000I/soc/serial0@ffc02000Q/soc/serial1@ffc03000Y/soc/timer0@ffc08000`/soc/timer1@ffc09000g/soc/timer2@ffd00000n/soc/timer3@ffd01000memoryumemory@cpus…altr,socfpga-smpcpu@0!arm,cortex-a9ucpu“cpu@1!arm,cortex-a9ucpu“intc@fffed000!arm,cortex-a9-gic¤µÿþÐÿþÁÊÐsoc !simple-bususocØéamba !simple-busépdma@ffe01000!arm,pl330arm,primecellÿà`ðhijklmnoû " )apb_pclkÊ)Ð)can@ffc00000 !bosch,d_canÿÀ0ðƒ„…†" 5disabledcan@ffc01000 !bosch,d_canÿÀ0ð‡ˆ‰Š" 5disabledclkmgr@ffd04000 !altr,clk-mgrÿÐ@clocksosc1< !fixed-clockI˜–€ÊÐosc2< !fixed-clockÊÐf2s_periph_ref_clk< !fixed-clockÊ Ð f2s_sdram_ref_clk< !fixed-clockÊ Ð main_pll<!altr,socfpga-pll-clock"@ÊÐmpuclk<!altr,socfpga-perip-clk" Yà HÊ Ð mainclk<!altr,socfpga-perip-clk" Yä LÊÐdbg_base_clk<!altr,socfpga-perip-clk" Yè PÊÐmain_qspi_clk<!altr,socfpga-perip-clk"TÊÐmain_nand_sdmmc_clk<!altr,socfpga-perip-clk"XÊÐcfg_h2f_usr0_clk<!altr,socfpga-perip-clk"\ÊÐperiph_pll<!altr,socfpga-pll-clock " €Ê Ð emac0_clk<!altr,socfpga-perip-clk" ˆÊÐemac1_clk<!altr,socfpga-perip-clk" ŒÊÐper_qsi_clk<!altr,socfpga-perip-clk" ÊÐper_nand_mmc_clk<!altr,socfpga-perip-clk" ”ÊÐper_base_clk<!altr,socfpga-perip-clk" ˜ÊÐh2f_usr1_clk<!altr,socfpga-perip-clk" œÊÐsdram_pll<!altr,socfpga-pll-clock " ÀÊ Ð ddr_dqs_clk<!altr,socfpga-perip-clk" ÈÊÐddr_2x_dqs_clk<!altr,socfpga-perip-clk" ÌÊÐddr_dq_clk<!altr,socfpga-perip-clk" ÐÊÐh2f_usr2_clk<!altr,socfpga-perip-clk" ÔÊÐmpu_periph_clk<!altr,socfpga-perip-clk" aÊ(Ð(mpu_l2_ram_clk<!altr,socfpga-perip-clk" al4_main_clk<!altr,socfpga-gate-clk"o`ÊÐl3_main_clk<!altr,socfpga-perip-clk"al3_mp_clk<!altr,socfpga-gate-clk" Ydo`ÊÐl3_sp_clk<!altr,socfpga-gate-clk" Ydl4_mp_clk<!altr,socfpga-gate-clk" Ydo`Ê"Ð"l4_sp_clk<!altr,socfpga-gate-clk" Ydo`Ê#Ð#dbg_at_clk<!altr,socfpga-gate-clk" Yho`ÊÐdbg_clk<!altr,socfpga-gate-clk" Yho`dbg_trace_clk<!altr,socfpga-gate-clk" Ylo`dbg_timer_clk<!altr,socfpga-gate-clk"o`cfg_clk<!altr,socfpga-gate-clk"o`h2f_user0_clk<!altr,socfpga-gate-clk"o` emac_0_clk<!altr,socfpga-gate-clk"o emac_1_clk<!altr,socfpga-gate-clk"o usb_mp_clk<!altr,socfpga-gate-clk"o  Y¤Ê*Ð*spi_m_clk<!altr,socfpga-gate-clk"o  Y¤Ê'Ð'can0_clk<!altr,socfpga-gate-clk"o  Y¤ÊÐcan1_clk<!altr,socfpga-gate-clk"o  Y¤ ÊÐgpio_db_clk<!altr,socfpga-gate-clk"o  Y¨h2f_user1_clk<!altr,socfpga-gate-clk"o sdmmc_clk<!altr,socfpga-gate-clk " o x‡ÊÐsdmmc_clk_divided<!altr,socfpga-gate-clk"o aÊ%Ð%nand_x_clk<!altr,socfpga-gate-clk " o  nand_clk<!altr,socfpga-gate-clk " o  aqspi_clk<!altr,socfpga-gate-clk " o  ddr_dqs_clk_gate<!altr,socfpga-gate-clk"oØddr_2x_dqs_clk_gate<!altr,socfpga-gate-clk"oØddr_dq_clk_gate<!altr,socfpga-gate-clk"oØh2f_user2_clk<!altr,socfpga-gate-clk"oØfpgamgr@ff706000!altr,socfpga-fpga-mgrÿp`ÿ¹ ð¯ethernet@ff7000000!altr,socfpga-stmmacsnps,dwmac-3.70asnps,dwmac ‚ `ÿp  ðs•macirq¥" )stmmaceth±!  ¸stmmacethÄ߀û 5okaygmiiethernet@ff7020000!altr,socfpga-stmmacsnps,dwmac-3.70asnps,dwmac ‚ `ÿp  ðx•macirq¥" )stmmaceth±!! ¸stmmacethÄ߀û  5disabledgpio@ff708000!snps,dw-apb-gpioÿp€"" 5disabledgpio-controller@0!snps,dw-apb-gpio-port 0<µ¤ ð¤gpio@ff709000!snps,dw-apb-gpioÿp"" 5disabledgpio-controller@0!snps,dw-apb-gpio-port 0<µ¤ ð¥gpio@ff70a000!snps,dw-apb-gpioÿp "" 5disabledgpio-controller@0!snps,dw-apb-gpio-port 0<µ¤ ð¦i2c@ffc04000!snps,designware-i2cÿÀ@"# ðž 5disabledi2c@ffc05000!snps,designware-i2cÿÀP"# ðŸ 5disabledi2c@ffc06000!snps,designware-i2cÿÀ`"# ð  5disabledi2c@ffc07000!snps,designware-i2cÿÀp"# ð¡ 5disabledeccmgr@ffd08140!altr,socfpga-ecc-managerél2-ecc@ffd08140!altr,socfpga-l2-eccÿÐ@ð$%ocram-ecc@ffd08144!altr,socfpga-ocram-eccÿÐDJ$ð²³l2-cache@fffef000!arm,pl310-cacheÿþð ð&O] i yŠ˜ÊÐdwmmc0@ff704000!altr,socfpga-dw-mshcÿp@ ð‹þ""%)biuciu 5disabled§±»Å×sram@ffff0000 !mmio-sramÿÿÊ$Ð$rstmgr@ffd05000è !altr,rst-mgrÿÐPõÊ!Ð!snoop-control-unit@fffec000!arm,cortex-a9-scuÿþÀsdr@ffc25000!sysconÿÂPÊ&Ð&sdramedac!altr,sdram-edac& ð'spi@fff00000!snps,dw-apb-ssiÿð ðš"' 5disabledspi@fff01000!snps,dw-apb-ssiÿð ð›"' 5disabledsysmgr@ffd08000!altr,sys-mgrsysconÿЀ@ÿЀÊ Ð timer@fffec600!arm,cortex-a9-twd-timerÿþÆ ð "(timer0@ffc08000!snps,dw-apb-timer ð§ÿÀ€"#)timerIjÏÀtimer1@ffc09000!snps,dw-apb-timer ð¨ÿÀ"#)timerIjÏÀtimer2@ffd00000!snps,dw-apb-timer ð©ÿÐ")timerIjÏÀtimer3@ffd01000!snps,dw-apb-timer ðªÿÐ")timerIjÏÀserial0@ffc02000!snps,dw-apb-uartÿÀ  ð¢/9"#F))KtxrxIp€serial1@ffc03000!snps,dw-apb-uartÿÀ0 ð£/9"#F))KtxrxIp€usbphy@0U!usb-nop-xceiv5okayÊ+Ð+usb@ffb00000 !snps,dwc2ÿ°ÿÿ ð}"*)otg`+ eusb2-phy 5disabledusb@ffb40000 !snps,dwc2ÿ´ÿÿ ð€"*)otg`+ eusb2-phy 5disabledwatchdog@ffd02000 !snps,dw-wdtÿÐ  ð«" 5disabledwatchdog@ffd03000 !snps,dw-wdtÿÐ0 ð¬" 5disabled #address-cells#size-cellsmodelcompatiblebootargsethernet0ethernet1serial0serial1timer0timer1timer2timer3device_typeregenable-methodnext-level-cache#interrupt-cellsinterrupt-controllerlinux,phandleinterrupt-parentrangesinterrupts#dma-cells#dma-channels#dma-requestsclocksclock-namesstatus#clock-cellsclock-frequencydiv-regfixed-dividerclk-gateclk-phasealtr,sysmgr-sysconinterrupt-namesmac-addressresetsreset-namessnps,multicast-filter-binssnps,perfect-filter-entriestx-fifo-depthrx-fifo-depthphy-modegpio-controller#gpio-cellssnps,nr-gpiosiramcache-unifiedcache-levelarm,tag-latencyarm,data-latencyprefetch-dataprefetch-instrnum-slotsbroken-cdbus-widthcap-mmc-highspeedcap-sd-highspeed#reset-cellsaltr,modrst-offsetaltr,sdr-sysconnum-cscpu1-start-addrreg-shiftreg-io-widthdmasdma-names#phy-cellsphysphy-names