B87( 7L;compulab,cl-som-am57xti,am5728ti,dra742ti,dra74ti,dra7&7CompuLab CL-SOM-AM57xchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000memorymemory timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-bus&l3_main_1l3_main_2 DE - l4@4a000000ti,dra7-l4-cfgsimple-bus &J"scm@2000ti,dra7-scm-coresimple-bus  & scm_conf@0sysconsimple-bus &pbias_regulator@e00ti,pbias-dra7ti,pbias-omapApbias_mmc_omap5Hpbias_mmc_omap5Ww@o-clocksdss_deshdcp_clk@558ti,gate-clockXehrpwm0_tbclk@558ti,gate-clockXehrpwm1_tbclk@558ti,gate-clockXehrpwm2_tbclk@558ti,gate-clockXsys_32k_ck ti,mux-clockIIpinmux@1400ti,dra7-padconfpinctrl-singleh ?leds_pins_default|i2c1_pins_defaulti2c3_pins_default  i2c4_pins_default  tps659038_pins_defaultmmc2_pins_defaultPpinmux_qspi1_pins0tcpsw_pins_defaultPTX\`dhlptx|cpsw_pins_sleepPTX\`dhlptx|davinci_mdio_pins_defaultdavinci_mdio_pins_sleeppinmux_ads7846_pinsdmcasp3_pins_default $(,0mcasp3_pins_sleep $(,0scm_conf@1c04syscon scm_conf@1c24syscon$$dma-router@b78ti,dra7-dma-crossbar x dma-router@c78ti,dra7-dma-crossbar x| cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ckti,dra7-atl-clock <<atl_clkin1_ckti,dra7-atl-clock ;;atl_clkin2_ckti,dra7-atl-clock ::atl_clkin3_ckti,dra7-atl-clock 99hdmi_clkin_ck fixed-clock+**mlb_clkin_ck fixed-clock+mlbp_clkin_ck fixed-clock+pciesref_acs_clk_ck fixed-clock+SSref_clkin0_ck fixed-clock+>>ref_clkin1_ck fixed-clock+??ref_clkin2_ck fixed-clock+@@ref_clkin3_ck fixed-clock+AArmii_clk_ck fixed-clock+sdvenc_clkin_ck fixed-clock+secure_32k_clk_src_ck fixed-clock+sys_clk32_crystal_ck fixed-clock+sys_clk32_pseudo_ckfixed-factor-clock ;Fbvirt_12000000_ck fixed-clock+wwvirt_13000000_ck fixed-clock+]@virt_16800000_ck fixed-clock+Yyyvirt_19200000_ck fixed-clock+$zzvirt_20000000_ck fixed-clock+1-xxvirt_26000000_ck fixed-clock+{{virt_27000000_ck fixed-clock+||virt_38400000_ck fixed-clock+I}}sys_clkin2 fixed-clock+X==usb_otg_clkin_ck fixed-clock+video1_clkin_ck fixed-clock+33video1_m2_clkin_ck fixed-clock+))video2_clkin_ck fixed-clock+44video2_m2_clkin_ck fixed-clock+((dpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock dpll_abe_x2_ckti,omap4-dpll-x2-clockdpll_abe_m2x2_ck@1f0ti,divider-clockP[mabe_clk@108ti,divider-clockPdpll_abe_m2_ck@1f0ti,divider-clockP[mhhdpll_abe_m3x2_ck@1f4ti,divider-clockP[mdpll_core_byp_mux@12c ti,mux-clock ,dpll_core_ck@120ti,omap4-dpll-core-clock  $,(dpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_h12x2_ck@13cti,divider-clockP?[<mmpu_dpll_hs_clk_divfixed-factor-clock;Fdpll_mpu_ck@160ti,omap5-mpu-dpll-clock `dlhdpll_mpu_m2_ck@170ti,divider-clockP[pmmpu_dclk_divfixed-factor-clock;Fdsp_dpll_hs_clk_divfixed-factor-clock;Fdpll_dsp_byp_mux@240 ti,mux-clock @dpll_dsp_ck@234ti,omap4-dpll-clock 48@<dpll_dsp_m2_ck@244ti,divider-clockP[Dmiva_dpll_hs_clk_divfixed-factor-clock;Fdpll_iva_byp_mux@1ac ti,mux-clock dpll_iva_ck@1a0ti,omap4-dpll-clock dpll_iva_m2_ck@1b0ti,divider-clockP[m  iva_dclkfixed-factor-clock ;Fdpll_gpu_byp_mux@2e4 ti,mux-clock !!dpll_gpu_ck@2d8ti,omap4-dpll-clock !""dpll_gpu_m2_ck@2e8ti,divider-clock"P[mmmdpll_core_m2_ck@130ti,divider-clockP[0m##core_dpll_out_dclk_divfixed-factor-clock#;Fdpll_ddr_byp_mux@21c ti,mux-clock $$dpll_ddr_ck@210ti,omap4-dpll-clock $%%dpll_ddr_m2_ck@220ti,divider-clock%P[ mdpll_gmac_byp_mux@2b4 ti,mux-clock &&dpll_gmac_ck@2a8ti,omap4-dpll-clock &''dpll_gmac_m2_ck@2b8ti,divider-clock'P[mjjvideo2_dclk_divfixed-factor-clock(;Fvideo1_dclk_divfixed-factor-clock);Fhdmi_dclk_divfixed-factor-clock*;Fper_dpll_hs_clk_divfixed-factor-clock;FWWusb_dpll_hs_clk_divfixed-factor-clock;F[[eve_dpll_hs_clk_divfixed-factor-clock;F++dpll_eve_byp_mux@290 ti,mux-clock +,,dpll_eve_ck@284ti,omap4-dpll-clock ,--dpll_eve_m2_ck@294ti,divider-clock-P[m..eve_dclk_divfixed-factor-clock.;Fdpll_core_h13x2_ck@140ti,divider-clockP?[@mdpll_core_h14x2_ck@144ti,divider-clockP?[Dmkkdpll_core_h22x2_ck@154ti,divider-clockP?[Tm55dpll_core_h23x2_ck@158ti,divider-clockP?[Xmvvdpll_core_h24x2_ck@15cti,divider-clockP?[\mdpll_ddr_x2_ckti,omap4-dpll-x2-clock%//dpll_ddr_h11x2_ck@228ti,divider-clock/P?[(mdpll_dsp_x2_ckti,omap4-dpll-x2-clock00dpll_dsp_m3x2_ck@248ti,divider-clock0P[Hmdpll_gmac_x2_ckti,omap4-dpll-x2-clock'11dpll_gmac_h11x2_ck@2c0ti,divider-clock1P?[m22dpll_gmac_h12x2_ck@2c4ti,divider-clock1P?[mdpll_gmac_h13x2_ck@2c8ti,divider-clock1P?[mdpll_gmac_m3x2_ck@2bcti,divider-clock1P[mgmii_m_clk_divfixed-factor-clock2;Fhdmi_clk2_divfixed-factor-clock*;FGGhdmi_div_clkfixed-factor-clock*;FMMl3_iclk_div@100ti,divider-clockPl4_root_clk_divfixed-factor-clock;Fvideo1_clk2_divfixed-factor-clock3;FEEvideo1_div_clkfixed-factor-clock3;FKKvideo2_clk2_divfixed-factor-clock4;FFFvideo2_div_clkfixed-factor-clock4;FLLipu1_gfclk_mux@520 ti,mux-clock5 mcasp1_ahclkr_mux@550 ti,mux-clock86789:;<=>?@ABCPmcasp1_ahclkx_mux@550 ti,mux-clock86789:;<=>?@ABCPmcasp1_aux_gfclk_mux@550 ti,mux-clockDEFGPtimer5_gfclk_mux@558 ti,mux-clock0HI=>?@AJKLMNXtimer6_gfclk_mux@560 ti,mux-clock0HI=>?@AJKLMN`timer7_gfclk_mux@568 ti,mux-clock0HI=>?@AJKLMNhtimer8_gfclk_mux@570 ti,mux-clock0HI=>?@AJKLMNpuart6_gfclk_mux@580 ti,mux-clockOPdummy_ck fixed-clock+clockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200ti,omap4-dpll-clock  QQdpll_pcie_ref_m2ldo_ck@210ti,divider-clockQP[mRRapll_pcie_in_clk_mux@4ae06118 ti,mux-clockRSTTapll_pcie_ck@21cti,dra7-apll-clockTQ UUoptfclk_pciephy1_32khz@4a0093b0ti,gate-clockIoptfclk_pciephy2_32khz@4a0093b8ti,gate-clockIoptfclk_pciephy_div@4a00821cti,divider-clockUPVVoptfclk_pciephy1_clk@4a0093b0ti,gate-clockU optfclk_pciephy2_clk@4a0093b8ti,gate-clockU optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockV optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockV apll_pcie_clkvcoldofixed-factor-clockU;Fapll_pcie_clkvcoldo_divfixed-factor-clockU;Fapll_pcie_m2_ckfixed-factor-clockU;Fdpll_per_byp_mux@14c ti,mux-clock WLXXdpll_per_ck@140ti,omap4-dpll-clock X@DLHYYdpll_per_m2_ck@150ti,divider-clockYP[PmZZfunc_96m_aon_dclk_divfixed-factor-clockZ;Fdpll_usb_byp_mux@18c ti,mux-clock [\\dpll_usb_ck@180ti,omap4-dpll-j-type-clock \]]dpll_usb_m2_ck@190ti,divider-clock]P[m``dpll_pcie_ref_m2_ck@210ti,divider-clockQP[mdpll_per_x2_ckti,omap4-dpll-x2-clockY^^dpll_per_h11x2_ck@158ti,divider-clock^P?[Xm__dpll_per_h12x2_ck@15cti,divider-clock^P?[\mccdpll_per_h13x2_ck@160ti,divider-clock^P?[`mttdpll_per_h14x2_ck@164ti,divider-clock^P?[dmlldpll_per_m2x2_ck@150ti,divider-clock^P[PmPPdpll_usb_clkdcoldofixed-factor-clock];Fbbfunc_128m_clkfixed-factor-clock_;Foofunc_12m_fclkfixed-factor-clockP;Ffunc_24m_clkfixed-factor-clockZ;F88func_48m_fclkfixed-factor-clockP;FOOfunc_96m_fclkfixed-factor-clockP;Fl3init_60m_fclk@104ti,divider-clock`clkout2_clk@6b0ti,gate-clockal3init_960m_gfclk@6c0ti,gate-clockbggdss_32khz_clk@1120ti,gate-clockI  dss_48mhz_clk@1120ti,gate-clockO  dss_dss_clk@1120ti,gate-clockc dss_hdmi_clk@1120ti,gate-clockd  dss_video1_clk@1120ti,gate-clocke  dss_video2_clk@1120ti,gate-clockf  gpio2_dbclk@1760ti,gate-clockI`gpio3_dbclk@1768ti,gate-clockIhgpio4_dbclk@1770ti,gate-clockIpgpio5_dbclk@1778ti,gate-clockIxgpio6_dbclk@1780ti,gate-clockIgpio7_dbclk@1810ti,gate-clockIgpio8_dbclk@1818ti,gate-clockImmc1_clk32k@1328ti,gate-clockI(mmc2_clk32k@1330ti,gate-clockI0mmc3_clk32k@1820ti,gate-clockI mmc4_clk32k@1828ti,gate-clockI(sata_ref_clk@1388ti,gate-clock usb_otg_ss1_refclk960m@13f0ti,gate-clockgusb_otg_ss2_refclk960m@1340ti,gate-clockg@usb_phy1_always_on_clk32k@640ti,gate-clockI@usb_phy2_always_on_clk32k@688ti,gate-clockIusb_phy3_always_on_clk32k@698ti,gate-clockIatl_dpll_clk_mux@c00 ti,mux-clockI34* iiatl_gfclk_mux@c00 ti,mux-clock hi   gmac_gmii_ref_clk_div@13d0ti,divider-clockjgmac_rft_clk_mux@13d0 ti,mux-clock34h*gpu_core_gclk_mux@1220 ti,mux-clock klm gpu_hyd_gclk_mux@1220 ti,mux-clock klm l3instr_ts_gclk_div@e50ti,divider-clocknP  mcasp2_ahclkr_mux@1860 ti,mux-clock86789:;<=>?@ABC`mcasp2_ahclkx_mux@1860 ti,mux-clock86789:;<=>?@ABC`mcasp2_aux_gfclk_mux@1860 ti,mux-clockDEFG`mcasp3_ahclkx_mux@1868 ti,mux-clock86789:;<=>?@ABChmcasp3_aux_gfclk_mux@1868 ti,mux-clockDEFGhmcasp4_ahclkx_mux@1898 ti,mux-clock86789:;<=>?@ABCmcasp4_aux_gfclk_mux@1898 ti,mux-clockDEFGmcasp5_ahclkx_mux@1878 ti,mux-clock86789:;<=>?@ABCxmcasp5_aux_gfclk_mux@1878 ti,mux-clockDEFGxmcasp6_ahclkx_mux@1904 ti,mux-clock86789:;<=>?@ABCmcasp6_aux_gfclk_mux@1904 ti,mux-clockDEFGmcasp7_ahclkx_mux@1908 ti,mux-clock86789:;<=>?@ABCmcasp7_aux_gfclk_mux@1908 ti,mux-clockDEFGmcasp8_ahclkx_mux@1890 ti,mux-clock86789:;<=>?@ABCmcasp8_aux_gfclk_mux@1890 ti,mux-clockDEFGmmc1_fclk_mux@1328 ti,mux-clockoP(ppmmc1_fclk_div@1328ti,divider-clockpP(mmc2_fclk_mux@1330 ti,mux-clockoP0qqmmc2_fclk_div@1330ti,divider-clockqP0mmc3_gfclk_mux@1820 ti,mux-clockOP rrmmc3_gfclk_div@1820ti,divider-clockrP mmc4_gfclk_mux@1828 ti,mux-clockOP(ssmmc4_gfclk_div@1828ti,divider-clocksP(qspi_gfclk_mux@1838 ti,mux-clockot8uuqspi_gfclk_div@1838ti,divider-clockuP8timer10_gfclk_mux@1728 ti,mux-clock,HI=>?@AJKLM(timer11_gfclk_mux@1730 ti,mux-clock,HI=>?@AJKLM0timer13_gfclk_mux@17c8 ti,mux-clock,HI=>?@AJKLMtimer14_gfclk_mux@17d0 ti,mux-clock,HI=>?@AJKLMtimer15_gfclk_mux@17d8 ti,mux-clock,HI=>?@AJKLMtimer16_gfclk_mux@1830 ti,mux-clock,HI=>?@AJKLM0timer2_gfclk_mux@1738 ti,mux-clock,HI=>?@AJKLM8timer3_gfclk_mux@1740 ti,mux-clock,HI=>?@AJKLM@timer4_gfclk_mux@1748 ti,mux-clock,HI=>?@AJKLMHtimer9_gfclk_mux@1750 ti,mux-clock,HI=>?@AJKLMPuart1_gfclk_mux@1840 ti,mux-clockOP@uart2_gfclk_mux@1848 ti,mux-clockOPHuart3_gfclk_mux@1850 ti,mux-clockOPPuart4_gfclk_mux@1858 ti,mux-clockOPXuart5_gfclk_mux@1870 ti,mux-clockOPpuart7_gfclk_mux@18d0 ti,mux-clockOPuart8_gfclk_mux@18e0 ti,mux-clockOPuart9_gfclk_mux@18e8 ti,mux-clockOPvip1_gclk_mux@1020 ti,mux-clockv vip2_gclk_mux@1028 ti,mux-clockv(vip3_gclk_mux@1030 ti,mux-clockv0clockdomainscoreaon_clkdmti,clockdomain]l4@4ae00000ti,dra7-l4-wkupsimple-bus &Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110 ti,mux-clockwxyz{|}m  abe_dpll_sys_clk_mux@118 ti,mux-clock =~~abe_dpll_bypass_clk_mux@114 ti,mux-clock~Iabe_dpll_clk_mux@10c ti,mux-clock~I   abe_24m_fclk@11cti,divider-clock66aess_fclk@178ti,divider-clockxPabe_giclk_div@174ti,divider-clocktPJJabe_lp_clk_div@1d8ti,divider-clock abe_sys_clk_div@120ti,divider-clock  P77adc_gfclk_mux@1dc ti,mux-clock  =Isys_clk1_dclk_div@1c8ti,divider-clock P@sys_clk2_dclk_div@1ccti,divider-clock=P@per_abe_x1_dclk_div@1bcti,divider-clockhP@dsp_gclk_div@18cti,divider-clockP@gpu_dclk@1a0ti,divider-clockmP@emif_phy_dclk_div@190ti,divider-clockP@gmac_250m_dclk_div@19cti,divider-clockjP@l3init_480m_dclk_div@1acti,divider-clock`P@usb_otg_dclk_div@184ti,divider-clockP@sata_dclk_div@1c0ti,divider-clock P@pcie2_dclk_div@1b8ti,divider-clockP@pcie_dclk_div@1b4ti,divider-clockP@emu_dclk_div@194ti,divider-clock P@secure_32k_dclk_div@1c4ti,divider-clockP@clkoutmux0_clk_mux@158 ti,mux-clockXXNNclkoutmux1_clk_mux@15c ti,mux-clockX\clkoutmux2_clk_mux@160 ti,mux-clockX`aacustefuse_sys_gfclk_divfixed-factor-clock ;Feve_clk@180 ti,mux-clock.hdmi_dpll_clk_mux@164 ti,mux-clock =dddmlb_clk@134ti,divider-clockP@4BBmlbp_clk@130ti,divider-clockP@0CCper_abe_x1_gfclk2_div@138ti,divider-clockhP@8DDtimer_sys_clk_div@144ti,divider-clock DPHHvideo1_dpll_clk_mux@168 ti,mux-clock =heevideo2_dpll_clk_mux@16c ti,mux-clock =lffwkupaon_iclk_mux@108 ti,mux-clock nngpio1_dbclk@1838ti,gate-clockI8dcan1_sys_clk_mux@1888 ti,mux-clock =timer1_gfclk_mux@1840 ti,mux-clock,HI=>?@AJKLM@uart10_gfclk_mux@1880 ti,mux-clockOPclockdomainsaxi@0 simple-bus&QQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci0&0 00pcie1 pcie-phy0`interrupt-controlleraxi@1 simple-bus&QQ00 disabledpcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci0&0000pcie2 pcie-phy0`interrupt-controllerbandgap@4a0021e00J! J#, J#,J#edma3_ccintemda3_mperredma3_ccerrint@N  tptc@43400000ti,edma3-tptctptc0C@ r>edma3_tcerrinttptc@43500000ti,edma3-tptctptc1CP s>edma3_tcerrintgpio@4ae10000ti,omap4-gpioJ gpio1Wggpio@48055000ti,omap4-gpioHP gpio2Wgokaysgpio@48057000ti,omap4-gpioHp gpio3Wgokaysgpio@48059000ti,omap4-gpioH gpio4Wggpio@4805b000ti,omap4-gpioH gpio5Wggpio@4805d000ti,omap4-gpioH gpio6Wggpio@48051000ti,omap4-gpioH gpio7Wggpio@48053000ti,omap4-gpioH0 tgpio8Wgserial@4806a000ti,dra742-uartti,omap4-uartH-Cuart1+l disabled12txrxserial@4806c000ti,dra742-uartti,omap4-uartH Duart2+l disabled34txrxserial@48020000ti,dra742-uartti,omap4-uartH Euart3+l disabled56txrxserial@4806e000ti,dra742-uartti,omap4-uartH Auart4+l disabled78txrxserial@48066000ti,dra742-uartti,omap4-uartH` duart5+l disabled?@txrxserial@48068000ti,dra742-uartti,omap4-uartH euart6+l disabledOPtxrxserial@48420000ti,dra742-uartti,omap4-uartHB uart7+l disabledserial@48422000ti,dra742-uartti,omap4-uartHB  uart8+l disabledserial@48424000ti,dra742-uartti,omap4-uartHB@ uart9+l disabledserial@4ae2b000ti,dra742-uartti,omap4-uartJ uart10+l disabledmailbox@4a0f4000ti,omap4-mailboxJ@$ mailbox1 disabledmailbox@4883a000ti,omap4-mailboxH0 mailbox2  disabledmailbox@4883c000ti,omap4-mailboxH0 mailbox3  disabledmailbox@4883e000ti,omap4-mailboxH0 mailbox4  disabledmailbox@48840000ti,omap4-mailboxH0 mailbox5 okaymbox_ipu1_ipc3x  okaymbox_dsp1_ipc3x  okaymailbox@48842000ti,omap4-mailboxH 0 mailbox6 okaymbox_ipu2_ipc3x  okaymbox_dsp2_ipc3x  okaymailbox@48844000ti,omap4-mailboxH@0 mailbox7  disabledmailbox@48846000ti,omap4-mailboxH`0 mailbox8  disabledmailbox@4885e000ti,omap4-mailboxH0     mailbox9  disabledmailbox@48860000ti,omap4-mailboxH0  mailbox10  disabledmailbox@48862000ti,omap4-mailboxH 0 mailbox11  disabledmailbox@48864000ti,omap4-mailboxH@0 mailbox12  disabledmailbox@48802000ti,omap4-mailboxH 0{|}~ mailbox13  disabledtimer@4ae18000ti,omap5430-timerJ timer1timer@48032000ti,omap5430-timerH  !timer2timer@48034000ti,omap5430-timerH@ "timer3timer@48036000ti,omap5430-timerH` #timer4timer@48820000ti,omap5430-timerH $timer5timer@48822000ti,omap5430-timerH  %timer6timer@48824000ti,omap5430-timerH@ &timer7timer@48826000ti,omap5430-timerH` 'timer8timer@4803e000ti,omap5430-timerH (timer9timer@48086000ti,omap5430-timerH` )timer10timer@48088000ti,omap5430-timerH *timer11timer@4ae20000ti,omap5430-timerJ Ztimer12timer@48828000ti,omap5430-timerH Stimer13timer@4882a000ti,omap5430-timerH Ttimer14timer@4882c000ti,omap5430-timerH Utimer15timer@4882e000ti,omap5430-timerH Vtimer16wdt@4ae14000 ti,omap3-wdtJ@ K wd_timer2spinlock@4a0f6000ti,omap4-hwspinlockJ` spinlockdmm@4e000000 ti,omap5-dmmN ldmmi2c@48070000 ti,omap4-i2cH 3i2c1okay default+i2c@48072000 ti,omap4-i2cH  4i2c2 disabledi2c@48060000 ti,omap4-i2cH 8i2c3okay default+i2c@4807a000 ti,omap4-i2cH 9i2c4okay default+tps659038@58 ti,tps659038X& default!tps659038_pmicti,tps659038-pmicregulatorssmps12Hsmps12W Po<Psmps3Hsmps3W`o`<Psmps45Hsmps45W Po<Psmps6Hsmps6W Po<Psmps7Hsmps7W Po@<Psmps8Hsmps8W Po<Psmps9Hsmps9W2Zo2Z<Pldo1Hldo1Ww@o2ZP<ldo2Hldo2Ww@ow@<Pldo3Hldo3Ww@ow@<Pldo4Hldo4Ww@ow@<Pldo9Hldo9Wo<PldolnHldolnWw@ow@<PldousbHldousbW2Zo2Z<Ptps659038_pwr_buttonti,palmas-pwrbutton&bp tps659038_gpioti,palmas-gpioWgrtc@56emmicro,em3027Vatmel@50 atmel,24c08Pwm8731@1a wlf,wm8731okayi2c@4807c000 ti,omap4-i2cH 7i2c5 disabledmmc@4809c000ti,omap4-hsmmcH  Nmmc1=>txrx disabledmmc@480b4000ti,omap4-hsmmcH @ Qmmc2/0txrxokay defaultmmc@480ad000ti,omap4-hsmmcH  Ymmc3MNtxrx disabledmmc@480d1000ti,omap4-hsmmcH  [mmc49:txrx disabledmmu@40d01000ti,dra7-dsp-iommu@  mmu0_dsp1# disabledmmu@40d02000ti,dra7-dsp-iommu@   mmu1_dsp1# disabledmmu@58882000ti,dra7-iommuX   mmu_ipu17 disabledmmu@55082000ti,dra7-iommuU   mmu_ipu27 disabledregulator-abb-mpu ti,abb-v3Habb_mpu M2^(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addressnH,@vregulator-abb-ivahd ti,abb-v3 Habb_ivahd M2^(J~4J~$J`J% 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;dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkpciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx QRV ;dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk disabledsata@4a141100snps,dwc-ahciJJ 1 sata-physataokayrtc@48838000ti,am3352-rtcHrtcssIocp2scp@4a080000ti,omap-ocp2scp&J  ocp2scp1phy@4a084000 ti,omap-usb2J@wkupclkrefclkphy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPtwkupclkrefclkphy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlp  wkupclksysclkrefclkomap_dwc3_1@48880000ti,dwc3 usb_otg_ss1H H&usb@48890000 snps,dwc3Hp$GGH>peripheralhostotgusb2-phyusb3-phy super-speedhost omap_dwc3_2@488c0000ti,dwc3 usb_otg_ss2H W&usb@488d0000 snps,dwc3Hp$IIW>peripheralhostotg usb2-phy high-speedhost omap_dwc3_3@48900000ti,dwc3 usb_otg_ss3H X& disabledusb@48910000 snps,dwc3Hp$XXX>peripheralhostotg high-speedotg elm@48078000ti,am3352-elmH elm disabledgpmc@50000000ti,am3352-gpmcgpmcP|  rxtx$0Wg disabledatl@4843c000 ti,dra7-atlHCatlB<;:9 fck disabledmcasp@48460000ti,dra7-mcasp-audiomcasp1HF Empudathg>txrxtxrx fckahclkxahclkr disabledmcasp@48464000ti,dra7-mcasp-audiomcasp2HF@ Empudat>txrxtxrx fckahclkxahclkr disabledmcasp@48468000ti,dra7-mcasp-audiomcasp3HF Fmpudat>txrxtxrx fckahclkxokay defaultsleepU_gqmcasp@4846c000ti,dra7-mcasp-audiomcasp4HF HC`mpudat>txrxtxrx fckahclkx disabledmcasp@48470000ti,dra7-mcasp-audiomcasp5HG HCmpudat>txrxtxrx fckahclkx disabledmcasp@48474000ti,dra7-mcasp-audiomcasp6HG@ HDmpudat>txrxtxrx fckahclkx disabledmcasp@48478000ti,dra7-mcasp-audiomcasp7HG HEmpudat>txrxtxrx fckahclkx disabledmcasp@4847c000ti,dra7-mcasp-audiomcasp8HG HE@mpudat>txrxtxrx fckahclkx disabledcrossbar@4a002a48ti,irq-crossbarJ*H0&|  ethernet@48484000ti,dra7-cpswti,cpswgmac' fckcpts  @ !(5EHH@HHR.V0NOPQ&Aokay defaultsleepUamdio@48485000ti,davinci_mdio davinci_mdiokB@HHP defaultsleepUslave@48480200t rgmii-txidslave@48480300t rgmii-txidcpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_candcan1J  X  disabledcan@481d0000ti,dra7-d_candcan2HH  X   disableddss@58000000 ti,dra7-dss disabled dss_core8&(XX@TXC XTX (dsspll1_clkctrlpll1pll2_clkctrlpll2 fckvideo1_clkvideo2_clkdispc@58001000ti,dra7-dispcX  dss_dispcfck4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore ` disabled dss_hdmi fcksys_clkdsp_system@41500000sysconAPomap_dwc3_4@48940000ti,dwc3 usb_otg_ss4H Z& disabledusb@48950000 snps,dwc3Hp$YYZ>peripheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  mmu0_dsp2# disabledmmu@41502000ti,dra7-dsp-iommuAP   mmu1_dsp2# disabledthermal-zonescpu_thermaltripscpu_alert  passivecpu_crit H  criticalcooling-mapsmap0  gpu_thermaltripsgpu_crit H  criticalcore_thermaltripscore_crit H  criticaldspeve_thermaltripsdspeve_crit H  criticaliva_thermaltripsiva_crit H  criticalcpuscpu@0cpuarm,cortex-a15 ,B@,@cpu = K ] o ~ cpu@1cpuarm,cortex-a15pmuarm,cortex-a15-pmu&leds gpio-leds defaultled@0cl-som-am57x:green  heartbeat offfixedregulator-vdd_3v3regulator-fixedHvdd_3v3W2Zo2Zfixedregulator-ads7846-regregulator-fixed Hads7846-regW2Zo2Zsound0simple-audio-card CL-SOM-AM57x-Sound-Card i2s  C 7HeadphoneHeadphone JackMicrophoneMicrophone JackLineLine Jackf QHeadphone JackRHPOUTHeadphone JackLHPOUTLLINEINLine JackMICINMic BiasMic BiasMicrophone Jacksimple-audio-card,cpu ksimple-audio-card,codec k u #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclocksti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsti,no-reset-on-initdmasdma-names#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellspinctrl-namespinctrl-0ti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondspagesize#sound-dai-cellsti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsclock-namesspi-max-frequencylabelvcc-supplypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,provided-clockspinctrl-1op-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlsyscon-polpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceoperating-pointsclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-tolerancegpioslinux,default-triggerdefault-statesimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequency