M8A( ALNcompulab,sbc-am57xcompulab,cl-som-am57xti,am5728ti,dra742ti,dra74ti,dra7&&7CompuLab CL-SOM-AM57x on SB-SOM-AM57xchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000 /display#/ocp/dss@58000000/encoder@58060000memorymemory timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   & &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(& &socti,omap-inframpu ti,omap5-mpu.mpuocpti,dra7-l3-nocsimple-bus8.l3_main_1l3_main_2 DE ? l4@4a000000ti,dra7-l4-cfgsimple-bus 8J"scm@2000ti,dra7-scm-coresimple-bus  8 scm_conf@0sysconsimple-bus 8 &pbias_regulator@e00ti,pbias-dra7ti,pbias-omapSpbias_mmc_omap5Zpbias_mmc_omap5iw@- &clocksdss_deshdcp_clk@558ti,gate-clockXehrpwm0_tbclk@558ti,gate-clockXehrpwm1_tbclk@558ti,gate-clockXehrpwm2_tbclk@558ti,gate-clockXsys_32k_ck ti,mux-clock I&Ipinmux@1400ti,dra7-padconfpinctrl-singleh ? &leds_pins_default| &i2c1_pins_default &i2c3_pins_default   &i2c4_pins_default   &tps659038_pins_default &mmc2_pins_defaultP &pinmux_qspi1_pins0t &cpsw_pins_defaultPTX\`dhlptx| &cpsw_pins_sleepPTX\`dhlptx| &davinci_mdio_pins_default &davinci_mdio_pins_sleep &pinmux_ads7846_pinsd &mcasp3_pins_default $(,0 &mcasp3_pins_sleep $(,0 &uart3_pins_defaultH L  &mmc1_pins_default@TX\`dhl| &pinmux_usb1_pins  &i2c5_pins_default   &lcd_pins_defaultd &pinmux_hdmi_pins  &pinmux_hdmi_conn_pins &scm_conf@1c04syscon scm_conf@1c24syscon$$ &dma-router@b78ti,dra7-dma-crossbar x !1  &dma-router@c78ti,dra7-dma-crossbar x| !1  &cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ckti,dra7-atl-clock  <&<atl_clkin1_ckti,dra7-atl-clock  ;&;atl_clkin2_ckti,dra7-atl-clock  :&:atl_clkin3_ckti,dra7-atl-clock  9&9hdmi_clkin_ck fixed-clock= *&*mlb_clkin_ck fixed-clock= &mlbp_clkin_ck fixed-clock= &pciesref_acs_clk_ck fixed-clock= S&Sref_clkin0_ck fixed-clock= >&>ref_clkin1_ck fixed-clock= ?&?ref_clkin2_ck fixed-clock= @&@ref_clkin3_ck fixed-clock= A&Armii_clk_ck fixed-clock=sdvenc_clkin_ck fixed-clock=secure_32k_clk_src_ck fixed-clock= &sys_clk32_crystal_ck fixed-clock= &sys_clk32_pseudo_ckfixed-factor-clock MXb &virt_12000000_ck fixed-clock= w&wvirt_13000000_ck fixed-clock=]@virt_16800000_ck fixed-clock=Y y&yvirt_19200000_ck fixed-clock=$ z&zvirt_20000000_ck fixed-clock=1- x&xvirt_26000000_ck fixed-clock= {&{virt_27000000_ck fixed-clock= |&|virt_38400000_ck fixed-clock=I }&}sys_clkin2 fixed-clock=X =&=usb_otg_clkin_ck fixed-clock= &video1_clkin_ck fixed-clock= 3&3video1_m2_clkin_ck fixed-clock= )&)video2_clkin_ck fixed-clock= 4&4video2_m2_clkin_ck fixed-clock= (&(dpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock  &dpll_abe_x2_ckti,omap4-dpll-x2-clock &dpll_abe_m2x2_ck@1f0ti,divider-clockbm &abe_clk@108ti,divider-clockb &dpll_abe_m2_ck@1f0ti,divider-clockbm h&hdpll_abe_m3x2_ck@1f4ti,divider-clockbm &dpll_core_byp_mux@12c ti,mux-clock , &dpll_core_ck@120ti,omap4-dpll-core-clock  $,( &dpll_core_x2_ckti,omap4-dpll-x2-clock &dpll_core_h12x2_ck@13cti,divider-clockb?m< &mpu_dpll_hs_clk_divfixed-factor-clockMX &dpll_mpu_ck@160ti,omap5-mpu-dpll-clock `dlh &dpll_mpu_m2_ck@170ti,divider-clockbmp &mpu_dclk_divfixed-factor-clockMX &dsp_dpll_hs_clk_divfixed-factor-clockMX &dpll_dsp_byp_mux@240 ti,mux-clock @ &dpll_dsp_ck@234ti,omap4-dpll-clock 48@< &dpll_dsp_m2_ck@244ti,divider-clockbmD &iva_dpll_hs_clk_divfixed-factor-clockMX &dpll_iva_byp_mux@1ac ti,mux-clock  &dpll_iva_ck@1a0ti,omap4-dpll-clock  &dpll_iva_m2_ck@1b0ti,divider-clockbm & iva_dclkfixed-factor-clock MX &dpll_gpu_byp_mux@2e4 ti,mux-clock  !&!dpll_gpu_ck@2d8ti,omap4-dpll-clock ! "&"dpll_gpu_m2_ck@2e8ti,divider-clock"bm m&mdpll_core_m2_ck@130ti,divider-clockbm0 #&#core_dpll_out_dclk_divfixed-factor-clock#MX &dpll_ddr_byp_mux@21c ti,mux-clock  $&$dpll_ddr_ck@210ti,omap4-dpll-clock $ %&%dpll_ddr_m2_ck@220ti,divider-clock%bm  &dpll_gmac_byp_mux@2b4 ti,mux-clock  &&&dpll_gmac_ck@2a8ti,omap4-dpll-clock & '&'dpll_gmac_m2_ck@2b8ti,divider-clock'bm j&jvideo2_dclk_divfixed-factor-clock(MX &video1_dclk_divfixed-factor-clock)MX &hdmi_dclk_divfixed-factor-clock*MX &per_dpll_hs_clk_divfixed-factor-clockMX W&Wusb_dpll_hs_clk_divfixed-factor-clockMX [&[eve_dpll_hs_clk_divfixed-factor-clockMX +&+dpll_eve_byp_mux@290 ti,mux-clock + ,&,dpll_eve_ck@284ti,omap4-dpll-clock , -&-dpll_eve_m2_ck@294ti,divider-clock-bm .&.eve_dclk_divfixed-factor-clock.MX &dpll_core_h13x2_ck@140ti,divider-clockb?m@dpll_core_h14x2_ck@144ti,divider-clockb?mD k&kdpll_core_h22x2_ck@154ti,divider-clockb?mT 5&5dpll_core_h23x2_ck@158ti,divider-clockb?mX v&vdpll_core_h24x2_ck@15cti,divider-clockb?m\dpll_ddr_x2_ckti,omap4-dpll-x2-clock% /&/dpll_ddr_h11x2_ck@228ti,divider-clock/b?m(dpll_dsp_x2_ckti,omap4-dpll-x2-clock 0&0dpll_dsp_m3x2_ck@248ti,divider-clock0bmH &dpll_gmac_x2_ckti,omap4-dpll-x2-clock' 1&1dpll_gmac_h11x2_ck@2c0ti,divider-clock1b?m 2&2dpll_gmac_h12x2_ck@2c4ti,divider-clock1b?mdpll_gmac_h13x2_ck@2c8ti,divider-clock1b?mdpll_gmac_m3x2_ck@2bcti,divider-clock1bmgmii_m_clk_divfixed-factor-clock2MXhdmi_clk2_divfixed-factor-clock*MX G&Ghdmi_div_clkfixed-factor-clock*MX M&Ml3_iclk_div@100ti,divider-clockb &l4_root_clk_divfixed-factor-clockMX &video1_clk2_divfixed-factor-clock3MX E&Evideo1_div_clkfixed-factor-clock3MX K&Kvideo2_clk2_divfixed-factor-clock4MX F&Fvideo2_div_clkfixed-factor-clock4MX L&Lipu1_gfclk_mux@520 ti,mux-clock5 mcasp1_ahclkr_mux@550 ti,mux-clock86789:;<=>?@ABCP &mcasp1_ahclkx_mux@550 ti,mux-clock86789:;<=>?@ABCP &mcasp1_aux_gfclk_mux@550 ti,mux-clockDEFGP &timer5_gfclk_mux@558 ti,mux-clock0HI=>?@AJKLMNXtimer6_gfclk_mux@560 ti,mux-clock0HI=>?@AJKLMN`timer7_gfclk_mux@568 ti,mux-clock0HI=>?@AJKLMNhtimer8_gfclk_mux@570 ti,mux-clock0HI=>?@AJKLMNpuart6_gfclk_mux@580 ti,mux-clockOPdummy_ck fixed-clock=clockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200ti,omap4-dpll-clock   Q&Qdpll_pcie_ref_m2ldo_ck@210ti,divider-clockQbm R&Rapll_pcie_in_clk_mux@4ae06118 ti,mux-clockRS T&Tapll_pcie_ck@21cti,dra7-apll-clockTQ  U&Uoptfclk_pciephy1_32khz@4a0093b0ti,gate-clockI &optfclk_pciephy2_32khz@4a0093b8ti,gate-clockI &optfclk_pciephy_div@4a00821cti,divider-clockUb V&Voptfclk_pciephy1_clk@4a0093b0ti,gate-clockU  &optfclk_pciephy2_clk@4a0093b8ti,gate-clockU  &optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockV  &optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockV  &apll_pcie_clkvcoldofixed-factor-clockUMXapll_pcie_clkvcoldo_divfixed-factor-clockUMXapll_pcie_m2_ckfixed-factor-clockUMX &dpll_per_byp_mux@14c ti,mux-clock WL X&Xdpll_per_ck@140ti,omap4-dpll-clock X@DLH Y&Ydpll_per_m2_ck@150ti,divider-clockYbmP Z&Zfunc_96m_aon_dclk_divfixed-factor-clockZMX &dpll_usb_byp_mux@18c ti,mux-clock [ \&\dpll_usb_ck@180ti,omap4-dpll-j-type-clock \ ]&]dpll_usb_m2_ck@190ti,divider-clock]bm `&`dpll_pcie_ref_m2_ck@210ti,divider-clockQbm &dpll_per_x2_ckti,omap4-dpll-x2-clockY ^&^dpll_per_h11x2_ck@158ti,divider-clock^b?mX _&_dpll_per_h12x2_ck@15cti,divider-clock^b?m\ c&cdpll_per_h13x2_ck@160ti,divider-clock^b?m` t&tdpll_per_h14x2_ck@164ti,divider-clock^b?md l&ldpll_per_m2x2_ck@150ti,divider-clock^bmP P&Pdpll_usb_clkdcoldofixed-factor-clock]MX b&bfunc_128m_clkfixed-factor-clock_MX o&ofunc_12m_fclkfixed-factor-clockPMXfunc_24m_clkfixed-factor-clockZMX 8&8func_48m_fclkfixed-factor-clockPMX O&Ofunc_96m_fclkfixed-factor-clockPMXl3init_60m_fclk@104ti,divider-clock`clkout2_clk@6b0ti,gate-clockal3init_960m_gfclk@6c0ti,gate-clockb g&gdss_32khz_clk@1120ti,gate-clockI  dss_48mhz_clk@1120ti,gate-clockO   &dss_dss_clk@1120ti,gate-clockc  &dss_hdmi_clk@1120ti,gate-clockd   &dss_video1_clk@1120ti,gate-clocke   &dss_video2_clk@1120ti,gate-clockf   &gpio2_dbclk@1760ti,gate-clockI`gpio3_dbclk@1768ti,gate-clockIhgpio4_dbclk@1770ti,gate-clockIpgpio5_dbclk@1778ti,gate-clockIxgpio6_dbclk@1780ti,gate-clockIgpio7_dbclk@1810ti,gate-clockIgpio8_dbclk@1818ti,gate-clockImmc1_clk32k@1328ti,gate-clockI(mmc2_clk32k@1330ti,gate-clockI0mmc3_clk32k@1820ti,gate-clockI mmc4_clk32k@1828ti,gate-clockI(sata_ref_clk@1388ti,gate-clock  &usb_otg_ss1_refclk960m@13f0ti,gate-clockg &usb_otg_ss2_refclk960m@1340ti,gate-clockg@ &usb_phy1_always_on_clk32k@640ti,gate-clockI@ &usb_phy2_always_on_clk32k@688ti,gate-clockI &usb_phy3_always_on_clk32k@698ti,gate-clockI &atl_dpll_clk_mux@c00 ti,mux-clockI34*  i&iatl_gfclk_mux@c00 ti,mux-clock hi  & gmac_gmii_ref_clk_div@13d0ti,divider-clockj &gmac_rft_clk_mux@13d0 ti,mux-clock34h*gpu_core_gclk_mux@1220 ti,mux-clock klm gpu_hyd_gclk_mux@1220 ti,mux-clock klm l3instr_ts_gclk_div@e50ti,divider-clocknP  mcasp2_ahclkr_mux@1860 ti,mux-clock86789:;<=>?@ABC` &mcasp2_ahclkx_mux@1860 ti,mux-clock86789:;<=>?@ABC` &mcasp2_aux_gfclk_mux@1860 ti,mux-clockDEFG` &mcasp3_ahclkx_mux@1868 ti,mux-clock86789:;<=>?@ABCh &mcasp3_aux_gfclk_mux@1868 ti,mux-clockDEFGh &mcasp4_ahclkx_mux@1898 ti,mux-clock86789:;<=>?@ABC &mcasp4_aux_gfclk_mux@1898 ti,mux-clockDEFG &mcasp5_ahclkx_mux@1878 ti,mux-clock86789:;<=>?@ABCx &mcasp5_aux_gfclk_mux@1878 ti,mux-clockDEFGx &mcasp6_ahclkx_mux@1904 ti,mux-clock86789:;<=>?@ABC &mcasp6_aux_gfclk_mux@1904 ti,mux-clockDEFG &mcasp7_ahclkx_mux@1908 ti,mux-clock86789:;<=>?@ABC &mcasp7_aux_gfclk_mux@1908 ti,mux-clockDEFG &mcasp8_ahclkx_mux@1890 ti,mux-clock86789:;<=>?@ABC &mcasp8_aux_gfclk_mux@1890 ti,mux-clockDEFG &mmc1_fclk_mux@1328 ti,mux-clockoP( p&pmmc1_fclk_div@1328ti,divider-clockpb(mmc2_fclk_mux@1330 ti,mux-clockoP0 q&qmmc2_fclk_div@1330ti,divider-clockqb0mmc3_gfclk_mux@1820 ti,mux-clockOP  r&rmmc3_gfclk_div@1820ti,divider-clockrb mmc4_gfclk_mux@1828 ti,mux-clockOP( s&smmc4_gfclk_div@1828ti,divider-clocksb(qspi_gfclk_mux@1838 ti,mux-clockot8 u&uqspi_gfclk_div@1838ti,divider-clockub8 &timer10_gfclk_mux@1728 ti,mux-clock,HI=>?@AJKLM(timer11_gfclk_mux@1730 ti,mux-clock,HI=>?@AJKLM0timer13_gfclk_mux@17c8 ti,mux-clock,HI=>?@AJKLMtimer14_gfclk_mux@17d0 ti,mux-clock,HI=>?@AJKLMtimer15_gfclk_mux@17d8 ti,mux-clock,HI=>?@AJKLMtimer16_gfclk_mux@1830 ti,mux-clock,HI=>?@AJKLM0timer2_gfclk_mux@1738 ti,mux-clock,HI=>?@AJKLM8timer3_gfclk_mux@1740 ti,mux-clock,HI=>?@AJKLM@timer4_gfclk_mux@1748 ti,mux-clock,HI=>?@AJKLMHtimer9_gfclk_mux@1750 ti,mux-clock,HI=>?@AJKLMPuart1_gfclk_mux@1840 ti,mux-clockOP@uart2_gfclk_mux@1848 ti,mux-clockOPHuart3_gfclk_mux@1850 ti,mux-clockOPPuart4_gfclk_mux@1858 ti,mux-clockOPXuart5_gfclk_mux@1870 ti,mux-clockOPpuart7_gfclk_mux@18d0 ti,mux-clockOPuart8_gfclk_mux@18e0 ti,mux-clockOPuart9_gfclk_mux@18e8 ti,mux-clockOPvip1_gclk_mux@1020 ti,mux-clockv vip2_gclk_mux@1028 ti,mux-clockv(vip3_gclk_mux@1030 ti,mux-clockv0clockdomainscoreaon_clkdmti,clockdomain]l4@4ae00000ti,dra7-l4-wkupsimple-bus 8Jcounter@4000ti,omap-counter32k@@ .counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110 ti,mux-clockwxyz{|} & abe_dpll_sys_clk_mux@118 ti,mux-clock = ~&~abe_dpll_bypass_clk_mux@114 ti,mux-clock~I &abe_dpll_clk_mux@10c ti,mux-clock~I  & abe_24m_fclk@11cti,divider-clock 6&6aess_fclk@178ti,divider-clockxb &abe_giclk_div@174ti,divider-clocktb J&Jabe_lp_clk_div@1d8ti,divider-clock  &abe_sys_clk_div@120ti,divider-clock  b 7&7adc_gfclk_mux@1dc ti,mux-clock  =Isys_clk1_dclk_div@1c8ti,divider-clock b@ &sys_clk2_dclk_div@1ccti,divider-clock=b@ &per_abe_x1_dclk_div@1bcti,divider-clockhb@ &dsp_gclk_div@18cti,divider-clockb@ &gpu_dclk@1a0ti,divider-clockmb@ &emif_phy_dclk_div@190ti,divider-clockb@ &gmac_250m_dclk_div@19cti,divider-clockjb@ &l3init_480m_dclk_div@1acti,divider-clock`b@ &usb_otg_dclk_div@184ti,divider-clockb@ &sata_dclk_div@1c0ti,divider-clock b@ &pcie2_dclk_div@1b8ti,divider-clockb@ &pcie_dclk_div@1b4ti,divider-clockb@ &emu_dclk_div@194ti,divider-clock b@ &secure_32k_dclk_div@1c4ti,divider-clockb@ &clkoutmux0_clk_mux@158 ti,mux-clockXX N&Nclkoutmux1_clk_mux@15c ti,mux-clockX\clkoutmux2_clk_mux@160 ti,mux-clockX` a&acustefuse_sys_gfclk_divfixed-factor-clock MXeve_clk@180 ti,mux-clock.hdmi_dpll_clk_mux@164 ti,mux-clock =d d&dmlb_clk@134ti,divider-clockb@4 B&Bmlbp_clk@130ti,divider-clockb@0 C&Cper_abe_x1_gfclk2_div@138ti,divider-clockhb@8 D&Dtimer_sys_clk_div@144ti,divider-clock Db H&Hvideo1_dpll_clk_mux@168 ti,mux-clock =h e&evideo2_dpll_clk_mux@16c ti,mux-clock =l f&fwkupaon_iclk_mux@108 ti,mux-clock  n&ngpio1_dbclk@1838ti,gate-clockI8dcan1_sys_clk_mux@1888 ti,mux-clock = &timer1_gfclk_mux@1840 ti,mux-clock,HI=>?@AJKLM@uart10_gfclk_mux@1880 ti,mux-clockOPclockdomainsaxi@0 simple-bus8QQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci080 00.pcie1 pcie-phy0`interrupt-controller &axi@1 simple-bus8QQ00 &disabledpcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci080000.pcie2 pcie-phy0`interrupt-controller &bandgap@4a0021e00J! J#, J#,J#txrx&okaydefault   mmc@480b4000ti,omap4-hsmmcH @ Q.mmc2/0txrx&okaydefault#mmc@480ad000ti,omap4-hsmmcH  Y.mmc3MNtxrx &disabledmmc@480d1000ti,omap4-hsmmcH  [.mmc49:txrx &disabledmmu@40d01000ti,dra7-dsp-iommu@  .mmu0_dsp1:G &disabledmmu@40d02000ti,dra7-dsp-iommu@   .mmu1_dsp1:G &disabledmmu@58882000ti,dra7-iommuX   .mmu_ipu1:[ &disabledmmu@55082000ti,dra7-iommuU   .mmu_ipu2:[ &disabledregulator-abb-mpu ti,abb-v3Zabb_mpu q2(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addressH,@vregulator-abb-ivahd ti,abb-v3 Zabb_ivahd q2(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-address@H0regulator-abb-dspeve ti,abb-v3 Zabb_dspeve q2(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-address H0regulator-abb-gpu ti,abb-v3Zabb_gpu q2(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-addressHvspi@48098000ti,omap4-mcspiH  <.mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3 &disabledspi@4809a000ti,omap4-mcspiH  =.mcspi2 +,-.tx0rx0tx1rx1 &disabledspi@480b8000ti,omap4-mcspiH  V.mcspi3tx0rx0 &disabledspi@480ba000ti,omap4-mcspiH  +.mcspi4FGtx0rx0 &disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmapX.qspifck W&okaydefaultlspi_flash@0spansion,m25p80jedec,spi-norlpartition@0"uboot partition@c0000"uboot environment partition@100000 "reservedads7846@0default ti,ads7846(`& 3@IR[dt tocp2scp@4a090000ti,omap-ocp2scp8J  .ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlt sysclkrefclk &pciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_txQRV ;dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk &pciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx QRV ;dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk &disabled &sata@4a141100snps,dwc-ahciJJ 1 sata-phy.sata&okayrtc@48838000ti,am3352-rtcH.rtcssIocp2scp@4a080000ti,omap-ocp2scp8J  .ocp2scp1phy@4a084000 ti,omap-usb2J@wkupclkrefclk &phy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPtwkupclkrefclk &phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlp  wkupclksysclkrefclk &omap_dwc3_1@48880000ti,dwc3 .usb_otg_ss1H H8usb@48890000 snps,dwc3Hp$GGHPperipheralhostotgusb2-phyusb3-phy super-speedhost/defaultomap_dwc3_2@488c0000ti,dwc3 .usb_otg_ss2H W8usb@488d0000 snps,dwc3Hp$IIWPperipheralhostotg usb2-phy high-speedhost/omap_dwc3_3@48900000ti,dwc3 .usb_otg_ss3H X8 &disabledusb@48910000 snps,dwc3Hp$XXXPperipheralhostotg high-speedotg/elm@48078000ti,am3352-elmH .elm &disabledgpmc@50000000ti,am3352-gpmc.gpmcP|  rxtxHTiy &disabledatl@4843c000 ti,dra7-atlHC.atlf<;:9 fck &disabledmcasp@48460000ti,dra7-mcasp-audio.mcasp1HF EmpudathgPtxrxtxrx fckahclkxahclkr &disabledmcasp@48464000ti,dra7-mcasp-audio.mcasp2HF@ EmpudatPtxrxtxrx fckahclkxahclkr &disabledmcasp@48468000ti,dra7-mcasp-audio.mcasp3HF FmpudatPtxrxtxrx fckahclkx&okaydefaultsleepy &mcasp@4846c000ti,dra7-mcasp-audio.mcasp4HF HC`mpudatPtxrxtxrx fckahclkx &disabledmcasp@48470000ti,dra7-mcasp-audio.mcasp5HG HCmpudatPtxrxtxrx fckahclkx &disabledmcasp@48474000ti,dra7-mcasp-audio.mcasp6HG@ HDmpudatPtxrxtxrx fckahclkx &disabledmcasp@48478000ti,dra7-mcasp-audio.mcasp7HG HEmpudatPtxrxtxrx fckahclkx &disabledmcasp@4847c000ti,dra7-mcasp-audio.mcasp8HG HE@mpudatPtxrxtxrx fckahclkx &disabledcrossbar@4a002a48ti,irq-crossbarJ*H0&   &ethernet@48484000ti,dra7-cpswti,cpsw.gmac' fckcpts &0@9 ELYiHH@HHR.z0NOPQ8S&okaydefaultsleepymdio@48485000ti,davinci_mdio .davinci_mdioB@HHPdefaultsleepy &slave@48480200 rgmii-txidslave@48480300 rgmii-txidcpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_can.dcan1J  X  &disabledcan@481d0000ti,dra7-d_can.dcan2HH  X   &disableddss@58000000 ti,dra7-dss&ok .dss_core88(XX@TXC XTX (dsspll1_clkctrlpll1pll2_clkctrlpll2 fckvideo1_clkvideo2_clkdispc@58001000ti,dra7-dispcX  .dss_dispcfck4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore `&ok .dss_hdmi fcksys_clk defaultportendpoint   &portendpoint@0   &dsp_system@41500000sysconAP &omap_dwc3_4@48940000ti,dwc3 .usb_otg_ss4H Z8 &disabledusb@48950000 snps,dwc3Hp$YYZPperipheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  .mmu0_dsp2:G &disabledmmu@41502000ti,dra7-dsp-iommuAP   .mmu1_dsp2:G &disabledthermal-zonescpu_thermal * @ Ntripscpu_alert ^ jpassive &cpu_crit ^H j criticalcooling-mapsmap0 u zgpu_thermal * @ Ntripsgpu_crit ^H j criticalcore_thermal * @ Ntripscore_crit ^H j criticaldspeve_thermal * @ Ntripsdspeve_crit ^H j criticaliva_thermal * @ Ntripsiva_crit ^H j criticalcpuscpu@0cpuarm,cortex-a15 B@,@cpu       &cpu@1cpuarm,cortex-a15pmuarm,cortex-a15-pmu&leds gpio-ledsdefaultled@0"cl-som-am57x:green  heartbeat offfixedregulator-vdd_3v3regulator-fixedZvdd_3v3i2Z2Z &fixedregulator-ads7846-regregulator-fixed Zads7846-regi2Z2Z &sound0simple-audio-card CL-SOM-AM57x-Sound-Card 4i2s M oC HeadphoneHeadphone JackMicrophoneMicrophone JackLineLine Jackf Headphone JackRHPOUTHeadphone JackLHPOUTLLINEINLine JackMICINMic BiasMic BiasMicrophone Jacksimple-audio-card,cpu  &simple-audio-card,codec  fixedregulator-v3_3regulator-fixedZvsb_3v3i2Z2ZN display!startek,startek-kd050cpanel-dpi"lcddefault panel-timing=@    ( ( ,+ 6 B  O Y f s }portendpoint   &connector@0hdmi-connector"hdmiadefault  portendpoint  & #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0display0display1device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclocksti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsti,no-reset-on-initdmasdma-namespinctrl-namespinctrl-0#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellsti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondspagesize#sound-dai-cellsti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpioswp-gpiosti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsclock-namesspi-max-frequencylabelvcc-supplypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,provided-clockspinctrl-1op-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointdata-linespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceoperating-pointsclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-tolerancelinux,default-triggerdefault-statesimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpios