8{l({4mqmaker,miqirockchip,rk3288& 7mqmaker MiQichosen=serial2:115200n8aliasesI/ethernet@ff290000S/i2c@ff650000X/i2c@ff140000]/i2c@ff660000b/i2c@ff150000g/i2c@ff160000l/i2c@ff170000q/dwmmc@ff0f0000w/dwmmc@ff0c0000}/dwmmc@ff0d0000/dwmmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 `@p@ @OOa sB@ ~ ' 9  K 0 !0@>EQWcpu@501cpuarm,cortex-a12 QWcpu@502cpuarm,cortex-a12 QWcpu@503cpuarm,cortex-a12 QWamba simple-bus_dma-controller@ff250000arm,pl330arm,primecell%@fq> apb_pclkQWdma-controller@ff600000arm,pl330arm,primecell`@fq> apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@fq> apb_pclkQIWIreserved-memory_dma-unusable@fe000000oscillator fixed-clockn6xin24mQ W timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H > a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр >Drvbiuciuciu-driveciu-sample   @okay!3DVakdefaulty dwmmc@ff0d0000rockchip,rk3288-dw-mshcр >Eswbiuciuciu-driveciu-sample  ! @ disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр >Ftxbiuciuciu-driveciu-sample  "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр >Guybiuciuciu-driveciu-sample  #@okay!Vakdefaultysaradc@ff100000rockchip,saradc $>I[saradcapb_pclk W saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi>ARspiclkapb_pclk  txrx ,kdefaulty disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi>BSspiclkapb_pclk txrx -kdefaulty ! disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi>CTspiclkapb_pclktxrx .kdefaulty"#$% disabledi2c@ff140000rockchip,rk3288-i2c >i2c>Mkdefaulty&okayi2c@ff150000rockchip,rk3288-i2c ?i2c>Okdefaulty' disabledi2c@ff160000rockchip,rk3288-i2c @i2c>Pkdefaulty(okayi2c@ff170000rockchip,rk3288-i2c Ai2c>Qkdefaulty)okayQZWZserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7>MUbaudclkapb_pclkkdefaulty* disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8>NVbaudclkapb_pclkkdefaulty+ disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9>OWbaudclkapb_pclkkdefaulty,okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :>PXbaudclkapb_pclkkdefaulty-okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;>QYbaudclkapb_pclkkdefaulty. disabledthermal-zonesreserve_thermal/cpu_thermald/tripscpu_alert0.p:passiveQ0W0cpu_alert1.$:passiveQ1W1cpu_crit._: criticalcooling-mapsmap0E0 Jmap1E1 Jgpu_thermald/tripsgpu_alert0.p:passiveQ2W2gpu_crit._: criticalcooling-mapsmap0E2 Jtsadc@ff280000rockchip,rk3288-tsadc( %>HZtsadcapb_pclk  tsadc-apbkinitdefaultsleepy3Y4c3msokayQ/W/ethernet@ff290000rockchip,rk3288-gmac) macirq58>fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac B stmmacethok6inputkdefaulty789:;(rgmii1 G'B@ \<l0uusb@ff500000 generic-ehciP >usbhost~=usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T >otghost~> usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X >otg peripheral@@ ~? usb2-phyokayusb@ff5c0000 generic-ehci\ >usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c>Lkdefaulty@okaysyr827@40silergy,syr827@vdd_cpu Pp+?Q,m@AQWsyr828@41silergy,syr828Avdd_gpu Pp+Ahym8563@51haoyu,hym8563Qxin32kact8846@5aactive-semi,act8846ZkdefaultyBAAAAAACregulatorsREG1vcc_ddr+REG2vcc_io2Z2Z+QWREG3vdd_log+REG4vcc_20+QCWCREG5 vccio_sd2Z2Z+QWREG6 vdd10_lcdB@B@+REG7vcca_18w@w@REG8vcca_332Z2ZQdWdREG9vcc_lan2Z2ZQ;W;REG10vdd_10B@B@+REG11vcc_18w@w@+QWREG12 vcc18_lcdw@w@+i2c@ff660000rockchip,rk3288-i2cf =i2c>NkdefaultyDokaypwm@ff680000rockchip,rk3288-pwmhkdefaultyE>^pwm disabledpwm@ff680010rockchip,rk3288-pwmhkdefaultyF>^pwm disabledpwm@ff680020rockchip,rk3288-pwmh kdefaultyG>^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0kdefaultyH>^pwm disabledbus_intmem@ff700000 mmio-sramp _psmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsQWpower-controller!rockchip,rk3288-power-controllerh QLWLpd_vio@9 >chgfdehilkjpd_hevc@11 >oppd_video@12 >pd_gpu@13 >syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5Hjk$!#gׄeрxhрxhQWsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwQ5W5edp-phyrockchip,rk3288-dp-phy>h24m6 disabledQWWWwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt>p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifA hclkmclk>TItx 6kdefaultyJ5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5IItxrxi2s_hclki2s_clk>RkdefaultyKRm disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 >}aclkhclksclkapb_pclk  crypto-rstokayvop@ff930000rockchip,rk3288-vop >aclk_vopdclk_vophclk_vopL  def axiahbdclkMokayportQ W endpoint@0NQ[W[endpoint@1OQXWXendpoint@2PQUWUiommu@ff930300rockchip,iommu  vopb_mmuL okayQMWMvop@ff940000rockchip,rk3288-vop >aclk_vopdclk_vophclk_vopL   axiahbdclkQokayportQ W endpoint@0RQ\W\endpoint@1SQYWYendpoint@2TQVWViommu@ff940300rockchip,iommu  vopl_mmuL okayQQWQmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ >~d refpclkL 5 disabledportsportendpoint@0UQPWPendpoint@1VQTWTdp@ff970000rockchip,rk3288-dp@ b>icdppclk~Wdp odp5 disabledportsport@0endpoint@0XQOWOendpoint@1YQSWShdmi@ff980000rockchip,rk3288-dw-hdmi5 g>hm iahbisfrL okayZportsportendpoint@0[QNWNendpoint@1\QRWRinterrupt-controller@ffc01000 arm,gic-400  @ `   QWefuse@ffb40000rockchip,rockchip-efuse >q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy5okayusb-phy@3206 >]phyclkQ?W?usb-phy@33464>^phyclkQ=W=usb-phy@3486H>_phyclkQ>W>pinctrlrockchip,rk3288-pinctrl5_gpio0@ff750000rockchip,gpio-banku Q>@QgWggpio1@ff780000rockchip,gpio-bankx R>Agpio2@ff790000rockchip,gpio-banky S>Bgpio3@ff7a0000rockchip,gpio-bankz T>Cgpio4@ff7b0000rockchip,gpio-bank{ U>DQ<W<gpio5@ff7c0000rockchip,gpio-bank| V>Egpio6@ff7d0000rockchip,gpio-bank} W>Fgpio7@ff7e0000rockchip,gpio-bank~ X>GQeWegpio8@ff7f0000rockchip,gpio-bank Y>Hhdmihdmi-ddc ]]pcfg-pull-upQ^W^pcfg-pull-down"Q_W_pcfg-pull-none1Q]W]pcfg-pull-none-12ma1> Q`W`sleepglobal-pwroff]ddrio-pwroff]ddr0-retention^ddr1-retention^edpedp-hpd _i2c0i2c0-xfer ]]Q@W@i2c1i2c1-xfer ]]Q&W&i2c2i2c2-xfer  ] ]QDWDi2c3i2c3-xfer ]]Q'W'i2c4i2c4-xfer ]]Q(W(i2c5i2c5-xfer ]]Q)W)i2s0i2s0-bus`]]]]]]QKWKsdmmcsdmmc-clk`Q W sdmmc-cmdaQ W sdmmc-cd^QWsdmmc-bus1^sdmmc-bus4@aaaaQWsdmmc-pwr ]QiWisdio0sdio0-bus1^sdio0-bus4@^^^^sdio0-cmd^sdio0-clk]sdio0-cd^sdio0-wp^sdio0-pwr^sdio0-bkpwr^sdio0-int^sdio1sdio1-bus1^sdio1-bus4@^^^^sdio1-cd^sdio1-wp^sdio1-bkpwr^sdio1-int^sdio1-cmd^sdio1-clk]sdio1-pwr ^emmcemmc-clk]QWemmc-cmd^QWemmc-pwr ^QWemmc-bus1^emmc-bus4@^^^^emmc-bus8^^^^^^^^QWspi0spi0-clk ^QWspi0-cs0 ^QWspi0-tx^QWspi0-rx^QWspi0-cs1^spi1spi1-clk ^QWspi1-cs0 ^Q!W!spi1-rx^Q W spi1-tx^QWspi2spi2-cs1^spi2-clk^Q"W"spi2-cs0^Q%W%spi2-rx^Q$W$spi2-tx ^Q#W#uart0uart0-xfer ^]Q*W*uart0-cts^uart0-rts]uart1uart1-xfer ^ ]Q+W+uart1-cts ^uart1-rts ]uart2uart2-xfer ^]Q,W,uart3uart3-xfer ^]Q-W-uart3-cts ^uart3-rts ]uart4uart4-xfer  ^ ]Q.W.uart4-cts^uart4-rts]tsadcotp-gpio ]Q3W3otp-out ]Q4W4pwm0pwm0-pin]QEWEpwm1pwm1-pin]QFWFpwm2pwm2-pin]QGWGpwm3pwm3-pin]QHWHgmacrgmii-pins]]]]````]]] ``]]Q7W7rmii-pins]]]]]]]]]]phy-int ^Q:W:phy-pmeb^Q9W9phy-rstbQ8W8spdifspdif-tx ]QJWJpcfg-output-highMQbWbpcfg-output-lowYQcWcpcfg-pull-up-drv-12ma> QaWaact8846pmic-int^pmic-sleepcpmic-vselcQBWBledsled-ctl]QfWfusb_hosthost-vbus-drv]QhWhexternal-gmac-clock fixed-clocksY@ ext_gmacQ6W6io-domains"rockchip,rk3288-io-voltage-domainddq;leds gpio-ledswork emiqi:green:user default-onkdefaultyfflash-regulatorregulator-fixed vcc_flashw@w@QWusb-host-regulatorregulator-fixed ggkdefaultyh vcc_hostLK@LK@+Asdmmc-regulatorregulator-fixed ge kdefaultyivcc_sd2Z2ZQWvsys-regulatorregulator-fixedvcc_sysLK@LK@+?QAWA #address-cells#size-cellscompatibleinterrupt-parentmodelstdout-pathethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsreset-namesvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowaudio-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supplygpioslabellinux,default-triggerenable-active-highstartup-delay-us