8( rgoogle,veyron-speedy-rev9google,veyron-speedy-rev8google,veyron-speedy-rev7google,veyron-speedy-rev6google,veyron-speedy-rev5google,veyron-speedy-rev4google,veyron-speedy-rev3google,veyron-speedy-rev2google,veyron-speedygoogle,veyronrockchip,rk3288&7Google Speedychosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelmemorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkKLQLreserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @okay-> P YZw defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @okay- wdefault dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@okayY. wdefault saradc@ff100000rockchip,saradc $=8I[saradcapb_pclkW Osaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclk[  `txrx ,default !"okayec@0google,cros-ec-spij& default#-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclk[ `txrx -default$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclk[`txrx .default()*+okay i2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault,okay12Idtpm@20infineon,slb9645tt `i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault.okay12I,trackpad@15elan,ekth3000& default/x0i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault1okay1,IK^Q^serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 234okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault5okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault6okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault7 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault8 disabledthermal-zonesreserve_thermal9cpu_thermald9tripscpu_alert0 passiveK:Q:cpu_alert1p passiveK;Q;cpu_crit_  criticalcooling-mapsmap0: map1; gpu_thermald9tripsgpu_alert0p passiveK<Q<gpu_crit_  criticalcooling-mapsmap0< tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk Otsadc-apbinitdefaultsleep=,>6=@VsokaymK9Q9ethernet@ff290000rockchip,rk3288-gmac) macirq?88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Ostmmaceth disabledusb@ff500000 generic-ehciP 8usbhost@usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostA usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost @@ B usb2-phyokayz#Busb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultCokay12Idpmic@1brockchip,rk808xin32kwifibt_32kin&DdefaultE:[gsF0FFKqQqregulatorsDCDC_REG1vdd_arm q/ GqKQregulator-state-mem\DCDC_REG2vdd_gpu 5/Gqregulator-state-memuB@DCDC_REG3 vcc135_ddrregulator-state-memuDCDC_REG4vcc_18w@/w@KQregulator-state-memuw@LDO_REG1 vcc33_io2Z/2ZK0Q0regulator-state-memu2ZLDO_REG3vdd_10B@/B@regulator-state-memuB@LDO_REG7vdd10_lcd_pwren_h&%/&%regulator-state-mem\SWITCH_REG1 vcc33_lcdKpQpregulator-state-mem\LDO_REG4 vccio_sdw@/2ZKQregulator-state-mem\LDO_REG5 vcc33_sd2Z/2ZK Q regulator-state-mem\LDO_REG8 vcc33_ccd2Z/2Zregulator-state-memu2Zi2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultGokay12I pwm@ff680000rockchip,rk3288-pwmhdefaultH8^pwmokayKzQzpwm@ff680010rockchip,rk3288-pwmhdefaultI8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultJ8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultK8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh# KOQOpd_vio@9 8chgfdehilkjpd_hevc@11 8oppd_video@12 8pd_gpu@13 8syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv?Hjk$#gׄeрxhрxhKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwK?Q?edp-phyrockchip,rk3288-dp-phy8h24mokayKZQZwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8T[L`tx 6defaultM? disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5[LL`txrxi2s_hclki2s_clk8RdefaultN  disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk Ocrypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop&O def Oaxiahbdclk4PokayportK Q endpoint@0;QK_Q_endpoint@1;RK[Q[endpoint@2;SKXQXiommu@ff930300rockchip,iommu  vopb_mmu&O KokayKPQPvop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop&O  Oaxiahbdclk4TokayportK Q endpoint@0;UK`Q`endpoint@1;VK\Q\endpoint@2;WKYQYiommu@ff940300rockchip,iommu  vopl_mmu&O KokayKTQTmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclk&O ? disabledportsportendpoint@0;XKSQSendpoint@1;YKWQWdp@ff970000rockchip,rk3288-dp@ b8icdppclkZdpoOdp?okayXportsport@0endpoint@0;[KRQRendpoint@1;\KVQVport@1endpoint;]KQhdmi@ff980000rockchip,rk3288-dw-hdmi? g8hm iahbisfr&O okayb^portsportendpoint@0;_KQQQendpoint@1;`KUQUinterrupt-controller@ffc01000 arm,gic-400n  @ `   KQefuse@ffb40000rockchip,rockchip-efuse 8q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy?okayusb-phy@320 8]phyclkKBQBusb-phy@33448^phyclkK@Q@usb-phy@348H8_phyclkKAQApinctrlrockchip,rk3288-pinctrl?Ydefaultsleepab,acgpio0@ff750000rockchip,gpio-banku Q8@nKDQDgpio1@ff780000rockchip,gpio-bankx R8Angpio2@ff790000rockchip,gpio-banky S8BnKoQogpio3@ff7a0000rockchip,gpio-bankz T8Cngpio4@ff7b0000rockchip,gpio-bank{ U8DnKtQtgpio5@ff7c0000rockchip,gpio-bank| V8EnKwQwgpio6@ff7d0000rockchip,gpio-bank} W8Fngpio7@ff7e0000rockchip,gpio-bank~ X8GnK Q gpio8@ff7f0000rockchip,gpio-bank Y8Hnhdmihdmi-ddc ddvcc50-hdmi-endKxQxpcfg-pull-upKeQepcfg-pull-downKfQfpcfg-pull-noneKdQdpcfg-pull-none-12ma KhQhsleepglobal-pwroffdKaQaddrio-pwroffdddr0-retentioneddr1-retentioneedpedp-hpd fi2c0i2c0-xfer ddKCQCi2c1i2c1-xfer ddK,Q,i2c2i2c2-xfer  d dKGQGi2c3i2c3-xfer ddK-Q-i2c4i2c4-xfer ddK.Q.i2c5i2c5-xfer ddK1Q1i2s0i2s0-bus`ddddddKNQNsdmmcsdmmc-clkgKQsdmmc-cmdgKQsdmmc-cdesdmmc-bus1esdmmc-bus4@ggggKQsdmmc-cd-disableddKQsdmmc-cd-gpiodKQsdio0sdio0-bus1esdio0-bus4@ggggKQsdio0-cmdgKQsdio0-clkgKQsdio0-cdesdio0-wpesdio0-pwresdio0-bkpwresdio0-intewifienable-hdKsQsbt-enable-ldKrQrsdio1sdio1-bus1esdio1-bus4@eeeesdio1-cdesdio1-wpesdio1-bkpwresdio1-intesdio1-cmdesdio1-clkdsdio1-pwr eemmcemmc-clkgKQemmc-cmdgKQemmc-pwr eemmc-bus1eemmc-bus4@eeeeemmc-bus8ggggggggKQemmc-reset dKnQnspi0spi0-clk eKQspi0-cs0 eK"Q"spi0-txeK Q spi0-rxeK!Q!spi0-cs1espi1spi1-clk eK$Q$spi1-cs0 eK'Q'spi1-rxeK&Q&spi1-txeK%Q%spi2spi2-cs1espi2-clkeK(Q(spi2-cs0eK+Q+spi2-rxeK*Q*spi2-tx eK)Q)uart0uart0-xfer edK2Q2uart0-ctseK3Q3uart0-rtsdK4Q4uart1uart1-xfer e dK5Q5uart1-cts euart1-rts duart2uart2-xfer edK6Q6uart3uart3-xfer edK7Q7uart3-cts euart3-rts duart4uart4-xfer  e dK8Q8uart4-ctseuart4-rtsdtsadcotp-gpio dK=Q=otp-out dK>Q>pwm0pwm0-pindKHQHpwm1pwm1-pindKIQIpwm2pwm2-pindKJQJpwm3pwm3-pindKKQKgmacrgmii-pinsddddhhhhddd hhddrmii-pinsddddddddddspdifspdif-tx dKMQMpcfg-pull-none-drv-8maKgQgpcfg-pull-up-drv-8mapcfg-output-highKjQjpcfg-output-low KiQibuttonspwr-key-leKkQkap-lid-int-leKlQlpmicpmic-int-leKEQEdvs-1 fdvs-2frebootap-warm-reset-h dKmQmrecovery-switchrec-mode-l etpmtpm-int-hdwrite-protectfw-wp-apdbacklightbl-endKyQybl_pwr_en dKQchargerac-present-apeK|Q|cros-ecec-intdK#Q#suspendsuspend-l-wakeiKbQbsuspend-l-sleepjKcQctrackpadtrackpad-inteK/Q/usb-hosthost1-pwr-en dKQusbotg-pwren-h dKQbuck-5vdrv-5vdKvQvlcdlcd-endKQavdd-1v8-disp-en dKQgpio-keys gpio-keysdefaultklpower Power SD t dlid Lid SD  0 gpio-restart gpio-restart SD defaultm Aemmc-pwrseqmmc-pwrseq-emmcndefault Jo KQio-domains"rockchip,rk3288-io-voltage-domain? V0 ` k y0 0 p  sdio-pwrseqmmc-pwrseq-simple8q ext_clockdefaultrs JtKQvcc-5vregulator-fixedvcc_5vLK@/LK@ u  defaultvKFQFvcc33-sysregulator-fixed vcc33_sys2Z/2Z uKQvcc50-hdmiregulator-fixed vcc50_hdmi F  wdefaultxbacklightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~   defaulty +zB@ 0' ={K~Q~gpio-charger gpio-charger Jmains SDdefault|panelinnolux,n116bgesimple-panelokay =} W~portsportendpoint;K]Q]vccsysregulator-fixedvccsysKuQuvcc5-host1-regulatorregulator-fixed  D default vcc5_host1vcc5v-otg-regulatorregulator-fixed  D default vcc5_host2panel-regulatorregulator-fixed  defaultpanel_regulator a K}Q}vcc18-lcdregulator-fixed  o default vcc18_lcd backlight-regulatorregulator-fixed  o defaultbacklight_regulator  a:K{Q{ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cells#reset-cells#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsforce-hpdddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplysdcard-supplyvin-supplyenable-active-highgpiobrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uspower-supplycharger-typebacklightstartup-delay-us