=8:(:,Xunlong Orange Pi 2&2xunlong,orangepi-2allwinner,sun8i-h3chosen=serial0:115200n8aliasesI/soc/serial@01c28000memoryQmemory]cpuscpu@02arm,cortex-a7Qcpu]cpu@12arm,cortex-a7Qcpu]cpu@22arm,cortex-a7Qcpu]cpu@32arm,cortex-a7Qcpu]timer2arm,armv7-timer0a   clockslosc24M_clks 2fixed-clockn6osc24Mosc32k_clks 2fixed-clockosc32kclk@01c20000s2allwinner,sun8i-a23-pll1-clk]pll1pll5_clks 2fixed-clockpll5clk@01c20028s2allwinner,sun6i-a31-pll6-clk]( pll6pll6x2pll6d2_clks2fixed-factor-clockpll6d2  pll8_clks 2fixed-clockpll8  cpu_clk@01c20050s2allwinner,sun4i-a10-cpu-clk]Pcpuaxi_clk@01c20050s2allwinner,sun4i-a10-axi-clk]Paxiahb1_clk@01c20054s2allwinner,sun6i-a31-ahb1-clk]Tahb1ahb2_clk@01c2005cs2allwinner,sun8i-h3-ahb2-clk]\ ahb2  apb1_clk@01c20054s2allwinner,sun4i-a10-apb0-clk]Tapb1  apb2_clk@01c20058s2allwinner,sun4i-a10-apb1-clk]Xapb2  clk@01c20060s!2allwinner,sun8i-h3-bus-gates-clk]` ahb1ahb2apb1apb2  #$%()+,456@AEHLMN`abpqrstbus_cebus_dmabus_mmc0bus_mmc1bus_mmc2bus_nandbus_sdrambus_gmacbus_tsbus_hstimerbus_spi0bus_spi1bus_otgbus_otg_ehci0bus_ehci1bus_ehci2bus_ehci3bus_otg_ohci0bus_ohci1bus_ohci2bus_ohci3bus_vebus_lcd0bus_lcd1bus_deintbus_csibus_tvebus_hdmibus_debus_gpubus_msgboxbus_spinlockbus_codecbus_spdifbus_piobus_thsbus_i2s0bus_i2s1bus_i2s2bus_i2c0bus_i2c1bus_i2c2bus_uart0bus_uart1bus_uart2bus_uart3bus_scrbus_ephybus_dbgclk@01c20088s2allwinner,sun4i-a10-mmc-clk] mmc0mmc0_outputmmc0_sampleclk@01c2008cs2allwinner,sun4i-a10-mmc-clk] mmc1mmc1_outputmmc1_sampleclk@01c20090s2allwinner,sun4i-a10-mmc-clk] mmc2mmc2_outputmmc2_sampleclk@01c200ccs2allwinner,sun8i-h3-usb-clk]Lusb_phy0usb_phy1usb_phy2usb_phy3usb_ohci0usb_ohci1usb_ohci2usb_ohci3clk@01c2015cs2allwinner,sun8i-a23-mbus-clk]\mbusapb0_clk2fixed-factor-clocksapb0clk@01f01428@2allwinner,sun8i-h3-apb0-gates-clkallwinner,sun4i-a10-gates-clk](sapb0_pioapb0_ir!!ir_clk@01f014542allwinner,sun4i-a10-mod0-clk]Tsir""soc 2simple-busldma-controller@01c020002allwinner,sun8i-h3-dma]  a2mmc@01c0f0002allwinner,sun5i-a13-mmc] ahbmmcoutputsampleahb a<okaydefault'1=GPmmc@01c100002allwinner,sun5i-a13-mmc]  ahbmmcoutputsample ahb a=okaydefault'1\=gmmc@01c110002allwinner,sun5i-a13-mmc]  ahbmmcoutputsample ahb a> disabledphy@01c194002allwinner,sun8i-h3-usb-phy(],uphy_ctrlpmu0pmu1pmu2pmu3    $usb0_phyusb1_phyusb2_phyusb3_phy ,usb0_resetusb1_resetusb2_resetusb3_resetokayusb@01c1b000%2allwinner,sun8i-h3-ehcigeneric-ehci] aJusbokayusb@01c1b400%2allwinner,sun8i-h3-ohcigeneric-ohci] aKusb disabledusb@01c1c000%2allwinner,sun8i-h3-ehcigeneric-ehci] aLusb disabledusb@01c1c400%2allwinner,sun8i-h3-ohcigeneric-ohci] aMusb disabledusb@01c1d000%2allwinner,sun8i-h3-ehcigeneric-ehci] aNusb disabledusb@01c1d400%2allwinner,sun8i-h3-ohcigeneric-ohci] aOusb disabledpinctrl@01c208002allwinner,sun8i-h3-pinctrl]a Euart0@0PA4PA5uart0  mmc0@0PF0PF1PF2PF3PF4PF5mmc0mmc0_cd_pin@0PF6gpio_inmmc1@0PG0PG1PG2PG3PG4PG5mmc1mmc2_8bit3PC5PC6PC8PC9PC10PC11PC12PC13PC14PC15PC16mmc2ahci_pwr_pin@0PB8 gpio_out%%usb0_vbus_pin@0PB9 gpio_out&&usb1_vbus_pin@0PG13 gpio_out''usb2_vbus_pin@0PH3 gpio_out((led_pins@0PA15 gpio_out))reset@01c202c02allwinner,sun6i-a31-ahb1-reset] reset@01c202d0 2allwinner,sun6i-a31-clock-reset]reset@01c202d8 2allwinner,sun6i-a31-clock-reset]timer@01c20c002allwinner,sun4i-a10-timer] awatchdog@01c20ca02allwinner,sun6i-a31-wdt]  aserial@01c280002snps,dw-apb-uart]€ a-7pDIrxtxokaydefault' serial@01c284002snps,dw-apb-uart]„ a-7qDIrxtx disabledserial@01c288002snps,dw-apb-uart]ˆ a-7rDIrxtx disabledserial@01c28c002snps,dw-apb-uart]Œ a-7sD  Irxtx disabledinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic ] @ `  a rtc@01f000002allwinner,sun6i-a31-rtc]Ta()reset@01f014b0] 2allwinner,sun6i-a31-clock-reset##ir@01f020002allwinner,sun5i-a13-ir !"apbir# a%] @okaydefault'$pinctrl@01f02c002allwinner,sun8i-h3-r-pinctrl], a-!#++ir@0PL11 s_cir_rx$$led_pins@0PL10 gpio_out**key_pins@0PL3PL4gpio_in,,wifi_pwrseq_pin@0PL7 gpio_out--ahci-5v2regulator-fixeddefault'%Sahci-5vbLK@zLK@ disabledusb0-vbus2regulator-fixeddefault'& Susb0-vbusbLK@zLK@  disabledusb1-vbus2regulator-fixeddefault'' Susb1-vbusbLK@zLK@ okayusb2-vbus2regulator-fixeddefault'( Susb2-vbusbLK@zLK@ disabledvcc3v02regulator-fixedSvcc3v0b-z-vcc3v32regulator-fixedSvcc3v3b2Zz2Zvcc5v02regulator-fixedSvcc5v0bLK@zLK@leds 2gpio-ledsdefault')*status_ledorangepi:red:statusJpwr_ledorangepi:green:pwrJ+ onr_gpio_keys 2gpio-keysdefault',sw2sw2J+sw4sw4J+wifi_pwrseq2mmc-pwrseq-simpledefault'-+ #address-cells#size-cellsinterrupt-parentmodelcompatiblestdout-pathserial0device_typereginterruptsranges#clock-cellsclock-frequencyclock-output-nameslinux,phandleclocksclock-divclock-multclock-namesclock-indices#reset-cellsresets#dma-cellsreset-namesstatuspinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedmmc-pwrseqnon-removablereg-names#phy-cellsusb1_vbus-supplyphysphy-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pullreg-shiftreg-io-widthdmasdma-namesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiolabeldefault-statelinux,codereset-gpios