[+8O4( NNcompulab,sbc-am57xcompulab,cl-som-am57xti,am5728ti,dra742ti,dra74ti,dra7&&7CompuLab CL-SOM-AM57x on SB-SOM-AM57xchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000 /display#/ocp/dss@58000000/encoder@58060000memorymemory timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! 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"&"dpll_iva_m2_ck@1b0zti,divider-clock`"<GYp #&#iva_dclkzfixed-factor-clock`#'2 &dpll_gpu_byp_mux@2e4z ti,mux-clock` $&$dpll_gpu_ck@2d8zti,omap4-dpll-clock`$ %&%dpll_gpu_m2_ck@2e8zti,divider-clock`%<GYp p&pdpll_core_m2_ck@130zti,divider-clock`<G0Yp &&&core_dpll_out_dclk_divzfixed-factor-clock`&'2 &dpll_ddr_byp_mux@21cz ti,mux-clock` '&'dpll_ddr_ck@210zti,omap4-dpll-clock`' (&(dpll_ddr_m2_ck@220zti,divider-clock`(<G Yp &dpll_gmac_byp_mux@2b4z ti,mux-clock` )&)dpll_gmac_ck@2a8zti,omap4-dpll-clock`) *&*dpll_gmac_m2_ck@2b8zti,divider-clock`*<GYp m&mvideo2_dclk_divzfixed-factor-clock`+'2 &video1_dclk_divzfixed-factor-clock`,'2 &hdmi_dclk_divzfixed-factor-clock`-'2 &per_dpll_hs_clk_divzfixed-factor-clock`'2 Z&Zusb_dpll_hs_clk_divzfixed-factor-clock`'2 ^&^eve_dpll_hs_clk_divzfixed-factor-clock`'2 .&.dpll_eve_byp_mux@290z ti,mux-clock`. /&/dpll_eve_ck@284zti,omap4-dpll-clock`/ 0&0dpll_eve_m2_ck@294zti,divider-clock`0<GYp 1&1eve_dclk_divzfixed-factor-clock`1'2 &dpll_core_h13x2_ck@140zti,divider-clock`<?G@Ypdpll_core_h14x2_ck@144zti,divider-clock`<?GDYp n&ndpll_core_h22x2_ck@154zti,divider-clock`<?GTYp 8&8dpll_core_h23x2_ck@158zti,divider-clock`<?GXYp y&ydpll_core_h24x2_ck@15czti,divider-clock`<?G\Ypdpll_ddr_x2_ckzti,omap4-dpll-x2-clock`( 2&2dpll_ddr_h11x2_ck@228zti,divider-clock`2<?G(Ypdpll_dsp_x2_ckzti,omap4-dpll-x2-clock` 3&3dpll_dsp_m3x2_ck@248zti,divider-clock`3<GHYp &dpll_gmac_x2_ckzti,omap4-dpll-x2-clock`* 4&4dpll_gmac_h11x2_ck@2c0zti,divider-clock`4<?GYp 5&5dpll_gmac_h12x2_ck@2c4zti,divider-clock`4<?GYpdpll_gmac_h13x2_ck@2c8zti,divider-clock`4<?GYpdpll_gmac_m3x2_ck@2bczti,divider-clock`4<GYpgmii_m_clk_divzfixed-factor-clock`5'2hdmi_clk2_divzfixed-factor-clock`-'2 J&Jhdmi_div_clkzfixed-factor-clock`-'2 P&Pl3_iclk_div@100zti,divider-clock<` & l4_root_clk_divzfixed-factor-clock` '2 & video1_clk2_divzfixed-factor-clock`6'2 H&Hvideo1_div_clkzfixed-factor-clock`6'2 N&Nvideo2_clk2_divzfixed-factor-clock`7'2 I&Ivideo2_div_clkzfixed-factor-clock`7'2 O&Oipu1_gfclk_mux@520z ti,mux-clock`8 mcasp1_ahclkr_mux@550z ti,mux-clock8`9:;<=>?@ABCDEFP &mcasp1_ahclkx_mux@550z ti,mux-clock8`9:;<=>?@ABCDEFP &mcasp1_aux_gfclk_mux@550z ti,mux-clock`GHIJP &timer5_gfclk_mux@558z ti,mux-clock0`KL@ABCDMNOPQXtimer6_gfclk_mux@560z ti,mux-clock0`KL@ABCDMNOPQ`timer7_gfclk_mux@568z ti,mux-clock0`KL@ABCDMNOPQhtimer8_gfclk_mux@570z ti,mux-clock0`KL@ABCDMNOPQpuart6_gfclk_mux@580z ti,mux-clock`RSdummy_ckz fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200zti,omap4-dpll-clock`  T&Tdpll_pcie_ref_m2ldo_ck@210zti,divider-clock`T<GYp U&Uapll_pcie_in_clk_mux@4ae06118 ti,mux-clock`UVz W&Wapll_pcie_ck@21czti,dra7-apll-clock`WT  X&Xoptfclk_pciephy1_32khz@4a0093b0ti,gate-clock`Lz &optfclk_pciephy2_32khz@4a0093b8ti,gate-clock`Lz &optfclk_pciephy_div@4a00821cti,divider-clock`Xz< Y&Yoptfclk_pciephy1_clk@4a0093b0ti,gate-clock`Xz  &optfclk_pciephy2_clk@4a0093b8ti,gate-clock`Xz  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r&rfunc_12m_fclkzfixed-factor-clock`S'2func_24m_clkzfixed-factor-clock`]'2 ;&;func_48m_fclkzfixed-factor-clock`S'2 R&Rfunc_96m_fclkzfixed-factor-clock`S'2l3init_60m_fclk@104zti,divider-clock`cclkout2_clk@6b0zti,gate-clock`dl3init_960m_gfclk@6c0zti,gate-clock`e j&jdss_32khz_clk@1120zti,gate-clock`L  dss_48mhz_clk@1120zti,gate-clock`R   &dss_dss_clk@1120zti,gate-clock`f  &dss_hdmi_clk@1120zti,gate-clock`g   &dss_video1_clk@1120zti,gate-clock`h   &dss_video2_clk@1120zti,gate-clock`i   &gpio2_dbclk@1760zti,gate-clock`L`gpio3_dbclk@1768zti,gate-clock`Lhgpio4_dbclk@1770zti,gate-clock`Lpgpio5_dbclk@1778zti,gate-clock`Lxgpio6_dbclk@1780zti,gate-clock`Lgpio7_dbclk@1810zti,gate-clock`Lgpio8_dbclk@1818zti,gate-clock`Lmmc1_clk32k@1328zti,gate-clock`L(mmc2_clk32k@1330zti,gate-clock`L0mmc3_clk32k@1820zti,gate-clock`L mmc4_clk32k@1828zti,gate-clock`L(sata_ref_clk@1388zti,gate-clock` &usb_otg_ss1_refclk960m@13f0zti,gate-clock`j &usb_otg_ss2_refclk960m@1340zti,gate-clock`j@ &usb_phy1_always_on_clk32k@640zti,gate-clock`L@ &usb_phy2_always_on_clk32k@688zti,gate-clock`L &usb_phy3_always_on_clk32k@698zti,gate-clock`L &atl_dpll_clk_mux@c00z ti,mux-clock`L67-  l&latl_gfclk_mux@c00z ti,mux-clock ` kl  &gmac_gmii_ref_clk_div@13d0zti,divider-clock`m &gmac_rft_clk_mux@13d0z ti,mux-clock`67k- gpu_core_gclk_mux@1220z ti,mux-clock `nop gpu_hyd_gclk_mux@1220z ti,mux-clock `nop l3instr_ts_gclk_div@e50zti,divider-clock`qP  mcasp2_ahclkr_mux@1860z ti,mux-clock8`9:;<=>?@ABCDEF` &mcasp2_ahclkx_mux@1860z ti,mux-clock8`9:;<=>?@ABCDEF` &mcasp2_aux_gfclk_mux@1860z ti,mux-clock`GHIJ` &mcasp3_ahclkx_mux@1868z ti,mux-clock8`9:;<=>?@ABCDEFh &mcasp3_aux_gfclk_mux@1868z ti,mux-clock`GHIJh &mcasp4_ahclkx_mux@1898z ti,mux-clock8`9:;<=>?@ABCDEF &mcasp4_aux_gfclk_mux@1898z ti,mux-clock`GHIJ &mcasp5_ahclkx_mux@1878z ti,mux-clock8`9:;<=>?@ABCDEFx &mcasp5_aux_gfclk_mux@1878z ti,mux-clock`GHIJx &mcasp6_ahclkx_mux@1904z ti,mux-clock8`9:;<=>?@ABCDEF &mcasp6_aux_gfclk_mux@1904z ti,mux-clock`GHIJ &mcasp7_ahclkx_mux@1908z ti,mux-clock8`9:;<=>?@ABCDEF &mcasp7_aux_gfclk_mux@1908z ti,mux-clock`GHIJ &mcasp8_ahclkx_mux@1890z ti,mux-clock8`9:;<=>?@ABCDEF &mcasp8_aux_gfclk_mux@1890z ti,mux-clock`GHIJ &mmc1_fclk_mux@1328z ti,mux-clock`rS( s&smmc1_fclk_div@1328zti,divider-clock`s<(mmc2_fclk_mux@1330z ti,mux-clock`rS0 t&tmmc2_fclk_div@1330zti,divider-clock`t<0mmc3_gfclk_mux@1820z ti,mux-clock`RS  u&ummc3_gfclk_div@1820zti,divider-clock`u< mmc4_gfclk_mux@1828z ti,mux-clock`RS( v&vmmc4_gfclk_div@1828zti,divider-clock`v<(qspi_gfclk_mux@1838z ti,mux-clock`rw8 x&xqspi_gfclk_div@1838zti,divider-clock`x<8 &timer10_gfclk_mux@1728z ti,mux-clock,`KL@ABCDMNOP(timer11_gfclk_mux@1730z ti,mux-clock,`KL@ABCDMNOP0timer13_gfclk_mux@17c8z ti,mux-clock,`KL@ABCDMNOPtimer14_gfclk_mux@17d0z ti,mux-clock,`KL@ABCDMNOPtimer15_gfclk_mux@17d8z ti,mux-clock,`KL@ABCDMNOPtimer16_gfclk_mux@1830z ti,mux-clock,`KL@ABCDMNOP0timer2_gfclk_mux@1738z ti,mux-clock,`KL@ABCDMNOP8timer3_gfclk_mux@1740z ti,mux-clock,`KL@ABCDMNOP@timer4_gfclk_mux@1748z ti,mux-clock,`KL@ABCDMNOPHtimer9_gfclk_mux@1750z ti,mux-clock,`KL@ABCDMNOPPuart1_gfclk_mux@1840z ti,mux-clock`RS@uart2_gfclk_mux@1848z ti,mux-clock`RSHuart3_gfclk_mux@1850z ti,mux-clock`RSPuart4_gfclk_mux@1858z ti,mux-clock`RSXuart5_gfclk_mux@1870z ti,mux-clock`RSpuart7_gfclk_mux@18d0z ti,mux-clock`RSuart8_gfclk_mux@18e0z ti,mux-clock`RSuart9_gfclk_mux@18e8z ti,mux-clock`RSvip1_gclk_mux@1020z ti,mux-clock` y vip2_gclk_mux@1028z ti,mux-clock` y(vip3_gclk_mux@1030z ti,mux-clock` y0clockdomainscoreaon_clkdmti,clockdomain``l4@4ae00000ti,dra7-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110z ti,mux-clock`z{|}~Y &abe_dpll_sys_clk_mux@118z ti,mux-clock`@ &abe_dpll_bypass_clk_mux@114z ti,mux-clock`L &abe_dpll_clk_mux@10cz ti,mux-clock`L  &abe_24m_fclk@11czti,divider-clock` 9&9aess_fclk@178zti,divider-clock`x< &abe_giclk_div@174zti,divider-clock`t< M&Mabe_lp_clk_div@1d8zti,divider-clock`  &abe_sys_clk_div@120zti,divider-clock` < :&:adc_gfclk_mux@1dcz ti,mux-clock `@Lsys_clk1_dclk_div@1c8zti,divider-clock`<@ &sys_clk2_dclk_div@1cczti,divider-clock`@<@ &per_abe_x1_dclk_div@1bczti,divider-clock`k<@ &dsp_gclk_div@18czti,divider-clock`<@ &gpu_dclk@1a0zti,divider-clock`p<@ &emif_phy_dclk_div@190zti,divider-clock`<@ &gmac_250m_dclk_div@19czti,divider-clock`m<@ &l3init_480m_dclk_div@1aczti,divider-clock`c<@ &usb_otg_dclk_div@184zti,divider-clock`<@ &sata_dclk_div@1c0zti,divider-clock`<@ &pcie2_dclk_div@1b8zti,divider-clock`<@ &pcie_dclk_div@1b4zti,divider-clock`<@ &emu_dclk_div@194zti,divider-clock`<@ &secure_32k_dclk_div@1c4zti,divider-clock`<@ &clkoutmux0_clk_mux@158z ti,mux-clockX`X Q&Qclkoutmux1_clk_mux@15cz ti,mux-clockX`\clkoutmux2_clk_mux@160z ti,mux-clockX`` d&dcustefuse_sys_gfclk_divzfixed-factor-clock`'2eve_clk@180z ti,mux-clock`1hdmi_dpll_clk_mux@164z ti,mux-clock`@d g&gmlb_clk@134zti,divider-clock`<@4 E&Emlbp_clk@130zti,divider-clock`<@0 F&Fper_abe_x1_gfclk2_div@138zti,divider-clock`k<@8 G&Gtimer_sys_clk_div@144zti,divider-clock`D< K&Kvideo1_dpll_clk_mux@168z ti,mux-clock`@h h&hvideo2_dpll_clk_mux@16cz ti,mux-clock`@l i&iwkupaon_iclk_mux@108z ti,mux-clock` q&qgpio1_dbclk@1838zti,gate-clock`L8dcan1_sys_clk_mux@1888z ti,mux-clock`@ &timer1_gfclk_mux@1840z ti,mux-clock,`KL@ABCDMNOP@uart10_gfclk_mux@1880z ti,mux-clock`RSclockdomainsscm_conf@c000syscon &axi@0 simple-busQQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci00 00pcie1 pcie-phy0`interrupt-controller &axi@1 simple-busQQ00 disabledpcie@51800000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci00000pcie2 pcie-phy0`interrupt-controller &ocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000 disabled mmio-sram@@ @@ocmcram@40500000 disabled mmio-sram@P @Pbandgap@4a0021e00J! J#, J#,J#xtxrxokaydefault  mmc@480b4000ti,omap4-hsmmcH @ Qmmc2s/0xtxrxokaydefaultmmc@480ad000ti,omap4-hsmmcH  Ymmc3sMNxtxrx disabledmmc@480d1000ti,omap4-hsmmcH  [mmc4s9:xtxrx disabledmmu@40d01000ti,dra7-dsp-iommu@  mmu0_dsp1! disabledmmu@40d02000ti,dra7-dsp-iommu@   mmu1_dsp1! disabledmmu@58882000ti,dra7-iommuX   mmu_ipu15 disabledmmu@55082000ti,dra7-iommuU   mmu_ipu25 disabledregulator-abb-mpu ti,abb-v3;abb_mpu`K2\(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addresslH,@vregulator-abb-ivahd ti,abb-v3 ;abb_ivahd`K2\(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-addressl@H0regulator-abb-dspeve ti,abb-v3 ;abb_dspeve`K2\(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-addressl H0regulator-abb-gpu ti,abb-v3;abb_gpu`K2\(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-addresslHvspi@48098000ti,omap4-mcspiH  <mcspi1@s#$%&'()* xtx0rx0tx1rx1tx2rx2tx3rx3 disabledspi@4809a000ti,omap4-mcspiH  =mcspi2 s+,-.xtx0rx0tx1rx1 disabledspi@480b8000ti,omap4-mcspiH  Vmcspi3sxtx0rx0 disabledspi@480ba000ti,omap4-mcspiH  +mcspi4sFGxtx0rx0 disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmapXqspi`gfck Wokaydefaultlspi_flash@0spansion,m25p80jedec,spi-norlpartition@0uboot partition@c0000uboot environment partition@100000 reservedads7846@0default ti,ads7846`&  )2BRb rNocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlt`gsysclkrefclk &pciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_tx`TUY;gdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk &pciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx `TUY;gdpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk disabled &sata@4a141100snps,dwc-ahciJJ 1 sata-phy`sataokayrtc@48838000ti,am3352-rtcHrtcss`Locp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1phy@4a084000 ti,omap-usb2J@`gwkupclkrefclk &phy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPt`gwkupclkrefclk &phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlp `gwkupclksysclkrefclk &omap_dwc3_1@48880000ti,dwc3 usb_otg_ss1H Husb@48890000 snps,dwc3Hp$GGH*peripheralhostotgusb2-phyusb3-phy super-speedhostdefaultomap_dwc3_2@488c0000ti,dwc3 usb_otg_ss2H Wusb@488d0000 snps,dwc3Hp$IIW*peripheralhostotg usb2-phy high-speedhostomap_dwc3_3@48900000ti,dwc3 usb_otg_ss3H X disabledusb@48910000 snps,dwc3Hp$XXX*peripheralhostotg high-speedotgelm@48078000ti,am3352-elmH elm disabledgpmc@50000000ti,am3352-gpmcgpmcP|  sxrxtx"CS disabledatl@4843c000 ti,dra7-atlHCatl4?>=<`gfck disabledmcasp@48460000ti,dra7-mcasp-audiomcasp1HF Empudathg*txrxsxtxrx `gfckahclkxahclkr disabledmcasp@48464000ti,dra7-mcasp-audiomcasp2HF@ Empudat*txrxsxtxrx `gfckahclkxahclkr disabledmcasp@48468000ti,dra7-mcasp-audiomcasp3HF Fmpudat*txrxsxtxrx` gfckahclkxokaydefaultsleepGQYc &mcasp@4846c000ti,dra7-mcasp-audiomcasp4HF HC`mpudat*txrxsxtxrx` gfckahclkx disabledmcasp@48470000ti,dra7-mcasp-audiomcasp5HG HCmpudat*txrxsxtxrx` gfckahclkx disabledmcasp@48474000ti,dra7-mcasp-audiomcasp6HG@ HDmpudat*txrxsxtxrx` gfckahclkx disabledmcasp@48478000ti,dra7-mcasp-audiomcasp7HG HEmpudat*txrxsxtxrx` gfckahclkx disabledmcasp@4847c000ti,dra7-mcasp-audiomcasp8HG HE@mpudat*txrxsxtxrx` gfckahclkx disabledcrossbar@4a002a48ti,irq-crossbarJ*H0&nz   &ethernet@48484000ti,dra7-cpswti,cpswgmac`* gfckcpts      .HH@HHR. ?0NOPQ4okaydefaultsleepG Jmdio@48485000ti,cpsw-mdioti,davinci_mdio davinci_mdio TB@HHPdefaultsleepG &slave@48480200 ] i prgmii-txid yslave@48480300 ] i prgmii-txid ycpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_candcan1J  X ` disabledcan@481d0000ti,dra7-d_candcan2HH  X ` disableddss@58000000 ti,dra7-dssok dss_core 8(XX@TXC XTX (dsspll1_clkctrlpll1pll2_clkctrlpll2 `gfckvideo1_clkvideo2_clk dispc@58001000ti,dra7-dispcX  dss_dispc`gfck 4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore `ok dss_hdmi` gfcksys_clk defaultportendpoint    & portendpoint   &epwmss@4843e000 ti,dra746-pwmssti,am33xx-pwmssHC0epwmss0 disabledpwm@4843e200"ti,dra746-ehrpwmti,am3352-ehrpwm HC`  gtbclkfck disabledecap@4843e100ti,dra746-ecapti,am3352-ecap HC` gfck disabledepwmss@48440000 ti,dra746-pwmssti,am33xx-pwmssHD0epwmss1 disabledpwm@48440200"ti,dra746-ehrpwmti,am3352-ehrpwm HD`  gtbclkfck disabledecap@48440100ti,dra746-ecapti,am3352-ecap HD` gfck disabledepwmss@48442000 ti,dra746-pwmssti,am33xx-pwmssHD 0epwmss2 disabledpwm@48442200"ti,dra746-ehrpwmti,am3352-ehrpwm HD"`  gtbclkfck disabledecap@48442100ti,dra746-ecapti,am3352-ecap HD!` gfck disabledaes@4b500000 ti,omap4-aesaes1KP Psonxtxrx` gfckaes@4b700000 ti,omap4-aesaes2Kp ;srqxtxrx` gfckdes@480a5000 ti,omap4-desdesH P Msutxtxrx` gfcksham@53100000ti,omap5-shamshamK . swxrx` gfckrng@48090000 ti,omap4-rngrngH  /` gfckdsp_system@41500000sysconAP &omap_dwc3_4@48940000ti,dwc3 usb_otg_ss4H Z disabledusb@48950000 snps,dwc3Hp$YYZ*peripheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  mmu0_dsp2! disabledmmu@41502000ti,dra7-dsp-iommuAP   mmu1_dsp2! disabledthermal-zonescpu_thermal   tripscpu_alert . :passive &cpu_crit .H : criticalcooling-mapsmap0 E Jgpu_thermal   tripsgpu_crit .H : criticalcore_thermal   tripscore_crit .H : criticaldspeve_thermal   tripsdspeve_crit .H : criticaliva_thermal   tripsiva_crit .H : criticalpmuarm,cortex-a15-pmu&leds gpio-ledsdefaultled@0cl-som-am57x:green  Yheartbeat oofffixedregulator-vdd_3v3regulator-fixed;vdd_3v3J2Zb2Z &fixedregulator-ads7846-regregulator-fixed ;ads7846-regJ2Zb2Z &sound0simple-audio-card }CL-SOM-AM57x-Sound-Card i2s  C HeadphoneHeadphone JackMicrophoneMicrophone JackLineLine Jackf Headphone JackRHPOUTHeadphone JackLHPOUTLLINEINLine JackMICINMic BiasMic BiasMicrophone Jacksimple-audio-card,cpu " &simple-audio-card,codec " ,fixedregulator-v3_3regulator-fixed;vsb_3v3J2Zb2Z( Cdisplay!startek,startek-kd050cpanel-dpilcddefault Vpanel-timing@ c  k s( ( +       portendpoint   &connectorhdmi-connectorhdmiadefault  portendpoint   & #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0display0display1device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleoperating-points-v2ti,syscon-efuseti,syscon-revclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-toleranceopp-sharedopp-hzopp-microvoltopp-supported-hwopp-suspendti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsti,no-reset-on-initdmasdma-namespinctrl-namespinctrl-0#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellsti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondspagesize#sound-dai-cellsti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpioswp-gpiosti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsspi-max-frequencylabelvcc-supplypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,provided-clockspinctrl-1op-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_rammac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointdata-lines#pwm-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicelinux,default-triggerdefault-statesimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpios