Zz8M4( FL(ti,dra72-evmti,dra722ti,dra72ti,dra7& 7TI DRA722chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000 /connectormemorymemory@timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&cpuscpu@0cpuarm,cortex-a15%9 IW^cpujxopp_table0operating-points-v2opp_nom@1000000000; , P0opp_od@1176000000FV @ @socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busl3_main_1l3_main_2 DE  l4@4a000000ti,dra7-l4-cfgsimple-bus J"scm@2000ti,dra7-scm-coresimple-bus   scm_conf@0sysconsimple-bus pbias_regulator@e00ti,pbias-dra7ti,pbias-omap pbias_mmc_omap5pbias_mmc_omap5#w@;-clocksdss_deshdcp_clk@558Sti,gate-clockW`Xehrpwm0_tbclk@558Sti,gate-clockW `Xehrpwm1_tbclk@558Sti,gate-clockW `Xehrpwm2_tbclk@558Sti,gate-clockW `Xsys_32k_ckS ti,mux-clockW `KKpinmux@1400ti,dra7-padconfpinctrl-singlehm ?pinmux_i2c1_pinspinmux_i2c5_pins  nand_default  $(,048<pinmux_usb1_pins pinmux_usb2_pins tps65917_pins_default$mmc1_pins_default8lTX\`dhmmc2_pins_defaultPdcan1_pins_defaultdcan1_pins_sleeppinmux_hdmi_pins pinmux_tpd12s015_pinspinmux_atl_pinspinmux_mcasp3_pins $(,0pinmux_mcasp3_sleep_pins $(,0cpsw_default`cpsw_sleep`davinci_mdio_default<@davinci_mdio_sleep<@scm_conf@1c04syscon scm_conf@1c24syscon$$dma-router@b78ti,dra7-dma-crossbar x dma-router@c78ti,dra7-dma-crossbar x| cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ckSti,dra7-atl-clockW>>atl_clkin1_ckSti,dra7-atl-clockW==atl_clkin2_ckSti,dra7-atl-clockW<<atl_clkin3_ckSti,dra7-atl-clockW;;hdmi_clkin_ckS fixed-clock,,mlb_clkin_ckS fixed-clockmlbp_clkin_ckS fixed-clockpciesref_acs_clk_ckS fixed-clockUUref_clkin0_ckS fixed-clock@@ref_clkin1_ckS fixed-clockAAref_clkin2_ckS fixed-clockBBref_clkin3_ckS fixed-clockCCrmii_clk_ckS fixed-clocksdvenc_clkin_ckS fixed-clocksecure_32k_clk_src_ckS fixed-clocksys_clk32_crystal_ckS fixed-clock  sys_clk32_pseudo_ckSfixed-factor-clockW b  virt_12000000_ckS fixed-clockyyvirt_13000000_ckS fixed-clock]@virt_16800000_ckS fixed-clockY{{virt_19200000_ckS fixed-clock$||virt_20000000_ckS fixed-clock1-zzvirt_26000000_ckS fixed-clock}}virt_27000000_ckS fixed-clock~~virt_38400000_ckS fixed-clockIsys_clkin2S fixed-clockX??usb_otg_clkin_ckS fixed-clockvideo1_clkin_ckS fixed-clock55video1_m2_clkin_ckS fixed-clock++video2_clkin_ckS fixed-clock66video2_m2_clkin_ckS fixed-clock**dpll_abe_ck@1e0Sti,omap4-dpll-m4xen-clockWdpll_abe_x2_ckSti,omap4-dpll-x2-clockWdpll_abe_m2x2_ck@1f0Sti,divider-clockW 2Iabe_clk@108Sti,divider-clockW`dpll_abe_m2_ck@1f0Sti,divider-clockW 2Ijjdpll_abe_m3x2_ck@1f4Sti,divider-clockW 2Idpll_core_byp_mux@12cS ti,mux-clockW`,dpll_core_ck@120Sti,omap4-dpll-core-clockW $,(dpll_core_x2_ckSti,omap4-dpll-x2-clockWdpll_core_h12x2_ck@13cSti,divider-clockW? <2Impu_dpll_hs_clk_divSfixed-factor-clockW dpll_mpu_ck@160Sti,omap5-mpu-dpll-clockW`dlhdpll_mpu_m2_ck@170Sti,divider-clockW p2Impu_dclk_divSfixed-factor-clockW dsp_dpll_hs_clk_divSfixed-factor-clockW dpll_dsp_byp_mux@240S ti,mux-clockW`@dpll_dsp_ck@234Sti,omap4-dpll-clockW48@<dpll_dsp_m2_ck@244Sti,divider-clockW D2Iiva_dpll_hs_clk_divSfixed-factor-clockW dpll_iva_byp_mux@1acS ti,mux-clockW`  dpll_iva_ck@1a0Sti,omap4-dpll-clockW !!dpll_iva_m2_ck@1b0Sti,divider-clockW! 2I""iva_dclkSfixed-factor-clockW" dpll_gpu_byp_mux@2e4S ti,mux-clockW`##dpll_gpu_ck@2d8Sti,omap4-dpll-clockW#$$dpll_gpu_m2_ck@2e8Sti,divider-clockW$ 2Ioodpll_core_m2_ck@130Sti,divider-clockW 02I%%core_dpll_out_dclk_divSfixed-factor-clockW% dpll_ddr_byp_mux@21cS ti,mux-clockW`&&dpll_ddr_ck@210Sti,omap4-dpll-clockW&''dpll_ddr_m2_ck@220Sti,divider-clockW'  2Idpll_gmac_byp_mux@2b4S ti,mux-clockW`((dpll_gmac_ck@2a8Sti,omap4-dpll-clockW())dpll_gmac_m2_ck@2b8Sti,divider-clockW) 2Illvideo2_dclk_divSfixed-factor-clockW* video1_dclk_divSfixed-factor-clockW+ hdmi_dclk_divSfixed-factor-clockW, per_dpll_hs_clk_divSfixed-factor-clockW YYusb_dpll_hs_clk_divSfixed-factor-clockW ]]eve_dpll_hs_clk_divSfixed-factor-clockW --dpll_eve_byp_mux@290S ti,mux-clockW-`..dpll_eve_ck@284Sti,omap4-dpll-clockW.//dpll_eve_m2_ck@294Sti,divider-clockW/ 2I00eve_dclk_divSfixed-factor-clockW0 dpll_core_h13x2_ck@140Sti,divider-clockW? @2Idpll_core_h14x2_ck@144Sti,divider-clockW? D2Immdpll_core_h22x2_ck@154Sti,divider-clockW? T2I77dpll_core_h23x2_ck@158Sti,divider-clockW? X2Ixxdpll_core_h24x2_ck@15cSti,divider-clockW? \2Idpll_ddr_x2_ckSti,omap4-dpll-x2-clockW'11dpll_ddr_h11x2_ck@228Sti,divider-clockW1? (2Idpll_dsp_x2_ckSti,omap4-dpll-x2-clockW22dpll_dsp_m3x2_ck@248Sti,divider-clockW2 H2Idpll_gmac_x2_ckSti,omap4-dpll-x2-clockW)33dpll_gmac_h11x2_ck@2c0Sti,divider-clockW3? 2I44dpll_gmac_h12x2_ck@2c4Sti,divider-clockW3? 2Idpll_gmac_h13x2_ck@2c8Sti,divider-clockW3? 2Idpll_gmac_m3x2_ck@2bcSti,divider-clockW3 2Igmii_m_clk_divSfixed-factor-clockW4 hdmi_clk2_divSfixed-factor-clockW, IIhdmi_div_clkSfixed-factor-clockW, OOl3_iclk_div@100Sti,divider-clock`W`l4_root_clk_divSfixed-factor-clockW   video1_clk2_divSfixed-factor-clockW5 GGvideo1_div_clkSfixed-factor-clockW5 MMvideo2_clk2_divSfixed-factor-clockW6 HHvideo2_div_clkSfixed-factor-clockW6 NNipu1_gfclk_mux@520S ti,mux-clockW7` mcasp1_ahclkr_mux@550S ti,mux-clock8W89:;<=>?@ABCDE`Pmcasp1_ahclkx_mux@550S ti,mux-clock8W89:;<=>?@ABCDE`Pmcasp1_aux_gfclk_mux@550S ti,mux-clockWFGHI`Ptimer5_gfclk_mux@558S ti,mux-clock0WJK?@ABCLMNOP`Xtimer6_gfclk_mux@560S ti,mux-clock0WJK?@ABCLMNOP``timer7_gfclk_mux@568S ti,mux-clock0WJK?@ABCLMNOP`htimer8_gfclk_mux@570S ti,mux-clock0WJK?@ABCLMNOP`puart6_gfclk_mux@580S ti,mux-clockWQR`dummy_ckS fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200Sti,omap4-dpll-clockW SSdpll_pcie_ref_m2ldo_ck@210Sti,divider-clockWS 2ITTapll_pcie_in_clk_mux@4ae06118 ti,mux-clockWTUS`VVapll_pcie_ck@21cSti,dra7-apll-clockWVS WWoptfclk_pciephy1_32khz@4a0093b0ti,gate-clockWKS`optfclk_pciephy2_32khz@4a0093b8ti,gate-clockWKS`optfclk_pciephy_div@4a00821cti,divider-clockWWSv`XXoptfclk_pciephy1_clk@4a0093b0ti,gate-clockWWS` optfclk_pciephy2_clk@4a0093b8ti,gate-clockWWS` optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockWXS` optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockWXS` apll_pcie_clkvcoldoSfixed-factor-clockWW apll_pcie_clkvcoldo_divSfixed-factor-clockWW apll_pcie_m2_ckSfixed-factor-clockWW dpll_per_byp_mux@14cS ti,mux-clockWY`LZZdpll_per_ck@140Sti,omap4-dpll-clockWZ@DLH[[dpll_per_m2_ck@150Sti,divider-clockW[ P2I\\func_96m_aon_dclk_divSfixed-factor-clockW\ dpll_usb_byp_mux@18cS ti,mux-clockW]`^^dpll_usb_ck@180Sti,omap4-dpll-j-type-clockW^__dpll_usb_m2_ck@190Sti,divider-clockW_ 2Ibbdpll_pcie_ref_m2_ck@210Sti,divider-clockWS 2Idpll_per_x2_ckSti,omap4-dpll-x2-clockW[``dpll_per_h11x2_ck@158Sti,divider-clockW`? X2Iaadpll_per_h12x2_ck@15cSti,divider-clockW`? \2Ieedpll_per_h13x2_ck@160Sti,divider-clockW`? `2Ivvdpll_per_h14x2_ck@164Sti,divider-clockW`? d2Inndpll_per_m2x2_ck@150Sti,divider-clockW` P2IRRdpll_usb_clkdcoldoSfixed-factor-clockW_ ddfunc_128m_clkSfixed-factor-clockWa qqfunc_12m_fclkSfixed-factor-clockWR func_24m_clkSfixed-factor-clockW\ ::func_48m_fclkSfixed-factor-clockWR QQfunc_96m_fclkSfixed-factor-clockWR l3init_60m_fclk@104Sti,divider-clockWbvclkout2_clk@6b0Sti,gate-clockWc`l3init_960m_gfclk@6c0Sti,gate-clockWd`iidss_32khz_clk@1120Sti,gate-clockWK`  dss_48mhz_clk@1120Sti,gate-clockWQ`  dss_dss_clk@1120Sti,gate-clockWe` dss_hdmi_clk@1120Sti,gate-clockWf`  dss_video1_clk@1120Sti,gate-clockWg`  dss_video2_clk@1120Sti,gate-clockWh`  gpio2_dbclk@1760Sti,gate-clockWK``gpio3_dbclk@1768Sti,gate-clockWK`hgpio4_dbclk@1770Sti,gate-clockWK`pgpio5_dbclk@1778Sti,gate-clockWK`xgpio6_dbclk@1780Sti,gate-clockWK`gpio7_dbclk@1810Sti,gate-clockWK`gpio8_dbclk@1818Sti,gate-clockWK`mmc1_clk32k@1328Sti,gate-clockWK`(mmc2_clk32k@1330Sti,gate-clockWK`0mmc3_clk32k@1820Sti,gate-clockWK` mmc4_clk32k@1828Sti,gate-clockWK`(sata_ref_clk@1388Sti,gate-clockW`usb_otg_ss1_refclk960m@13f0Sti,gate-clockWi`usb_otg_ss2_refclk960m@1340Sti,gate-clockWi`@usb_phy1_always_on_clk32k@640Sti,gate-clockWK`@usb_phy2_always_on_clk32k@688Sti,gate-clockWK`usb_phy3_always_on_clk32k@698Sti,gate-clockWK`atl_dpll_clk_mux@c00S ti,mux-clockWK56,` kkatl_gfclk_mux@c00S ti,mux-clock Wjk` gmac_gmii_ref_clk_div@13d0Sti,divider-clockWl`vgmac_rft_clk_mux@13d0S ti,mux-clockW56j,`gpu_core_gclk_mux@1220S ti,mux-clock Wmno` gpu_hyd_gclk_mux@1220S ti,mux-clock Wmno` l3instr_ts_gclk_div@e50Sti,divider-clockWp`P v mcasp2_ahclkr_mux@1860S ti,mux-clock8W89:;<=>?@ABCDE``mcasp2_ahclkx_mux@1860S ti,mux-clock8W89:;<=>?@ABCDE``mcasp2_aux_gfclk_mux@1860S ti,mux-clockWFGHI``mcasp3_ahclkx_mux@1868S ti,mux-clock8W89:;<=>?@ABCDE`hmcasp3_aux_gfclk_mux@1868S ti,mux-clockWFGHI`hmcasp4_ahclkx_mux@1898S ti,mux-clock8W89:;<=>?@ABCDE`mcasp4_aux_gfclk_mux@1898S ti,mux-clockWFGHI`mcasp5_ahclkx_mux@1878S ti,mux-clock8W89:;<=>?@ABCDE`xmcasp5_aux_gfclk_mux@1878S ti,mux-clockWFGHI`xmcasp6_ahclkx_mux@1904S ti,mux-clock8W89:;<=>?@ABCDE`mcasp6_aux_gfclk_mux@1904S ti,mux-clockWFGHI`mcasp7_ahclkx_mux@1908S ti,mux-clock8W89:;<=>?@ABCDE`mcasp7_aux_gfclk_mux@1908S ti,mux-clockWFGHI`mcasp8_ahclkx_mux@1890S ti,mux-clock8W89:;<=>?@ABCDE`mcasp8_aux_gfclk_mux@1890S ti,mux-clockWFGHI`mmc1_fclk_mux@1328S ti,mux-clockWqR`(rrmmc1_fclk_div@1328Sti,divider-clockWr`(`mmc2_fclk_mux@1330S ti,mux-clockWqR`0ssmmc2_fclk_div@1330Sti,divider-clockWs`0`mmc3_gfclk_mux@1820S ti,mux-clockWQR` ttmmc3_gfclk_div@1820Sti,divider-clockWt` `mmc4_gfclk_mux@1828S ti,mux-clockWQR`(uummc4_gfclk_div@1828Sti,divider-clockWu`(`qspi_gfclk_mux@1838S ti,mux-clockWqv`8wwqspi_gfclk_div@1838Sti,divider-clockWw`8`timer10_gfclk_mux@1728S ti,mux-clock,WJK?@ABCLMNO`(timer11_gfclk_mux@1730S ti,mux-clock,WJK?@ABCLMNO`0timer13_gfclk_mux@17c8S ti,mux-clock,WJK?@ABCLMNO`timer14_gfclk_mux@17d0S ti,mux-clock,WJK?@ABCLMNO`timer15_gfclk_mux@17d8S ti,mux-clock,WJK?@ABCLMNO`timer16_gfclk_mux@1830S ti,mux-clock,WJK?@ABCLMNO`0timer2_gfclk_mux@1738S ti,mux-clock,WJK?@ABCLMNO`8timer3_gfclk_mux@1740S ti,mux-clock,WJK?@ABCLMNO`@timer4_gfclk_mux@1748S ti,mux-clock,WJK?@ABCLMNO`Htimer9_gfclk_mux@1750S ti,mux-clock,WJK?@ABCLMNO`Puart1_gfclk_mux@1840S ti,mux-clockWQR`@uart2_gfclk_mux@1848S ti,mux-clockWQR`Huart3_gfclk_mux@1850S ti,mux-clockWQR`Puart4_gfclk_mux@1858S ti,mux-clockWQR`Xuart5_gfclk_mux@1870S ti,mux-clockWQR`puart7_gfclk_mux@18d0S ti,mux-clockWQR`uart8_gfclk_mux@18e0S ti,mux-clockWQR`uart9_gfclk_mux@18e8S ti,mux-clockWQR`vip1_gclk_mux@1020S ti,mux-clockWx` vip2_gclk_mux@1028S ti,mux-clockWx`(vip3_gclk_mux@1030S ti,mux-clockWx`0clockdomainscoreaon_clkdmti,clockdomainW_l4@4ae00000ti,dra7-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110S ti,mux-clockWyz{|}~2abe_dpll_sys_clk_mux@118S ti,mux-clockW?abe_dpll_bypass_clk_mux@114S ti,mux-clockWKabe_dpll_clk_mux@10cS ti,mux-clockWK abe_24m_fclk@11cSti,divider-clockWv88aess_fclk@178Sti,divider-clockWxabe_giclk_div@174Sti,divider-clockWtLLabe_lp_clk_div@1d8Sti,divider-clockWv abe_sys_clk_div@120Sti,divider-clockW 99adc_gfclk_mux@1dcS ti,mux-clock W?Ksys_clk1_dclk_div@1c8Sti,divider-clockW@`sys_clk2_dclk_div@1ccSti,divider-clockW?@`per_abe_x1_dclk_div@1bcSti,divider-clockWj@`dsp_gclk_div@18cSti,divider-clockW@`gpu_dclk@1a0Sti,divider-clockWo@`emif_phy_dclk_div@190Sti,divider-clockW@`gmac_250m_dclk_div@19cSti,divider-clockWl@`l3init_480m_dclk_div@1acSti,divider-clockWb@`usb_otg_dclk_div@184Sti,divider-clockW@`sata_dclk_div@1c0Sti,divider-clockW@`pcie2_dclk_div@1b8Sti,divider-clockW@`pcie_dclk_div@1b4Sti,divider-clockW@`emu_dclk_div@194Sti,divider-clockW@`secure_32k_dclk_div@1c4Sti,divider-clockW@`clkoutmux0_clk_mux@158S ti,mux-clockXWXPPclkoutmux1_clk_mux@15cS ti,mux-clockXW\clkoutmux2_clk_mux@160S ti,mux-clockXW`cccustefuse_sys_gfclk_divSfixed-factor-clockW eve_clk@180S ti,mux-clockW0hdmi_dpll_clk_mux@164S ti,mux-clockW?dffmlb_clk@134Sti,divider-clockW@4`DDmlbp_clk@130Sti,divider-clockW@0`EEper_abe_x1_gfclk2_div@138Sti,divider-clockWj@8`FFtimer_sys_clk_div@144Sti,divider-clockWDJJvideo1_dpll_clk_mux@168S ti,mux-clockW?hggvideo2_dpll_clk_mux@16cS ti,mux-clockW?lhhwkupaon_iclk_mux@108S ti,mux-clockWppgpio1_dbclk@1838Sti,gate-clockWK`8dcan1_sys_clk_mux@1888S ti,mux-clockW?`timer1_gfclk_mux@1840S ti,mux-clock,WJK?@ABCLMNO`@uart10_gfclk_mux@1880S ti,mux-clockWQR`clockdomainsscm_conf@c000sysconaxi@0 simple-busQQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci00 00pcie1 pcie-phy0`interrupt-controlleraxi@1 simple-busQQ00 disabledpcie@51800000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci00000pcie2 pcie-phy0`interrupt-controllerocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000 disabled mmio-sram@@ @@ocmcram@40500000 disabled mmio-sram@P @Pbandgap@4a0021e00J! J#, J#,J#=txrxokaydefault ,< FO qmmc@480b4000ti,omap4-hsmmcH @ Qmmc28/0=txrxokaydefault <]O qmmc@480ad000ti,omap4-hsmmcH  Ymmc38MN=txrx disabledmmc@480d1000ti,omap4-hsmmcH  [mmc489:=txrx disabledmmu@40d01000ti,dra7-dsp-iommu@  mmu0_dsp1n{ disabledmmu@40d02000ti,dra7-dsp-iommu@   mmu1_dsp1n{ disabledmmu@58882000ti,dra7-iommuX   mmu_ipu1n disabledmmu@55082000ti,dra7-iommuU   mmu_ipu2n disabledregulator-abb-mpu ti,abb-v3abb_mpuW2(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addressH ,@vregulator-abb-ivahd ti,abb-v3 abb_ivahdW2(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-address@H 0regulator-abb-dspeve ti,abb-v3 abb_dspeveW2(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-address H 0regulator-abb-gpu ti,abb-v3abb_gpuW2(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-addressH vspi@48098000ti,omap4-mcspiH  <mcspi1@8#$%&'()* =tx0rx0tx1rx1tx2rx2tx3rx3 disabledspi@4809a000ti,omap4-mcspiH  =mcspi2 8+,-.=tx0rx0tx1rx1 disabledspi@480b8000ti,omap4-mcspiH  Vmcspi38=tx0rx0 disabledspi@480ba000ti,omap4-mcspiH  +mcspi48FG=tx0rx0 disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmap%XqspiW^fck Wokay8Аm25p80@0 s25fl256s18АJ[partition@0 lQSPI.SPLpartition@1lQSPI.SPL.backup1partition@2lQSPI.SPL.backup2partition@3lQSPI.SPL.backup3partition@4 lQSPI.u-bootpartition@5lQSPI.u-boot-spl-ospartition@6lQSPI.u-boot-envpartition@7lQSPI.u-boot-env.backup1partition@8 lQSPI.kernelpartition@9lQSPI.file-systembocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlrtW^sysclkrefclkpciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_txrWSTX;^dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkpciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_txr WSTX;^dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk disabledsata@4a141100snps,dwc-ahciJJ 1 sata-phyWsatartc@48838000ti,am3352-rtcHrtcssWKocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1phy@4a084000 ti,omap-usb2J@rW^wkupclkrefclkphy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPrtW^wkupclkrefclkphy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlrp W^wkupclksysclkrefclkomap_dwc3_1@48880000ti,dwc3 usb_otg_ss1H Husb@48890000 snps,dwc3Hp$GGHperipheralhostotgusb2-phyusb3-phy super-speed peripheraldefaultomap_dwc3_2@488c0000ti,dwc3 usb_otg_ss2H Wusb@488d0000 snps,dwc3Hp$IIWperipheralhostotg usb2-phy high-speedhostdefaultomap_dwc3_3@48900000ti,dwc3 usb_otg_ss3H X disabledusb@48910000 snps,dwc3Hp$XXXperipheralhostotg high-speedotgelm@48078000ti,am3352-elmH elmokaygpmc@50000000ti,am3352-gpmcgpmcP|  8=rxtx ,okaydefaultnand@0,0ti,omap2-nand & +4bch8DN]oPP<< 2  ( !( 0P BP SP d {  partition@0 lNAND.SPLpartition@1lNAND.SPL.backup1partition@2lNAND.SPL.backup2partition@3lNAND.SPL.backup3partition@4lNAND.u-boot-spl-ospartition@5 lNAND.u-boot partition@6lNAND.u-boot-envpartition@7lNAND.u-boot-env.backup1partition@8 lNAND.kernel partition@9lNAND.file-system`atl@4843c000 ti,dra7-atlHCatl >=<;W^fckokaydefault < ?j @V"atl2  mcasp@48460000ti,dra7-mcasp-audiomcasp1HF Empudathgtxrx8=txrx W^fckahclkxahclkr disabledmcasp@48464000ti,dra7-mcasp-audiomcasp2HF@ Empudattxrx8=txrx W^fckahclkxahclkr disabledmcasp@48468000ti,dra7-mcasp-audiomcasp3HF Fmpudattxrx8=txrxW ^fckahclkxokayjdefaultsleep   < % - 7 B  M mcasp@4846c000ti,dra7-mcasp-audiomcasp4HF HC`mpudattxrx8=txrxW ^fckahclkx disabledmcasp@48470000ti,dra7-mcasp-audiomcasp5HG HCmpudattxrx8=txrxW ^fckahclkx disabledmcasp@48474000ti,dra7-mcasp-audiomcasp6HG@ HDmpudattxrx8=txrxW ^fckahclkx disabledmcasp@48478000ti,dra7-mcasp-audiomcasp7HG HEmpudattxrx8=txrxW ^fckahclkx disabledmcasp@4847c000ti,dra7-mcasp-audiomcasp8HG HE@mpudattxrx8=txrxW ^fckahclkx disabledcrossbar@4a002a48ti,irq-crossbarJ*H0& X d |   ethernet@48484000ti,dra7-cpswti,cpswgmacW) ^fckcpts         HH@HHR. )0NOPQ okaydefaultsleep  4mdio@48485000ti,cpsw-mdioti,davinci_mdio davinci_mdio ?B@HHPdefaultsleep slave@48480200 H T [rgmiislave@48480300 Hcpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_candcan1J  dX Wokdefaultsleepactive  scan@481d0000ti,dra7-d_candcan2HH  dX W disableddss@58000000 ti,dra7-dssok dss_core }8XX@TXC dsspll1_clkctrlpll1W^fckvideo1_clk dispc@58001000ti,dra7-dispcX  dss_dispcW^fck 4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore `ok dss_hdmiW ^fcksys_clkdefault portendpoint epwmss@4843e000 ti,dra746-pwmssti,am33xx-pwmssHC0epwmss0 disabledpwm@4843e200"ti,dra746-ehrpwmti,am3352-ehrpwm HCW  ^tbclkfck disabledecap@4843e100ti,dra746-ecapti,am3352-ecap HCW ^fck disabledepwmss@48440000 ti,dra746-pwmssti,am33xx-pwmssHD0epwmss1 disabledpwm@48440200"ti,dra746-ehrpwmti,am3352-ehrpwm HDW  ^tbclkfck disabledecap@48440100ti,dra746-ecapti,am3352-ecap HDW ^fck disabledepwmss@48442000 ti,dra746-pwmssti,am33xx-pwmssHD 0epwmss2 disabledpwm@48442200"ti,dra746-ehrpwmti,am3352-ehrpwm HD"W  ^tbclkfck disabledecap@48442100ti,dra746-ecapti,am3352-ecap HD!W ^fck disabledaes@4b500000 ti,omap4-aesaes1KP P8on=txrxW^fckaes@4b700000 ti,omap4-aesaes2Kp ;8rq=txrxW^fckdes@480a5000 ti,omap4-desdesH P M8ut=txrxW^fcksham@53100000ti,omap5-shamshamK . 8w=rxW^fckrng@48090000 ti,omap4-rngrngH  /W^fckthermal-zonescpu_thermal   tripscpu_alert  passivecpu_crit H  criticalcooling-mapsmap0  !gpu_thermal   tripsgpu_crit H  criticalcore_thermal   tripscore_crit H  criticaldspeve_thermal   tripsdspeve_crit H  criticaliva_thermal   tripsiva_crit H  criticalpmuarm,cortex-a15-pmu& fixedregulator-evm_3v3regulator-fixedevm_3v3#2Z;2Zfixedregulator-aic_dvddregulator-fixed aic_dvdd 0#w@;w@fixedregulator-sdregulator-fixed evm_3v3_sd#2Z;2Z ; Nextcon_usb1linux,extcon-usb-gpio Sextcon_usb2linux,extcon-usb-gpio Sconnectorhdmi-connectorlhdmiaportendpoint encoder ti,tpd12s015default$ portsport@0endpoint port@1endpoint sound0simple-audio-card [DRA7xx-EVMH rHeadphoneHeadphone JackLineLine OutMicrophoneMic JackLineLine In Headphone JackHPLOUTHeadphone JackHPROUTLine OutLLOUTLine OutRLOUTMIC3LMic JackMIC3RMic JackMic JackMic BiasLINE1LLine InLINE1RLine In dsp_b   simple-audio-card,cpu % /V"simple-audio-card,codec %W< #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0display0device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleoperating-points-v2ti,syscon-efuseti,syscon-revclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellsopp-sharedopp-hzopp-microvoltopp-supported-hwopp-suspendti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsdmasdma-names#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellspinctrl-namespinctrl-0ti,system-power-controllerregulator-always-onregulator-boot-onregulator-allow-bypasswakeup-sourceti,palmas-long-press-secondslines-initial-states#sound-dai-cellsadc-settle-msai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplygpio-hoggpiosoutput-lowline-nameti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpiosmax-frequencyti,non-removable#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthlabelsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsphy-supplyutmi-modeextconmaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsrb-gpiosti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,wr-access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsti,provided-clocksassigned-clocksassigned-clock-parentsassigned-clock-ratesbwsawspinctrl-1op-modetdm-slotsserial-dirtx-num-evtrx-num-evtti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_rammac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idlemode-gpiosbus_freqmac-addressphy_idphy-modesyscon-raminitpinctrl-2syscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpoint#pwm-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicevin-supplyenable-active-highgpioid-gpiosimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,bitclock-inversionsound-daisystem-clock-frequency