8\($ti,omap3-beagleti,omap3 +7TI OMAP3 BeagleBoardaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/connector0 m/connector1cpus+cpu@0arm,cortex-a8vcpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+$AdefaultOY_pinmux_hsusb2_pins0g      Y_pinmux_uart3_pinsgnApY_pinmux_tfp410_pinsgY_pinmux_dss_dpi_pinsgY_pinmux_twl4030_pinsgAY_scm_conf@270sysconsimple-busp0+ p0Y_pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap{pbias_mmc_omap2430pbias_mmc_omap2430w@-Y_clocks+mcbsp5_mux_fck@68ti,composite-mux-clockhY _ mcbsp5_fckti,composite-clock Y_mcbsp1_mux_fck@4ti,composite-mux-clockY _ mcbsp1_fckti,composite-clock Y_mcbsp2_mux_fck@4ti,composite-mux-clock Y_mcbsp2_fckti,composite-clock Y_mcbsp3_mux_fck@68ti,composite-mux-clock hY_mcbsp3_fckti,composite-clockY_mcbsp4_mux_fck@68ti,composite-mux-clock hY_mcbsp4_fckti,composite-clockY_clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+$pinmux_gpio1_pinsgAY_pinmux_twl4030_vpins gY_aes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYY_osc_sys_ck@d40 ti,mux-clock @Y_sys_ck@1270ti,divider-clockpY_sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock'dpll3_m2x2_ckfixed-factor-clock'Y_dpll4_x2_ckfixed-factor-clock'corex2_fckfixed-factor-clock'Y _ wkup_l4_ickfixed-factor-clock'YO_Ocorex2_d3_fckfixed-factor-clock 'Y_corex2_d5_fckfixed-factor-clock 'Y_clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockYA_Avirt_12m_ck fixed-clockY_virt_13m_ck fixed-clock]@Y_virt_19200000_ck fixed-clock$Y_virt_26000000_ck fixed-clockY_virt_38_4m_ck fixed-clockIY_dpll4_ck@d00ti,omap3-dpll-per-clock D 0Y_dpll4_m2_ck@d48ti,divider-clock? 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0display1device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0linux,phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyregulator-always-onti,use-ledsti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthstatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optrb-gpiosnand-bus-widthgpmc,device-widthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,wr-access-nslabelmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellslinux,default-triggergpiostartup-delay-usreset-gpiosvcc-supplyti,modelti,mcbsplinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-busslave-mode