8(%lg,omap3-sniperti,omap36xxti,omap3 +7LG Optimus Blackaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8lcpux|cpus 'O 57pmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+7defaultEKpinmux_uart3_pinsSnpEKpinmux_dp3t_sel_pinsSfhEKpinmux_i2c1_pinsSEKpinmux_i2c2_pinsSEKpinmux_i2c3_pinsSEKpinmux_lp8720_en_pinSPEKpinmux_mmc1_pins0SEKpinmux_mmc2_pinsPS(*,.02468:EKpinmux_usb_otg_hs_pins`Srtvxz|~EKpinmux_twl4030_pinsSAEKscm_conf@270sysconsimple-busxp0+ p0EKpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapxgpbias_mmc_omap2430npbias_mmc_omap2430}w@-EKclocks+mcbsp5_mux_fck@68ti,composite-mux-clock|xhEKmcbsp5_fckti,composite-clock|EKmcbsp1_mux_fck@4ti,composite-mux-clock|xE K mcbsp1_fckti,composite-clock| EKmcbsp2_mux_fck@4ti,composite-mux-clock| xE K mcbsp2_fckti,composite-clock| EKmcbsp3_mux_fck@68ti,composite-mux-clock| xhEKmcbsp3_fckti,composite-clock|EKmcbsp4_mux_fck@68ti,composite-mux-clock| xhEKmcbsp4_fckti,composite-clock|EKclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+7defaultpinmux_mmc1_cd_pinSEKpinmux_twl4030_vpins SEKaes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_ck fixed-clockYEKosc_sys_ck@d40 ti,mux-clock|x @EKsys_ck@1270ti,divider-clock|xpEKsys_clkout1@d70ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|dpll3_m2x2_ckfixed-factor-clock|EKdpll4_x2_ckfixed-factor-clock|corex2_fckfixed-factor-clock|EKwkup_l4_ickfixed-factor-clock|ENKNcorex2_d3_fckfixed-factor-clock|EKcorex2_d5_fckfixed-factor-clock|EKclockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockE@K@virt_12m_ck fixed-clockEKvirt_13m_ck fixed-clock]@EKvirt_19200000_ck fixed-clock$EKvirt_26000000_ck fixed-clockEKvirt_38_4m_ck fixed-clockIEKdpll4_ck@d00ti,omap3-dpll-per-j-type-clock|x D 0EKdpll4_m2_ck@d48ti,divider-clock|?x HE K dpll4_m2x2_mul_ckfixed-factor-clock| E!K!dpll4_m2x2_ck@d00ti,hsdiv-gate-clock|!x E"K"omap_96m_alwon_fckfixed-factor-clock|"E)K)dpll3_ck@d00ti,omap3-dpll-core-clock|x @ 0EKdpll3_m3_ck@1140ti,divider-clock|x@E#K#dpll3_m3x2_mul_ckfixed-factor-clock|#E$K$dpll3_m3x2_ck@d00ti,hsdiv-gate-clock|$ x E%K%emu_core_alwon_ckfixed-factor-clock|%EbKbsys_altclk fixed-clockE.K.mcbsp_clks fixed-clockEKdpll3_m2_ck@d40ti,divider-clock|x @EKcore_ckfixed-factor-clock|E&K&dpll1_fck@940ti,divider-clock|&x @E'K'dpll1_ck@904ti,omap3-dpll-clock|'x  $ @ 4EKdpll1_x2_ckfixed-factor-clock|E(K(dpll1_x2m2_ck@944ti,divider-clock|(x DE<K<cm_96m_fckfixed-factor-clock|)E*K*omap_96m_fck@d40 ti,mux-clock|*x @EEKEdpll4_m3_ck@e40ti,divider-clock| x@E+K+dpll4_m3x2_mul_ckfixed-factor-clock|+E,K,dpll4_m3x2_ck@d00ti,hsdiv-gate-clock|,x E-K-omap_54m_fck@d40 ti,mux-clock|-.x @E8K8cm_96m_d2_fckfixed-factor-clock|*E/K/omap_48m_fck@d40 ti,mux-clock|/.x @E0K0omap_12m_fckfixed-factor-clock|0EGKGdpll4_m4_ck@e40ti,divider-clock| x@E1K1dpll4_m4x2_mul_ckti,fixed-factor-clock|13ANE2K2dpll4_m4x2_ck@d00ti,gate-clock|2x NEKdpll4_m5_ck@f40ti,divider-clock|?x@E3K3dpll4_m5x2_mul_ckti,fixed-factor-clock|33ANE4K4dpll4_m5x2_ck@d00ti,hsdiv-gate-clock|4x NEjKjdpll4_m6_ck@1140ti,divider-clock|?x@E5K5dpll4_m6x2_mul_ckfixed-factor-clock|5E6K6dpll4_m6x2_ck@d00ti,hsdiv-gate-clock|6x E7K7emu_per_alwon_ckfixed-factor-clock|7EcKcclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock|&x pE9K9clkout2_src_mux_ck@d70ti,composite-mux-clock|&*8x pE:K:clkout2_src_ckti,composite-clock|9:E;K;sys_clkout2@d70ti,divider-clock|;@x pampu_ckfixed-factor-clock|<E=K=arm_fck@924ti,divider-clock|=x $emu_mpu_alwon_ckfixed-factor-clock|=EdKdl3_ick@a40ti,divider-clock|&x @E>K>l4_ick@a40ti,divider-clock|>x @E?K?rm_ick@c40ti,divider-clock|?x @gpt10_gate_fck@a00ti,composite-gate-clock| x EAKAgpt10_mux_fck@a40ti,composite-mux-clock|@x @EBKBgpt10_fckti,composite-clock|ABgpt11_gate_fck@a00ti,composite-gate-clock| x ECKCgpt11_mux_fck@a40ti,composite-mux-clock|@x @EDKDgpt11_fckti,composite-clock|CDcore_96m_fckfixed-factor-clock|EEKmmchs2_fck@a00ti,wait-gate-clock|x EKmmchs1_fck@a00ti,wait-gate-clock|x EKi2c3_fck@a00ti,wait-gate-clock|x EKi2c2_fck@a00ti,wait-gate-clock|x EKi2c1_fck@a00ti,wait-gate-clock|x EKmcbsp5_gate_fck@a00ti,composite-gate-clock| x EKmcbsp1_gate_fck@a00ti,composite-gate-clock| x E K core_48m_fckfixed-factor-clock|0EFKFmcspi4_fck@a00ti,wait-gate-clock|Fx EKmcspi3_fck@a00ti,wait-gate-clock|Fx EKmcspi2_fck@a00ti,wait-gate-clock|Fx EKmcspi1_fck@a00ti,wait-gate-clock|Fx EKuart2_fck@a00ti,wait-gate-clock|Fx EKuart1_fck@a00ti,wait-gate-clock|Fx  EKcore_12m_fckfixed-factor-clock|GEHKHhdq_fck@a00ti,wait-gate-clock|Hx EKcore_l3_ickfixed-factor-clock|>EIKIsdrc_ick@a10ti,wait-gate-clock|Ix EKgpmc_fckfixed-factor-clock|Icore_l4_ickfixed-factor-clock|?EJKJmmchs2_ick@a10ti,omap3-interface-clock|Jx EKmmchs1_ick@a10ti,omap3-interface-clock|Jx EKhdq_ick@a10ti,omap3-interface-clock|Jx EKmcspi4_ick@a10ti,omap3-interface-clock|Jx EKmcspi3_ick@a10ti,omap3-interface-clock|Jx EKmcspi2_ick@a10ti,omap3-interface-clock|Jx EKmcspi1_ick@a10ti,omap3-interface-clock|Jx EKi2c3_ick@a10ti,omap3-interface-clock|Jx EKi2c2_ick@a10ti,omap3-interface-clock|Jx EKi2c1_ick@a10ti,omap3-interface-clock|Jx EKuart2_ick@a10ti,omap3-interface-clock|Jx EKuart1_ick@a10ti,omap3-interface-clock|Jx  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per_48m_fckfixed-factor-clock|0EOKOuart3_fck@1000ti,wait-gate-clock|Ox EKgpt2_gate_fck@1000ti,composite-gate-clock|xEPKPgpt2_mux_fck@1040ti,composite-mux-clock|@x@EQKQgpt2_fckti,composite-clock|PQgpt3_gate_fck@1000ti,composite-gate-clock|xERKRgpt3_mux_fck@1040ti,composite-mux-clock|@x@ESKSgpt3_fckti,composite-clock|RSgpt4_gate_fck@1000ti,composite-gate-clock|xETKTgpt4_mux_fck@1040ti,composite-mux-clock|@x@EUKUgpt4_fckti,composite-clock|TUgpt5_gate_fck@1000ti,composite-gate-clock|xEVKVgpt5_mux_fck@1040ti,composite-mux-clock|@x@EWKWgpt5_fckti,composite-clock|VWgpt6_gate_fck@1000ti,composite-gate-clock|xEXKXgpt6_mux_fck@1040ti,composite-mux-clock|@x@EYKYgpt6_fckti,composite-clock|XYgpt7_gate_fck@1000ti,composite-gate-clock|xEZKZgpt7_mux_fck@1040ti,composite-mux-clock|@x@E[K[gpt7_fckti,composite-clock|Z[gpt8_gate_fck@1000ti,composite-gate-clock| xE\K\gpt8_mux_fck@1040ti,composite-mux-clock|@x@E]K]gpt8_fckti,composite-clock|\]gpt9_gate_fck@1000ti,composite-gate-clock| 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EKgpt7_ick@1010ti,omap3-interface-clock|axEKgpt6_ick@1010ti,omap3-interface-clock|axEKgpt5_ick@1010ti,omap3-interface-clock|axEKgpt4_ick@1010ti,omap3-interface-clock|axEKgpt3_ick@1010ti,omap3-interface-clock|axEKgpt2_ick@1010ti,omap3-interface-clock|axEKmcbsp2_ick@1010ti,omap3-interface-clock|axEKmcbsp3_ick@1010ti,omap3-interface-clock|axEKmcbsp4_ick@1010ti,omap3-interface-clock|axEKmcbsp2_gate_fck@1000ti,composite-gate-clock|xE K mcbsp3_gate_fck@1000ti,composite-gate-clock|xEKmcbsp4_gate_fck@1000ti,composite-gate-clock|xEKemu_src_mux_ck@1140 ti,mux-clock|bcdx@EeKeemu_src_ckti,clkdm-gate-clock|eEfKfpclk_fck@1140ti,divider-clock|fx@pclkx2_fck@1140ti,divider-clock|fx@atclk_fck@1140ti,divider-clock|fx@traceclk_src_fck@1140 ti,mux-clock|bcdx@EgKgtraceclk_fck@1140ti,divider-clock|g x@secure_32k_fck fixed-clockEhKhgpt12_fckfixed-factor-clock|hwdt1_fckfixed-factor-clock|hsecurity_l4_ick2fixed-factor-clock|?EiKiaes1_ick@a14ti,omap3-interface-clock|ix rng_ick@a14ti,omap3-interface-clock|ix sha11_ick@a14ti,omap3-interface-clock|ix des1_ick@a14ti,omap3-interface-clock|ix cam_mclk@f00ti,gate-clock|jxNcam_ick@f10!ti,omap3-no-wait-interface-clock|?xEKcsi2_96m_fck@f00ti,gate-clock|xEKsecurity_l3_ickfixed-factor-clock|>EkKkpka_ick@a14ti,omap3-interface-clock|kx icr_ick@a10ti,omap3-interface-clock|Jx des2_ick@a10ti,omap3-interface-clock|Jx mspro_ick@a10ti,omap3-interface-clock|Jx mailboxes_ick@a10ti,omap3-interface-clock|Jx ssi_l4_ickfixed-factor-clock|?ErKrsr1_fck@c00ti,wait-gate-clock|x sr2_fck@c00ti,wait-gate-clock|x sr_l4_ickfixed-factor-clock|?dpll2_fck@40ti,divider-clock|&x@ElKldpll2_ck@4ti,omap3-dpll-clock|lx$@4wEmKmdpll2_m2_ck@44ti,divider-clock|mxDEnKniva2_ck@0ti,wait-gate-clock|nxEKmodem_fck@a00ti,omap3-interface-clock|x EKsad2d_ick@a10ti,omap3-interface-clock|>x EKmad2d_ick@a18ti,omap3-interface-clock|>x EKmspro_fck@a00ti,wait-gate-clock|x ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock|x EoKossi_ssr_div_fck_3430es2@a40ti,composite-divider-clock|x @$EpKpssi_ssr_fck_3430es2ti,composite-clock|opEqKqssi_sst_fck_3430es2fixed-factor-clock|qEKhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock|Ix EKssi_ick_3430es2@a10ti,omap3-ssi-interface-clock|rx EKusim_gate_fck@c00ti,composite-gate-clock|E x E}K}sys_d2_ckfixed-factor-clock|EtKtomap_96m_d2_fckfixed-factor-clock|EEuKuomap_96m_d4_fckfixed-factor-clock|EEvKvomap_96m_d8_fckfixed-factor-clock|EEwKwomap_96m_d10_fckfixed-factor-clock|E ExKxdpll5_m2_d4_ckfixed-factor-clock|sEyKydpll5_m2_d8_ckfixed-factor-clock|sEzKzdpll5_m2_d16_ckfixed-factor-clock|sE{K{dpll5_m2_d20_ckfixed-factor-clock|sE|K|usim_mux_fck@c40ti,composite-mux-clock(|tuvwxyz{|x @E~K~usim_fckti,composite-clock|}~usim_ick@c10ti,omap3-interface-clock|Nx  EKdpll5_ck@d04ti,omap3-dpll-clock|x  $ L 4wEKdpll5_m2_ck@d50ti,divider-clock|x PEsKssgx_gate_fck@b00ti,composite-gate-clock|&x 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EKregulator-vdacti,twl4030-vdac}w@w@Tregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1}:0regulator-vmmc2ti,twl4030-vmmc2}:0EKregulator-vusb1v5ti,twl4030-vusb1v5EKregulator-vusb1v8ti,twl4030-vusb1v8EKregulator-vusb3v1ti,twl4030-vusb3v1EKregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2}w@w@regulator-vsimti,twl4030-vsim}w@-gpioti,twl4030-gpiotwl4030-usbti,twl4030-usb hvEKpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad sramadcti,twl4030-madci2c@48072000 ti,omap3-i2cxH 9txrx+i2c27default,i2c@48060000 ti,omap3-i2cxH=txrx+i2c37default,lp8720@7d7default, ti,lp8720x} ldo1}--EKmailbox@48094000ti,omap3-mailboxmailboxxH @ dsp 0 ;spi@48098000ti,omap2-mcspixH A+mcspi1F@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2F +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3F tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4FFGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1T=>txrxa7default,n z mmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrx7default,nmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuxH mmu_ispEKmmu@5d000000ti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@mpu ;< commontxrxmcbsp1 txrx|fck disabledmcbsp@49022000ti,omap3-mcbspxI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrx|fckick disabledmcbsp@49024000ti,omap3-mcbspxI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx|fckick disabledmcbsp@49026000ti,omap3-mcbspxI`mpu 67 commontxrxmcbsp4txrx|fck disabledmcbsp@48096000ti,omap3-mcbspxH `mpu QR commontxrxmcbsp5txrx|fck disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH timer@48318000ti,omap3430-timerxH1%timer1timer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11timer@48304000ti,omap3430-timerxH0@_timer12usbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ohci@48064400ti,ohci-omap3xHD Lehci@48064800 ti,ehci-omapxHH Mgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtx$0+usb_otg_hs@480ab000ti,omap3-musbxH \]mcdma usb_otg_hsBMU 7default,^mu zusb2-phy2dss@48050000 ti,omap3-dssxH disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H protophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fcktv_dac_clkssi-controller@48058000 ti,omap3-ssissiokxHHsysgddGgdd_mpu+ |q ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portxHHtxrx CDssi-port@4805b000ti,omap3-ssi-portxHHtxrx EFserial@49042000ti,omap3-uartxI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 nabb_mpu_iva+xH0rH0hbase-addressint-address|`sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singlexH%\+isp@480bc000 ti,omap3-ispxH H gports+bandgap@48002524xH%$ti,omap36xx-bandgapmemory@80000000lmemoryx  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-nameslinux,phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initinterrupts-extendedpinctrl-0ti,use_poweroffbci3v1-supplyregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsenable-gpios#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplycd-gpiosbus-widthti,non-removablestatus#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsinterface-typeusb-phyphysphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cells