8{X({ 'rockchip,rk3288-fennecrockchip,rk3288&7Rockchip RK3288 Fennec Boardchosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkECKCreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @ disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @ disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay '2@JdefaultX saradc@ff100000rockchip,saradc $b2I[saradcapb_pclkW tsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk  txrx ,JdefaultX disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk txrx -JdefaultX disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclktxrx .JdefaultX disabledi2c@ff140000rockchip,rk3288-i2c >i2c2MJdefaultX disabledi2c@ff150000rockchip,rk3288-i2c ?i2c2OJdefaultX disabledi2c@ff160000rockchip,rk3288-i2c @i2c2PJdefaultX disabledi2c@ff170000rockchip,rk3288-i2c Ai2c2QJdefaultX  disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkJdefaultX! disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkJdefaultX" disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkJdefaultX#okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkJdefaultX$ disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkJdefaultX% disabledthermal-zonesreserve_thermal&cpu_thermald&tripscpu_alert0ppassiveE'K'cpu_alert1$passiveE(K(cpu_crit_ criticalcooling-mapsmap0' map1( gpu_thermald&tripsgpu_alert0ppassiveE)K)gpu_crit_ criticalcooling-mapsmap0) tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk ttsadc-apbJinitdefaultsleepX*+*/s disabledE&K&ethernet@ff290000rockchip,rk3288-gmac)Fmacirqeth_wake_irqV,82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB tstmmacethokaycs-inputJdefaultX./012rgmii 'B@ 30usb@ff500000 generic-ehciP 2usbhost4usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost5 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg!0@@ ?6 usb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhostokayi2c@ff650000rockchip,rk3288-i2ce <i2c2LJdefaultX7okaypmic@1brockchip,rk808&8xin32krk808-clkout2JdefaultX9:Ijx;;;;;;<<<<<<regulatorsDCDC_REG1  2 qJpbvdd_armEKregulator-state-memqDCDC_REG2  2 PJbvdd_gpuregulator-state-memB@DCDC_REG3  bvcc_ddrregulator-state-memDCDC_REG4  22ZJ2Zbvcc_ioE<K<regulator-state-mem2ZLDO_REG1  22ZJ2Z bvccio_pmuregulator-state-mem2ZLDO_REG2  22ZJ2Zbvcca_33regulator-state-memqLDO_REG3  2B@JB@bvdd_10regulator-state-memB@LDO_REG4  2w@Jw@bvcc_wlregulator-state-memw@LDO_REG5  2w@J2Z bvccio_sdregulator-state-mem2ZLDO_REG6  2B@JB@ bvdd10_lcdregulator-state-memB@LDO_REG7  2w@Jw@bvcc_18regulator-state-memw@LDO_REG8  2w@Jw@ bvcc18_lcdregulator-state-memw@SWITCH_REG1  bvcc_sdregulator-state-memSWITCH_REG2  bvcc_lanE2K2regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c2NJdefaultX= disabledpwm@ff680000rockchip,rk3288-pwmhJdefaultX>2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhJdefaultX?2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh JdefaultX@2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0JdefaultXA2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerchs EFKFpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvV,Hcjk$'#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE,K,edp-phyrockchip,rk3288-dp-phy2h24m< disabledEQKQio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayJdefaultXB G8usb-phy@320< 2]phyclkE6K6usb-phy@334<42^phyclkE4K4usb-phy@348<H2_phyclkE5K5watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p O disabledsound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifV hclkmclk2TCtx 6JdefaultXDV, disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5CCtxrxi2s_hclki2s_clk2RJdefaultXEg disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk tcrypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopF def taxiahbdclkGokayportE K endpoint@0HETKTendpoint@1IERKRendpoint@2JEOKOiommu@ff930300rockchip,iommu  Fvopb_mmuF okayEGKGvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopF  taxiahbdclkKokayportE K endpoint@0LEUKUendpoint@1MESKSendpoint@2NEPKPiommu@ff940300rockchip,iommu  Fvopl_mmuF okayEKKKmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkF V, disabledportsportendpoint@0OEJKJendpoint@1PENKNdp@ff970000rockchip,rk3288-dp@ b2icdppclkQdpotdpV, disabledportsport@0endpoint@0REIKIendpoint@1SEMKMhdmi@ff980000rockchip,rk3288-dw-hdmiV, g2hm iahbisfrF okayportsportendpoint@0TEHKHendpoint@1UELKLmali@ffa300004rockchip,rk3288-maliarm,mali-t760arm,mali-midgard$ Fjobmmugpu2VF  disabledgpu-opp-tableoperating-points-v2EVKVopp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Finterrupt-controller@ffc01000 arm,gic-400   @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlV,Sgpio0@ff750000rockchip,gpio-banku Q2@- E8K8gpio1@ff780000rockchip,gpio-bankx R2A- gpio2@ff790000rockchip,gpio-banky S2B- gpio3@ff7a0000rockchip,gpio-bankz T2C- gpio4@ff7b0000rockchip,gpio-bank{ U2D- E3K3gpio5@ff7c0000rockchip,gpio-bank| V2E- gpio6@ff7d0000rockchip,gpio-bank} W2F- gpio7@ff7e0000rockchip,gpio-bank~ X2G- gpio8@ff7f0000rockchip,gpio-bank Y2H- hdmihdmi-ddc 9WWpcfg-pull-upGEXKXpcfg-pull-downTEYKYpcfg-pull-nonecEWKWpcfg-pull-none-12macp EZKZsleepglobal-pwroff9WE:K:ddrio-pwroff9Wddr0-retention9Xddr1-retention9Xedpedp-hpd9 Yi2c0i2c0-xfer 9WWE7K7i2c1i2c1-xfer 9WWEKi2c2i2c2-xfer 9 W WE=K=i2c3i2c3-xfer 9WWEKi2c4i2c4-xfer 9WWEKi2c5i2c5-xfer 9WWE K i2s0i2s0-bus`9WWWWWWEEKEsdmmcsdmmc-clk9Wsdmmc-cmd9Xsdmmc-cd9Xsdmmc-bus19Xsdmmc-bus4@9XXXXsdio0sdio0-bus19Xsdio0-bus4@9XXXXsdio0-cmd9Xsdio0-clk9Wsdio0-cd9Xsdio0-wp9Xsdio0-pwr9Xsdio0-bkpwr9Xsdio0-int9Xsdio1sdio1-bus19Xsdio1-bus4@9XXXXsdio1-cd9Xsdio1-wp9Xsdio1-bkpwr9Xsdio1-int9Xsdio1-cmd9Xsdio1-clk9Wsdio1-pwr9 Xemmcemmc-clk9WE K emmc-cmd9XE K emmc-pwr9 XEKemmc-bus19Xemmc-bus4@9XXXXemmc-bus89XXXXXXXXEKspi0spi0-clk9 XEKspi0-cs09 XEKspi0-tx9XEKspi0-rx9XEKspi0-cs19Xspi1spi1-clk9 XEKspi1-cs09 XEKspi1-rx9XEKspi1-tx9XEKspi2spi2-cs19Xspi2-clk9XEKspi2-cs09XEKspi2-rx9XEKspi2-tx9 XEKuart0uart0-xfer 9XWE!K!uart0-cts9Xuart0-rts9Wuart1uart1-xfer 9X WE"K"uart1-cts9 Xuart1-rts9 Wuart2uart2-xfer 9XWE#K#uart3uart3-xfer 9XWE$K$uart3-cts9 Xuart3-rts9 Wuart4uart4-xfer 9 X WE%K%uart4-cts9Xuart4-rts9Wtsadcotp-gpio9 WE*K*otp-out9 WE+K+pwm0pwm0-pin9WE>K>pwm1pwm1-pin9WE?K?pwm2pwm2-pin9WE@K@pwm3pwm3-pin9WEAKAgmacrgmii-pins9WWWWZZZZWWW ZZWWE.K.rmii-pins9WWWWWWWWWWphy-int9 XE1K1phy-pmeb9XE0K0phy-rst9[E/K/spdifspdif-tx9 WEDKDpcfg-output-highE[K[pcfg-output-lowpcfg-pull-none-drv-8mappcfg-pull-up-drv-8maGppmicpmic-int9XE9K9usbphyhost-drv9WEBKBexternal-gmac-clock fixed-clocksY@ ext_gmacE-K-vsys-regulatorregulator-fixedbvcc_sys2LK@JLK@  E;K; #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeeddisable-wpnon-removablenum-slotspinctrl-namespinctrl-0#io-channel-cellsreset-namesdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-tempinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmarockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsvbus_drv-gpios#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-low