8( _Kgoogle,veyron-brain-rev0google,veyron-braingoogle,veyronrockchip,rk3288& 7Google Brainchosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEEKEreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @ disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay &3I Tbldefault z dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay  ITbldefault zsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW .saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk:  ?txrx ,ldefaultz disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk: ?txrx -ldefaultz disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk:?txrx .ldefaultz !"okayI flash@0jedec,spi-nor\i2c@ff140000rockchip,rk3288-i2c >i2c2Mldefaultz#okayn2dtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c2Oldefaultz$ disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pldefaultz%okayn2,i2c@ff170000rockchip,rk3288-i2c Ai2c2Qldefaultz&okayn,EVKVserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkldefault z'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkldefaultz*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkldefaultz+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkldefaultz, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkldefaultz- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_alert0%p1passiveE/K/cpu_alert1%$1passiveE0K0cpu_crit%_1 criticalcooling-mapsmap0</ Amap1<0 Agpu_thermald.tripsgpu_alert0%p1passiveE1K1gpu_crit%_1 criticalcooling-mapsmap0<1 Atsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk .tsadc-apblinitdefaultsleepz2P3Z2dzsokayE.K.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq482fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB .stmmaceth disabledusb@ff500000 generic-ehciP 2usbhost5usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost6 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otghost .@@ =7 usb2-phyokayzG7usb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2Lldefaultz8okayn2dpmic@1brockchip,rk808xin32kwifibt_32kin&9ldefault z:;<^=> >EeKeregulatorsDCDC_REG1vdd_arm. qF ^qEKregulator-state-memsDCDC_REG2vdd_gpu. 5F^qEZKZregulator-state-memB@DCDC_REG3 vcc135_ddrregulator-state-memDCDC_REG4vcc_18.w@Fw@EKregulator-state-memw@LDO_REG3vdd_10.B@FB@regulator-state-memB@LDO_REG7 vdd10_lcd.B@FB@regulator-state-memsSWITCH_REG1 vcc33_lcdEDKDregulator-state-memsSWITCH_REG2 vcc18_hdmii2c@ff660000rockchip,rk3288-i2cf =i2c2Nldefaultz?okayn2 pwm@ff680000rockchip,rk3288-pwmhldefaultz@2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhldefaultzA2^pwmokaypwm@ff680020rockchip,rk3288-pwmh ldefaultzB2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0ldefaultzC2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerhG EHKHpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2reboot-modesyscon-reboot-modeRBRBRB /RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4;Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE4K4edp-phyrockchip,rk3288-dp-phy2h24mH disabledESKSio-domains"rockchip,rk3288-io-voltage-domainokayS=]hv==Dusbphyrockchip,rk3288-usb-phyokayusb-phy@320H 2]phyclkE7K7usb-phy@334H42^phyclkE5K5usb-phy@348HH2_phyclkE6K6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2T:E?tx 6ldefaultzF4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5:EE?txrxi2s_hclki2s_clk2RldefaultzG disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk .crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopH def .axiahbdclkIokayportE K endpoint@0JEWKWendpoint@1KETKTendpoint@2LEQKQiommu@ff930300rockchip,iommu  vopb_mmuH okayEIKIvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopH  .axiahbdclkM disabledportE K endpoint@0NEXKXendpoint@1OEUKUendpoint@2PERKRiommu@ff940300rockchip,iommu  vopl_mmuH  disabledEMKMmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkH 4 disabledportsportendpoint@0QELKLendpoint@1REPKPdp@ff970000rockchip,rk3288-dp@ b2icdppclkSdpo.dp4 disabledportsport@0endpoint@0TEKKKendpoint@1UEOKOhdmi@ff980000rockchip,rk3288-dw-hdmi4 g2hm iahbisfrH okay$Vportsportendpoint@0WEJKJendpoint@1XENKNmali@ffa300004rockchip,rk3288-maliarm,mali-t760arm,mali-midgard$ jobmmugpu20YH okayDZgpu-opp-tableoperating-points-v2EYKYopp@100000000PW~opp@200000000P W~opp@300000000PWB@opp@400000000PׄWopp@500000000PeWOopp@600000000P#FWinterrupt-controller@ffc01000 arm,gic-400ez  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4Sldefaultsleepz[P[gpio0@ff750000rockchip,gpio-banku Q2@ezE9K9gpio1@ff780000rockchip,gpio-bankx R2Aezgpio2@ff790000rockchip,gpio-banky S2BezEdKdgpio3@ff7a0000rockchip,gpio-bankz T2Cezgpio4@ff7b0000rockchip,gpio-bank{ U2DezEhKhgpio5@ff7c0000rockchip,gpio-bank| V2Eezgpio6@ff7d0000rockchip,gpio-bank} W2Fezgpio7@ff7e0000rockchip,gpio-bank~ X2GezE>K>gpio8@ff7f0000rockchip,gpio-bank Y2Hezhdmihdmi-ddc \\vcc50-hdmi-en\EjKjpcfg-pull-upE]K]pcfg-pull-downE^K^pcfg-pull-noneE\K\pcfg-pull-none-12ma E`K`sleepglobal-pwroff\E[K[ddrio-pwroff\ddr0-retention]ddr1-retention]edpedp-hpd ^i2c0i2c0-xfer \\E8K8i2c1i2c1-xfer \\E#K#i2c2i2c2-xfer  \ \E?K?i2c3i2c3-xfer \\E$K$i2c4i2c4-xfer \\E%K%i2c5i2c5-xfer \\E&K&i2s0i2s0-bus`\\\\\\EGKGsdmmcsdmmc-clk\sdmmc-cmd]sdmmc-cd]sdmmc-bus1]sdmmc-bus4@]]]]sdio0sdio0-bus1]sdio0-bus4@____EKsdio0-cmd_EKsdio0-clk_E K sdio0-cd]sdio0-wp]sdio0-pwr]sdio0-bkpwr]sdio0-int]wifienable-h\EgKgbt-enable-l\EfKfsdio1sdio1-bus1]sdio1-bus4@]]]]sdio1-cd]sdio1-wp]sdio1-bkpwr]sdio1-int]sdio1-cmd]sdio1-clk\sdio1-pwr ]emmcemmc-clk_EKemmc-cmd_EKemmc-pwr ]emmc-bus1]emmc-bus4@]]]]emmc-bus8________EKemmc-reset \EcKcspi0spi0-clk ]EKspi0-cs0 ]EKspi0-tx]EKspi0-rx]EKspi0-cs1]spi1spi1-clk ]EKspi1-cs0 ]EKspi1-rx]EKspi1-tx]EKspi2spi2-cs1]spi2-clk]EKspi2-cs0]E"K"spi2-rx]E!K!spi2-tx ]E K uart0uart0-xfer ]\E'K'uart0-cts]E(K(uart0-rts\E)K)uart1uart1-xfer ] \E*K*uart1-cts ]uart1-rts \uart2uart2-xfer ]\E+K+uart3uart3-xfer ]\E,K,uart3-cts ]uart3-rts \uart4uart4-xfer  ] \E-K-uart4-cts]uart4-rts\tsadcotp-gpio \E2K2otp-out \E3K3pwm0pwm0-pin\E@K@pwm1pwm1-pin\EAKApwm2pwm2-pin\EBKBpwm3pwm3-pin\ECKCgmacrgmii-pins\\\\````\\\ ``\\rmii-pins\\\\\\\\\\spdifspdif-tx \EFKFpcfg-pull-none-drv-8maE_K_pcfg-pull-up-drv-8mapcfg-output-highpcfg-output-lowbuttonspwr-key-l]EaKapmicpmic-int-l]E:K:dvs-1 ^E;K;dvs-2^E<K<rebootap-warm-reset-h \EbKbrecovery-switchrec-mode-l ]tpmtpm-int-h\write-protectfw-wp-ap\usb-hostusb2-pwr-en \EkKkgpio-keys gpio-keysldefaultzapower Power 9 t dgpio-restart gpio-restart 9 ldefaultzb 'emmc-pwrseqmmc-pwrseq-emmczcldefault 0d EKsdio-pwrseqmmc-pwrseq-simple2e ext_clockldefaultzfg 0hE K vcc-5vregulator-fixedvcc_5v.LK@FLK@EiKivcc33-sysregulator-fixed vcc33_sys.2ZF2Z <iEKvcc50-hdmiregulator-fixed vcc50_hdmi <i G Z>ldefaultzjvcc33_ioregulator-fixed vcc33_io <E=K=vcc5-host2-regulatorregulator-fixed G Z9 ldefaultzk vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio