88(hisilicon,hip05-d02 +&7Hisilicon Hip05 D02 Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D cluster2core0D core1D core2D core3D cluster3core0Dcore1Dcore2Dcore3Dcpu@20000Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20001Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20002Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20003Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20100Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20101Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20102Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20103Hcpuarm,cortex-a57arm,armv8TXpscifw } cpu@20200Hcpuarm,cortex-a57arm,armv8TXpscifw } cpu@20201Hcpuarm,cortex-a57arm,armv8TXpscifw } cpu@20202Hcpuarm,cortex-a57arm,armv8TXpscifw } cpu@20203Hcpuarm,cortex-a57arm,armv8TXpscifw } cpu@20300Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20301Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20302Hcpuarm,cortex-a57arm,armv8TXpscifw}cpu@20303Hcpuarm,cortex-a57arm,armv8TXpscifw}l2-cache0cachew}l2-cache1cachew}l2-cache2cachew}l2-cache3cachew}interrupt-controller@8d000000 arm,gic-v3+PT0  w}interrupt-controller@8c000000arm,gic-v3-itsTinterrupt-controller@a3000000arm,gic-v3-itsTinterrupt-controller@b7000000arm,gic-v3-itsTinterrupt-controller@c6000000arm,gic-v3-itsTtimerarm,armv8-timer0   pmuarm,cortex-a57-pmu soc simple-bus+refclk200mhz fixed-clock w}uart@80300000snps,dw-apb-uartT0 =  'apb_pclk3=Jokuart@80310000snps,dw-apb-uartT1 >  'apb_pclk3= Jdisabledlocalbus@80380000#hisilicon,hisi-localbussimple-busT8Jok+(nor-flash@0,0+numonyx,js28f00acfi-flash TQpartition@0\BIOST0partition@300000\LinuxT0partition@1000000\RootfsTcpld@1,0hisilicon,hip05-cpld Tgpio@802e0000+snps,dw-apb-gpioT.Jokgpio-controller@0snps,dw-apb-gpio-portbr~ T 8w}gpio@802f0000+snps,dw-apb-gpioT/ Jdisabledgpio-controller@0snps,dw-apb-gpio-portbr~ T 9memory@00000000HmemoryTaliases/soc/uart@80300000chosenserial0:115200n8gpio_keys gpio-keys+pwrbutton \Power Button t compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpudevice_typeregenable-methodnext-level-cachelinux,phandle#interrupt-cellsrangesinterrupt-controller#redistributor-regionsredistributor-strideinterruptsmsi-controller#msi-cells#clock-cellsclock-frequencyclocksclock-namesreg-shiftreg-io-widthstatusbank-widthlabelgpio-controller#gpio-cellssnps,nr-gpiosserial0stdout-pathlinux,codedebounce-interval