7g83(3)Qualcomm Technologies, Inc. MSM 8996 MTP&2qcom,msm8996-mtpchosen=serial0memoryImemoryUreserved-memory&Ymba@91500000UP `slpi@90b00000U`venus@90400000U@p`adsp@8ea00000U`gmmpss@88800000U `smem-mem@86000000U `g m memory@85800000U`memory@86200000U ``cpus&cpu@0Icpu 2qcom,kryoUupscigml2-cache2cachegmcpu@1Icpu 2qcom,kryoUupscigmcpu@100Icpu 2qcom,kryoUupscigml2-cache2cachegmcpu@101Icpu 2qcom,kryoUupscigmcpu-mapcluster0core0core1cluster1core0core1thermal-zonescpu-thermal0tripstrip0$Ppassivetrip1 Pcriticalcpu-thermal1tripstrip0$Ppassivetrip1 Pcriticalcpu-thermal2tripstrip0$Ppassivetrip1 Pcriticalcpu-thermal3 tripstrip0$Ppassivetrip1 Pcriticaltimer2arm,armv8-timer0   clocksxo_board 2fixed-clock$ xo_boardgmsleep_clk 2fixed-clock sleep_clkpsci 2arm,psci-1.0|smcfirmwarescm2qcom,scm-msm8996hwlock2qcom,tcsr-mutex * 1g m smem 2qcom,smem? M soc&Y 2simple-bussyscon@7400002sysconUtg m interrupt-controller@9bc0000 2arm,gic-v3Uf{U    gmsyscon@98200002sysconU gmclock-controller@3000002qcom,gcc-msm8996U0 g m clock-controller@64000002qcom,apcc-msm8996U@ spi@075750002qcom,spi-qup-v2.2.1UWP _ o m coreifacedefaultsleep & disabledi2c@075b50002qcom,i2c-qup-v2.2.1U[P e  ifacecoredefaultsleep& disabledthermal-sensor@4a80002qcom,msm8996-tsensUJ gmserial@75b0000%2qcom,msm-uartdm-v1.4qcom,msm-uartdmU[ r  coreifaceokayi2c@075b60002qcom,i2c-qup-v2.2.1U[` f  ifacecoredefaultsleep& disabledserial@75b1000%2qcom,msm-uartdm-v1.4qcom,msm-uartdmU[ s  coreiface disabledi2c@075770002qcom,i2c-qup-v2.2.1UWp a m v ifacecoredefaultsleep& disabledspi@075ba0002qcom,spi-qup-v2.2.1U[ k  coreifacedefaultsleep& disabledsdhci@74a4900 disabled2qcom,sdhci-msm-v4UJIJ@hc_memcore_mem}$hc_irqpwr_irqifacecorexo h g4pinctrl@10100002qcom,msm8996-pinctrlU0 >NfUblsp1_spi0_defaultg m pinmux Zblsp_spi1cgpio0gpio1gpio3pinmux_csZgpiocgpio2pinconfcgpio0gpio1gpio3h wpinconf_cscgpio2hwblsp1_spi0_sleepgmpinmuxZgpiocgpio0gpio1gpio2gpio3pinconfcgpio0gpio1gpio2gpio3hblsp1_i2c2_defaultgmpinmux Zblsp_i2c3cgpio47gpio48pinconfcgpio47gpio48hwblsp1_i2c2_sleepgmpinmuxZgpiocgpio47gpio48pinconfcgpio47gpio48hwblsp2_i2c0gmpinmux Zblsp_i2c7cgpio55gpio56pinconfcgpio55gpio56hwblsp2_i2c0_sleepgmpinmuxZgpiocgpio55gpio56pinconfcgpio55gpio56hwblsp2_uart1_2pinspinmux Zblsp_uart8 cgpio4gpio5pinconf cgpio4gpio5hwblsp2_uart1_2pins_sleeppinmuxZgpio cgpio4gpio5pinconf cgpio4gpio5hwblsp2_uart1_4pinspinmux Zblsp_uart8cgpio4gpio5gpio6gpio7pinconfcgpio4gpio5gpio6gpio7hwblsp2_uart1_4pins_sleeppinmuxZgpiocgpio4gpio5gpio6gpio7pinconfcgpio4gpiio5gpio6gpio7hwblsp2_i2c1gmpinmux Zblsp_i2c8 cgpio6gpio7pinconf cgpio6gpio7hwblsp2_i2c1_sleepgmpinmuxZgpio cgpio6gpio7pinconf cgpio6gpio7hwblsp2_uart2_2pinspinmux Zblsp_uart9cgpio49gpio50pinconfcgpio49gpio50hwblsp2_uart2_2pins_sleeppinmuxZgpiocgpio49gpio50pinconfcgpio49gpio50hwblsp2_uart2_4pinspinmux Zblsp_uart9cgpio49gpio50gpio51gpio52pinconfcgpio49gpio50gpio51gpio52hwblsp2_uart2_4pins_sleeppinmuxZgpiocgpio49gpio50gpio51gpio52pinconfcgpio49gpio50gpio51gpio52hwblsp2_spi5_defaultgmpinmux Zblsp_spi12cgpio85gpio86gpio88pinmux_csZgpiocgpio87pinconfcgpio85gpio86gpio88h wpinconf_cscgpio87hwblsp2_spi5_sleepgmpinmuxZgpiocgpio85gpio86gpio87gpio88pinconfcgpio85gpio86gpio87gpio88hsdc2_clk_onconfig csdc2_clkwhsdc2_clk_offconfig csdc2_clkwhsdc2_cmd_onconfig csdc2_cmdh sdc2_cmd_offconfig csdc2_cmdhsdc2_data_onconfig csdc2_datah sdc2_data_offconfig csdc2_datahtimer@09840000&Y2arm,armv7-timer-memU $frame@9850000U  frame@9870000 U  disabledframe@9880000 !U  disabledframe@9890000 "U  disabledframe@98a0000 #U  disabledframe@98b0000 $U  disabledframe@98c0000 %U  disabledqcom,spmi@400f0002qcom,spmi-pmic-arb(U@ !corechnlsobsrvrintrcnfg $periph_irq F&fUclock-controller@8c00002qcom,mmcc-msm8996U(  %1|0G:i98p1,@gmadsp-pil2qcom,msm8996-adsp-pil@#$wdogfatalreadyhandoverstop-ackxo?stopadsp-smp2p 2qcom,smp2p.  8 APmaster-kernel`master-kernelpgmslave-kernel `slave-kernelfUgmsmp2p-slpi 2qcom,smp2p.  8APslave-kernel `slave-kernelfUmaster-kernel`master-kernelpaliases/soc/serial@75b0000 modelinterrupt-parent#address-cells#size-cellscompatiblestdout-pathdevice_typeregrangesno-maplinux,phandleenable-methodnext-level-cachecache-levelcpupolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisinterrupts#clock-cellsclock-frequencyclock-output-namessyscon#hwlock-cellsmemory-regionhwlocks#interrupt-cellsinterrupt-controller#redistributor-regionsredistributor-stride#reset-cells#power-domain-cellsclocksclock-namespinctrl-namespinctrl-0pinctrl-1status#thermal-sensor-cellsreg-namesinterrupt-namesbus-widthgpio-controller#gpio-cellsfunctionpinsdrive-strengthbias-disableoutput-highbias-pull-downbias-pull-upframe-numberqcom,eeqcom,channelassigned-clocksassigned-clock-ratesinterrupts-extendedqcom,smem-statesqcom,smem-state-namesqcom,smemqcom,ipcqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsserial0