e 8^(2^,rockchip,rk3368-evb-act8846rockchip,rk3368 +&7Rockchip RK3368 EVB with ACT8846 pmicaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53arm,armv8pscicpu@1cpuarm,cortex-a53arm,armv8pscicpu@2cpuarm,cortex-a53arm,armv8pscicpu@3cpuarm,cortex-a53arm,armv8psci  cpu@100cpuarm,cortex-a53arm,armv8pscicpu@101cpuarm,cortex-a53arm,armv8pscicpu@102cpuarm,cortex-a53arm,armv8pscicpu@103cpuarm,cortex-a53arm,armv8psciamba simple-bus+dma-controller@ff250000arm,pl330arm,primecell%@  apb_pclkdma-controller@ff600000arm,pl330arm,primecell`@  apb_pclk22arm-pmuarm,armv8-pmuv3`pqrstuvw & psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clock9n6Ixin24m\dwmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @iр   D r vbiuciuciu-driveciu-samplew  reset disableddwmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @iр   E s wbiuciuciu_drvciu_samplew ! reset disableddwmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@iр   G u ybiuciuciu-driveciu-samplew # resetokay default  saradc@ff100000rockchip,saradc $ I [saradcapb_pclk W saradc-apb disabledspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi A Rspiclkapb_pclk ,default+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi B Sspiclkapb_pclk -default+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi C Tspiclkapb_pclk )default+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+i2c Ndefault disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+i2c Odefault disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+i2c Pdefault disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+i2c Qdefault disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 M Ubaudclkapb_pclk 7 disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 N Vbaudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 P Xbaudclkapb_pclk : disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 Q Ybaudclkapb_pclk ; disabledthermal-zonescpu'd=Ktripscpu_alert0[$gpassive  cpu_alert1[8gpassive!!cpu_crit[sg criticalcooling-mapsmap0r  wmap1r! wgpu'd=Ktripsgpu_alert0[8gpassive""gpu_crit[8g criticalcooling-mapsmap0r" wtsadc@ff280000rockchip,rk3368-tsadc( % H Ztsadcapb_pclk  tsadc-apbinitdefaultsleep#$#sokayethernet@ff290000rockchip,rk3368-gmac) macirq %8  f g c ]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macok&!rmii*output 7' G ]'B@default(r0{usb@ff500000 generic-ehciP  usbhostokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X  otghost@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce Li2c <default)+okay9syr827@40silergy,syr827@vdd_cpu Pp,>*syr828@41silergy,syr828Avdd_gpu Pp>*act8846@5aactive-semi,act8846ZokayI*T*_*j*u+*,regulatorsREG1VCC_DDROOREG2VCC_IO2Z2Z++REG3VDD_LOG ``REG4VCC_20,,REG5 VCCIO_SDw@2ZREG6 VDD10_LCDB@B@REG7 VCCA_CODEC2Z2ZREG8VCCA_TP2Z2ZREG9 VCCIO_PMU2Z2ZREG10VDD_10B@B@REG11VCC_18w@w@REG12 VCC18_LCDw@w@i2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+i2c Mdefault- disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault. _pwmokay<<pwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmhdefault/ _pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh  _pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0default0 _pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti O Wbaudclkapb_pclk 9default1okaymbox@ff6b0000rockchip,rk3368-mailboxk0 E pclk_mailbox disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds44io-domains&rockchip,rk3368-pmu-io-voltage-domain disabledreboot-modesyscon-reboot-modeRBRBRB RBclock-controller@ff760000rockchip,rk3368-cruv %\  syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw%%io-domains"rockchip,rk3368-io-voltage-domain disabledwatchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  Bi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (i2s_clki2s_hclk T 22txrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5i2s_clki2s_hclk R 22txrxdefault3 disabledinterrupt-controller@ffb71000 arm,gic-400 @ @ `   pinctrlrockchip,rk3368-pinctrl %/4+gpio0@ff750000rockchip,gpio-banku @ Q<L ::gpio1@ff780000rockchip,gpio-bankx A R<L gpio2@ff790000rockchip,gpio-banky B S<L >>gpio3@ff7a0000rockchip,gpio-bankz C T<L ''pcfg-pull-upX77pcfg-pull-downepcfg-pull-nonet88pcfg-pull-none-12mat 99emmcemmc-clk5  emmc-cmd6  emmc-pwr7emmc-bus17emmc-bus4@7777emmc-bus866666666emmc-reset8==gmacrgmii-pins8889 9 999 9888888rmii-pins8889 9 98888((i2c0i2c0-xfer 88))i2c1i2c1-xfer 88--i2c2i2c2-xfer  88i2c3i2c3-xfer 88i2c4i2c4-xfer 88i2c5i2c5-xfer 88i2si2s-8ch-bus 8 8888888833pwm0pwm0-pin8..pwm1pwm1-pin8//pwm3pwm3-pin800sdio0sdio0-bus17sdio0-bus4@7777sdio0-cmd7sdio0-clk8sdio0-cd7sdio0-wp7sdio0-pwr7sdio0-bkpwr7sdio0-int7sdmmcsdmmc-clk 8sdmmc-cmd 7sdmmc-cd 7sdmmc-bus17sdmmc-bus4@7777spi0spi0-clk7spi0-cs07spi0-cs17spi0-tx7spi0-rx7spi1spi1-clk7spi1-cs07spi1-cs17spi1-rx7spi1-tx7spi2spi2-clk 7spi2-cs0 7spi2-rx 7spi2-tx 7tsadcotp-gpio8##otp-out8$$uart0uart0-xfer 78uart0-cts8uart0-rts8uart1uart1-xfer 78uart1-cts8uart1-rts8uart2uart2-xfer 7811uart3uart3-xfer 78uart3-cts8uart3-rts8uart4uart4-xfer 78uart4-cts8uart4-rts8pcfg-pull-none-drv-8mat55pcfg-pull-up-drv-8maX66backlightbl-en8;;keyspwr-key7??pmicpmic-int7sdiowifi-reg-on8bt-rst8usbhost-vbus-drv8@@chosenserial2:115200n8memorymemory@backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ :default;<B@'emmc-pwrseqmmc-pwrseq-emmc=default >  gpio-keys gpio-keysdefault?power : GPIO Powertvcc-host-regulatorregulator-fixed B:default@ vcc_host,>*vcc-lan-regulatorregulator-fixedvcc_lan2Z2Z,>+&&vcc-sys-regulatorregulator-fixedvcc_sysLK@LK@,** compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellslinux,phandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusbus-widthcap-mmc-highspeeddisable-wpmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onvin-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#mbox-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsdmasdma-namesinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathbrightness-levelsdefault-brightness-levelenable-gpiospwmspwm-delay-usreset-gpioswakeup-sourcelabellinux,codeenable-active-high