b8[([Prockchip,r88rockchip,rk3368 + 7Rockchip R88aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3 cpu@0cpuarm,cortex-a53arm,armv8pscicpu@1cpuarm,cortex-a53arm,armv8pscicpu@2cpuarm,cortex-a53arm,armv8pscicpu@3cpuarm,cortex-a53arm,armv8psci  cpu@100cpuarm,cortex-a53arm,armv8pscicpu@101cpuarm,cortex-a53arm,armv8pscicpu@102cpuarm,cortex-a53arm,armv8pscicpu@103cpuarm,cortex-a53arm,armv8psciamba simple-bus+dma-controller@ff250000arm,pl330arm,primecell%@  apb_pclkdma-controller@ff600000arm,pl330arm,primecell`@  apb_pclk77arm-pmuarm,armv8-pmuv3`pqrstuvw & psci arm,psci-0.2smctimerarm,armv8-timer0   oscillator fixed-clock9n6Ixin24m\dwmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @iр   D r vbiuciuciu-driveciu-samplew  reset disableddwmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc @iр   E s wbiuciuciu_drvciu_samplew ! resetokay E   $default 2 <Hdwmmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc@iр   G u ybiuciuciu-driveciu-samplew # resetokayUg $default 2saradc@ff100000rockchip,saradc $r I [saradcapb_pclk W saradc-apbokayspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi A Rspiclkapb_pclk ,$default2+ disabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi B Sspiclkapb_pclk -$default2+ disabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi C Tspiclkapb_pclk )$default2 !+ disabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c >+i2c N$default2" disabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c ?+i2c O$default2# disabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c @+i2c P$default2$ disabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c A+i2c Q$default2% disabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 M Ubaudclkapb_pclk 7 disabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 N Vbaudclkapb_pclk 8 disabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 P Xbaudclkapb_pclk : disabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart9n6 Q Ybaudclkapb_pclk ; disabledthermal-zonescpud&tripscpu_alert0$passive''cpu_alert18passive((cpu_crits criticalcooling-mapsmap0' map1( gpud&tripsgpu_alert08passive))gpu_crit8 criticalcooling-mapsmap0) tsadc@ff280000rockchip,rk3368-tsadc( % H Ztsadcapb_pclk  tsadc-apb$initdefaultsleep2*+*0sokayG^&&ethernet@ff290000rockchip,rk3368-gmac) ymacirq,8  f g c ]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macok-rmiioutput .  'B@$default2/0usb@ff500000 generic-ehciP  usbhostokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2X  otghost -@@ okayi2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2ce Li2c <$default20+okaysyr827@40silergy,syr827@<Yvdd_cpuh, 4`@1hym8563@51haoyu,hym8563Q\9Ixin32kEEi2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2cf =+i2c M$default22 disabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwmh$default23 _pwm disabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwmh$default24 _pwm disabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwmh  _pwm disabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwmh0$default25 _pwm disabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uarti O Wbaudclkapb_pclk 9$default26okaymbox@ff6b0000rockchip,rk3368-mailboxk0 E pclk_mailbox disabledsyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfds99io-domains&rockchip,rk3368-pmu-io-voltage-domainokayreboot-modesyscon-reboot-mode'.RB:RBHRB XRBclock-controller@ff760000rockchip,rk3368-cruv,\d  syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfdw,,io-domains"rockchip,rk3368-io-voltage-domainokq~watchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt p Ookaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer  Bi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s (i2s_clki2s_hclk T 77txrx disabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s 5i2s_clki2s_hclk R 77txrx$default28 disabledinterrupt-controller@ffb71000 arm,gic-400@ @ `   pinctrlrockchip,rk3368-pinctrl,9+gpio0@ff750000rockchip,gpio-banku @ QBBgpio1@ff780000rockchip,gpio-bankx A Rgpio2@ff790000rockchip,gpio-banky B S@@gpio3@ff7a0000rockchip,gpio-bankz C T..pcfg-pull-up<<pcfg-pull-downpcfg-pull-none"==pcfg-pull-none-12ma"/ >>emmcemmc-clk>:emmc-cmd>;emmc-pwr><emmc-bus1><emmc-bus4@><<<<emmc-bus8>;;;;;;;;emmc-reset>=??gmacrgmii-pins>===> > >>> >======rmii-pins>===> > >====//i2c0i2c0-xfer >==00i2c1i2c1-xfer >==22i2c2i2c2-xfer > ==""i2c3i2c3-xfer >==##i2c4i2c4-xfer >==$$i2c5i2c5-xfer >==%%i2si2s-8ch-bus> = ========88pwm0pwm0-pin>=33pwm1pwm1-pin>=44pwm3pwm3-pin>=55sdio0sdio0-bus1><sdio0-bus4@><<<<sdio0-cmd><  sdio0-clk>=  sdio0-cd><sdio0-wp><sdio0-pwr><sdio0-bkpwr><sdio0-int><sdmmcsdmmc-clk> =sdmmc-cmd> <sdmmc-cd> <sdmmc-bus1><sdmmc-bus4@><<<<spi0spi0-clk><spi0-cs0><spi0-cs1><spi0-tx><spi0-rx><spi1spi1-clk><spi1-cs0><spi1-cs1><spi1-rx><spi1-tx><spi2spi2-clk> <spi2-cs0> <!!spi2-rx> <  spi2-tx> <tsadcotp-gpio>=**otp-out>=++uart0uart0-xfer ><=uart0-cts>=uart0-rts>=uart1uart1-xfer ><=uart1-cts>=uart1-rts>=uart2uart2-xfer ><=66uart3uart3-xfer ><=uart3-cts>=uart3-rts>=uart4uart4-xfer ><=uart4-cts>=uart4-rts>=pcfg-pull-none-drv-8ma"/::pcfg-pull-up-drv-8ma/;;irir-int><DDkeyspwr-key><AAledsstby-pwren> =led-ctl>=CCsdiowifi-reg-on>=GGbt-rst>=FFusbhost-vbus-drv>=HHchosenLserial2:115200n8memorymemory@emmc-pwrseqmmc-pwrseq-emmc2?$default X@gpio-keys gpio-keys$default2Apowerd ^B rGPIO Powerxtgpio-leds gpio-ledswork ^.rr88:green:led$default2Cir-receivergpio-ir-receiver ^.$default2Dsdio-pwrseqmmc-pwrseq-simpleE ext_clock$default2FGX..  vcc18-regulatorregulator-fixedYvcc_18w@w@1vcc-host-regulatorregulator-fixed B$default2H Yvcc_host1vcc-io-regulatorregulator-fixedYvcc_io2Z2Z1vcc-lan-regulatorregulator-fixedYvcc_lan2Z2Z--vcc-sys-regulatorregulator-fixedYvcc_sysLK@LK@11vccio-wl-regulatorregulator-fixed Yvccio_wl2Z2Zvdd-10-regulatorregulator-fixedYvdd_10B@B@1 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2cpudevice_typeregenable-method#cooling-cellslinux,phandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyfifo-depthresetsreset-namesstatusassigned-clocksassigned-clock-parentsbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeeddisable-wp#io-channel-cellsvref-supplyreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cellspmu-supplyvop-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsaudio-supplygpio30-supplygpio1830-supplywifi-supplydmasdma-namesinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codeenable-active-high