8(:rockchip,rk3399-evbrockchip,rk3399google,rk3399evb-rev2 +!7Rockchip RK3399 Evaluation Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscicpu@1cpuarm,cortex-a53arm,armv8pscicpu@2cpuarm,cortex-a53arm,armv8pscicpu@3cpuarm,cortex-a53arm,armv8pscicpu@100cpuarm,cortex-a72arm,armv8psci cpu@101cpuarm,cortex-a72arm,armv8psci pmu_a53arm,cortex-a53-pmu pmu_a72arm,cortex-a72-pmu psci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24m'amba simple-bus+4dma-controller@ff6d0000arm,pl330arm,primecellm@ ; Fapb_pclkbbdma-controller@ff6e0000arm,pl330arm,primecelln@ ; Fapb_pclkpcie@f8000000rockchip,rk3399-pcie Raxi-baseapb-base+\my GFaclkaclk-perfhclkpm0123syslegacyclient`       pcie-phy848(coremgmtmgmt-stickypipepmpclkaclk disabled  default&interrupt-controller0\  ethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMFstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macE stmmacethSokay`pinputrgmiidefault&  'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р MFbiuciuciu-driveciu-sampleyreset disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр LFbiuciuciu-driveciu-sampleEzreset disabledsdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 `N$ NFclk_xinclk_ahbemmc_cardclock' phy_arasanEokay9CRlaausb@fe380000 generic-ehci8Fusbhostarbiterutmiusbokayusb@fe3a0000 generic-ohci:Fusbhostarbiterutmiusbokayusb@fe3c0000 generic-ehci<Fusbhostarbiterutmiusbokayusb@fe3e0000 generic-ohci> Fusbhostarbiterutmiusbokayusb@fe800000rockchip,rk3399-dwc3+4 $Fref_clksuspend_clkbus_clkgrf_clk disableddwc3 snps,dwc3izotg usb2-phy utmi_wide disabledusb@fe900000rockchip,rk3399-dwc3+4 $Fref_clksuspend_clkbus_clkgrf_clk disableddwc3 snps,dwc3nzotg usb2-phy utmi_wide disabledinterrupt-controller@fee00000 arm,gic-v3\+40P  interrupt-controller@fee20000arm,gic-v3-its  ppi-partitionsinterrupt-partition-0   interrupt-partition-1   saradc@ff100000rockchip,rk3399-saradc>PeFsaradcapb_pclk saradc-apb disabledi2c@ff110000rockchip,rk3399-i2c`A$ AU Fi2cpclk;default&+ disabledi2c@ff120000rockchip,rk3399-i2c`B$ BV Fi2cpclk#default&+ disabledi2c@ff130000rockchip,rk3399-i2c`C$ CW Fi2cpclk"default&+ disabledi2c@ff140000rockchip,rk3399-i2c`D$ DX Fi2cpclk&default&+ disabledi2c@ff150000rockchip,rk3399-i2c`E$ EY Fi2cpclk%default& + disabledi2c@ff160000rockchip,rk3399-i2c`F$ FZ Fi2cpclk$default&!+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`Fbaudclkapb_pclkc(2default&" disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRaFbaudclkapb_pclkb(2default&# disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbFbaudclkapb_pclkd(2default&$okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcFbaudclkapb_pclke(2default&% disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[Fspiclkapb_pclkDdefault&&'()+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\Fspiclkapb_pclk5default&*+,-+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]Fspiclkapb_pclk4default&./01+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^Fspiclkapb_pclkCdefault&2345+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_Fspiclkapb_pclkdefault&6789+ disabledthermal-zonescpu?dUc:tripscpu_alert0sppassive;;cpu_alert1s$passive<<cpu_critss criticalcooling-mapsmap0; map1<gpu?dUc:tripsgpu_alert0s$passive==gpu_critss criticalcooling-mapsmap0= tsadc@ff260000rockchip,rk3399-tsadc&a`O$ qOdFtsadcapb_pclk tsadc-apbSsinitdefaultsleep&>?> disabled::qos@ffa58000syscon GGqos@ffa5c000syscon HHqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon qos@ffa70080syscon qos@ffa74000syscon@ IIqos@ffa76000syscon` qos@ffa90000syscon JJqos@ffa98000syscon @@qos@ffaa0000syscon KKqos@ffaa0080syscon LLqos@ffaa8000syscon MMqos@ffaa8080syscon NNqos@ffab0000syscon AAqos@ffab0080syscon BBqos@ffab8000syscon CCqos@ffac0000syscon DDqos@ffac0080syscon EEqos@ffac8000syscon OOqos@ffac8080syscon PPqos@ffad0000syscon QQqos@ffad8080syscon qos@ffae0000syscon FFpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+pd_iep@34"@pd_rga@33!ABpd_vcodec@31Cpd_vdu@32 DEpd_gpu@35#Fpd_emmc@23Gpd_gmac@22fHpd_sd@27LIpd_vio@15+pd_hdcp@21rJpd_isp0@19KLpd_isp1@20MNpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17OPpd_vopl@18Qsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+__io-domains&rockchip,rk3399-pmu-io-voltage-domain disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5RRFspiclkapb_pclk<default&STUV+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7RR"Fbaudclkapb_pclkf(2default&W disabledi2c@ff3c0000rockchip,rk3399-i2c<`R $ R R Fi2cpclk9default&X+ disabledi2c@ff3d0000rockchip,rk3399-i2c=`R $ R R Fi2cpclk8default&Y+ disabledi2c@ff3e0000rockchip,rk3399-i2c>`R $ R R Fi2cpclk:default&Z+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefault&[RFpwmokayllpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefault&\RFpwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB default&]RFpwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0default&^RFpwmokaymmefuse@ff690000rockchip,rk3399-efusei+} Fpclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruuS_'`R$(JRRclock-controller@ff760000rockchip,rk3399-cruvS'``@BC0$#g/;рxh<4`#Fsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain disabledusb2-phy@e450rockchip,rk3399-usb2phyP{Fphyclk'clk_usbphy0_480mokayhost-port linestateokay`otg-port0ghjotg-bvalidotg-idlinestate disabledusb2-phy@e460rockchip,rk3399-usb2phy`|Fphyclk'clk_usbphy1_480mokayhost-port linestateokay`otg-port0lmootg-bvalidotg-idlinestate disabledphy@f780rockchip,rk3399-emmc-phy$aFemmcclkokaypcie-phyrockchip,rk3399-pcie-phyFrefclkphy disabled  phy@ff7c0000rockchip,rk3399-typec-phy|~}Ftcpdcoretcpdphy-ref`~$ELuphyuphy-pipeuphy-tcphyS  5 L b disableddp-portusb3-portphy@ff800000rockchip,rk3399-typec-phyFtcpdcoretcpdphy-ref`$E Muphyuphy-pipeuphy-tcphyS  5 L b disableddp-portusb3-portwatchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ Fpclktimerspdif@ff870000rockchip,rk3399-spdifBwb|tx FmclkhclkUdefault&c disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sS'wbb|txrxFi2s_clki2s_hclkVdefault&d disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(wbb|txrxFi2s_clki2s_hclkWdefault&e disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)wbb|txrxFi2s_clki2s_hclkX disabledpinctrlrockchip,rk3399-pinctrlS_+4gpio0@ff720000rockchip,gpio-bankrR0\gpio1@ff730000rockchip,gpio-banksR0\kkgpio2@ff780000rockchip,gpio-bankxP0\gpio3@ff788000rockchip,gpio-bankxQ0\gpio4@ff790000rockchip,gpio-bankyR0\nnpcfg-pull-upiipcfg-pull-downjjpcfg-pull-noneffpcfg-pull-none-12ma hhpcfg-pull-up-8mapcfg-pull-down-4mapcfg-pull-up-2mapcfg-pull-down-12ma pcfg-pull-none-13ma ggclockclk-32kfedpedp-hpdfgmacrgmii-pinsgf f g f ffffggffggrmii-pins f g f f ffffggi2c0i2c0-xfer ffXXi2c1i2c1-xfer ffi2c2i2c2-xfer hhi2c3i2c3-xfer ffi2c4i2c4-xfer  f fYYi2c5i2c5-xfer  f fi2c6i2c6-xfer  f f  i2c7i2c7-xfer ff!!i2c8i2c8-xfer ffZZi2s0i2s0-8ch-busfffffffffddi2s1i2s1-2ch-busPfffffeesdio0sdio0-bus1isdio0-bus4@iiiisdio0-cmdisdio0-clkfsdio0-cdisdio0-pwrisdio0-bkpwrisdio0-wpisdio0-intisdmmcsdmmc-bus1isdmmc-bus4@i i i isdmmc-clk fsdmmc-cmd isdmcc-cdisdmmc-wpisleepap-pwrofffddrio-pwrofffspdifspdif-busfccspdif-bus-1fspi0spi0-clki&&spi0-cs0i))spi0-cs1ispi0-txi''spi0-rxi((spi1spi1-clk i**spi1-cs0 i--spi1-rxi,,spi1-txi++spi2spi2-clk i..spi2-cs0 i11spi2-rx i00spi2-tx i//spi3spi3-clkiSSspi3-cs0iVVspi3-rxiUUspi3-txiTTspi4spi4-clki22spi4-cs0i55spi4-rxi44spi4-txi33spi5spi5-clki66spi5-cs0i99spi5-rxi88spi5-txi77tsadcotp-gpiof>>otp-outf??uart0uart0-xfer if""uart0-ctsfuart0-rtsfuart1uart1-xfer  i f##uart2auart2a-xfer i fuart2buart2b-xfer ifuart2cuart2c-xfer if$$uart3uart3-xfer if%%uart3-ctsfuart3-rtsfuart4uart4-xfer ifWWuarthdcpuarthdcp-xfer ifpwm0pwm0-pinf[[vop0-pwm-pinfpwm1pwm1-pinf\\vop1-pwm-pinfpwm2pwm2-pinf]]pwm3apwm3a-pinf^^pwm3bpwm3b-pinfhdmihdmi-i2c-xfer ffhdmi-cecfpciepci-clkreqnfpci-clkreqnbfpci-clkreqn-cpmfpci-clkreqnb-cpmfpmicpmic-int-lipmic-dvs2jusb2vcc5v0-host-enfoobacklightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~  k -laexternal-gmac-clock fixed-clocksY@ clkin_gmac'vdd-centerpwm-regulator-ma 2vdd_centerA 5Y\qokayvcc3v3-sysregulator-fixed 2vcc3v3_sysqA2ZY2Zvcc5v0-sysregulator-fixed 2vcc5v0_sysqALK@YLK@ppvcc5v0-host-regulatorregulator-fixed ndefault&o 2vcc5v0_hostp``vcc-phy-regulatorregulator-fixed2vcc_phyq compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-method#cooling-cellsclockslinux,phandleinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-deptharasan,soc-ctl-sysconassigned-clock-ratesbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirkmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qos#pwm-cells#reset-cells#phy-cellsrockchip,typec-conn-dirrockchip,usb3tousb2-enrockchip,external-psmrockchip,pipe-statusdmasdma-namesrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsbrightness-levelsdefault-brightness-levelenable-gpiospwmsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onenable-active-highvin-supply