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hosclosc2allwinner,sun5i-a10s-ccuinterrupt-controller@01c204002allwinner,sun4i-a10-icpinctrl@01c20800c5apbhosclosc*:2allwinner,sun5i-a10s-pinctrl  emac0@0XFPD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27Kemaci2c0@0FPB0PB1Ki2c0i2c1@0 FPB15PB16Ki2c1i2c2@0 FPB17PB18Ki2c2ir0@0FPB4Kir0lcd_rgb565@0_FPD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD19PD20PD21PD22PD23PD24PD25PD26PD27Klcd0lcd_rgb666@0hFPD2PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27Klcd0mmc0@0FPF0PF1PF2PF3PF4PF5Kmmc0Tcmmc2@0.FPC6PC7PC8PC9PC10PC11PC12PC13PC14PC15Kmmc2Tcmmc2-4bit@0FPC6PC7PC8PC9PC10PC11Kmmc2Tcnand-base0@06FPC0PC1PC2PC5PC8PC9PC10PC11PC12PC13PC14PC15Knand0nand-cs@0FPC4Knand0nand-rb@0FPC6Knand0spi2@0 FPE1PE2PE3Kspi2spi2-cs0@0FPE0Kspi2uart1@0 FPE10PE11Kuart1uart1@1FPG3PG4Kuart1uart2@0FPD2PD3Kuart2uart2-cts-rts@0FPD4PD5Kuart2uart3@0 FPG9PG10Kuart3uart3-cts-rts@0 FPG11PG12Kuart3pwm0FPB2Kpwmuart0@0 FPB19PB20Kuart0uart2@1 FPC18PC19Kuart2emac0@1KFPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16Kemacmmc1@0FPG3PG4PG5PG6PG7PG8Kmmc1T  spi2@1FPB12PB13PB14Kspi2spi2_cs0@1FPB11Kspi2ahci_pwr_pin@0FPB8 Kgpio_outusb0_vbus_pin@0FPB9 Kgpio_outusb1_vbus_pin@0FPG13 Kgpio_outusb2_vbus_pin@0FPH3 Kgpio_outusb0_id_detect_pin@0FPG12Kgpio_incmmc0_cd_pin@0FPG1Kgpio_inc  mmc1_vcc_en_pin@0FPB18 Kgpio_outled_pins@0FPB2 Kgpio_outTtimer@01c20c002allwinner,sun4i-a10-timer cwatchdog@01c20c902allwinner,sun4i-a10-wdt ir@01c218002allwinner,sun4i-a10-irc6Hapbir@ jdisabledlradc@01c228002allwinner,sun4i-a10-lradc-keys( jdisabledcodec@01c22c00p2allwinner,sun4i-a10-codec,@c2_ apbcodecrxtx jdisabledeeprom@01c238002allwinner,sun4i-a10-sid8rtp@01c250002allwinner,sun5i-a13-tsPserial@01c280002snps,dw-apb-uart€c;jokay4defaultBserial@01c284002snps,dw-apb-uart„c< jdisabledserial@01c288002snps,dw-apb-uartˆc= jdisabledserial@01c28c002snps,dw-apb-uartŒc> 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#address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0device_typereg#clock-cellsclock-frequencyclock-output-nameslinux,phandleinterrupts#dma-cellsclock-namesdmasdma-namesresetsremote-endpointallwinner,sramreset-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertednon-removablecap-sdio-irqinterrupt-namesphysphy-namesextcondr_mode#phy-cellsreg-namesusb0_id_det-gpiousb1_vbus-supply#reset-cellsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-up#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthassigned-clocksassigned-clock-rates#pwm-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highlabeldefault-state