$8(Xnvidia,p2571nvidia,tegra210 +'7NVIDIA Tegra210 P2571 reference designhost1x@50000000"nvidia,tegra210-host1xsimple-bus=P@AACLShost1x_fhost1x+rTTdpaux@54040000nvidia,tegra210-dpaux=T A L/ Sdpauxparent_fdpaux ydisabledvi@54080000nvidia,tegra210-vi=T AE ydisabledtsec@54100000nvidia,tegra210-tsec=Tdc@54200000nvidia,tegra210-dc=T  AIL Sdcparent_fdcdc@54240000nvidia,tegra210-dc=T$ AJL Sdcparent_fdcdsi@54300000nvidia,tegra210-dsi=T0L0Sdsilpparent_0fdsi ydisabled+vic@54340000nvidia,tegra210-vic=T4 ydisablednvjpg@54380000nvidia,tegra210-nvjpg=T8 ydisableddsi@54400000nvidia,tegra210-dsi=T@LRSdsilpparent_Rfdsi ydisabled+nvdec@54480000nvidia,tegra210-nvdec=TH ydisablednvenc@544c0000nvidia,tegra210-nvenc=TL ydisabledtsec@54500000nvidia,tegra210-tsec=TP ydisabledsor@54540000nvidia,tegra210-sor=TT AL L/Ssorparentdpsafe_fsor ydisabledsor@54580000nvidia,tegra210-sor1=TX AK L/Ssorparentdpsafe_fsor ydisableddpaux@545c0000nvidia,tegra124-dpaux=T\ AL/ Sdpauxparent_fdpaux ydisabledisp@54600000nvidia,tegra210-isp=T` AG ydisabledisp@54680000nvidia,tegra210-isp=Th AF ydisabledi2c@546c0000nvidia,tegra210-i2c-vi=Tl A ydisabledinterrupt-controller@50041000 arm,gic-400@=PP P@ P`  A  gpu@57000000 nvidia,gm20b =WXAstallnonstallL+ Sgpupwrref_fgpu ydisabledinterrupt-controller@60004000nvidia,tegra210-ictlr`=`@@`A@`B@`C@`D@`E@ timer@60005000+nvidia,tegra210-timernvidia,tegra20-timer=`PHA)*yzLStimerclock@60006000nvidia,tegra210-car=``flow-controller@60007000nvidia,tegra210-flowctrl=`pgpio@6000d000>nvidia,tegra210-gpionvidia,tegra124-gpionvidia,tegra30-gpio=``A !"#7WY}dma@60020000.nvidia,tegra210-apbdmanvidia,tegra148-apbdma=`AhijklmnopqrstuvwL"Sdma_"fdma#apbmisc@70000800/nvidia,tegra210-apbmiscnvidia,tegra20-apbmisc =pdpdpinmux@700008d4nvidia,tegra210-pinmux =pp0.boot<pinmuxpex_l0_rst_n_pa0Fpex_l0_rst_n_pa0R^npex_l0_clkreq_n_pa1Fpex_l0_clkreq_n_pa1rsvd1R^npex_wake_n_pa2Fpex_wake_n_pa2rsvd1R^npex_l1_rst_n_pa3Fpex_l1_rst_n_pa3rsvd1R^npex_l1_clkreq_n_pa4Fpex_l1_clkreq_n_pa4rsvd1R^nsata_led_active_pa5Fsata_led_active_pa5R^npa6Fpa6rsvd1R^ndap1_fs_pb0 Fdap1_fs_pb0rsvd1R^ndap1_din_pb1 Fdap1_din_pb1rsvd1R^ndap1_dout_pb2Fdap1_dout_pb2rsvd1R^ndap1_sclk_pb3Fdap1_sclk_pb3rsvd1R^nspi2_mosi_pb4Fspi2_mosi_pb4rsvd2R^nspi2_miso_pb5Fspi2_miso_pb5rsvd2R^nspi2_sck_pb6 Fspi2_sck_pb6rsvd2R^nspi2_cs0_pb7 Fspi2_cs0_pb7rsvd2R^nspi1_mosi_pc0Fspi1_mosi_pc0rsvd1R^nspi1_miso_pc1Fspi1_miso_pc1rsvd1R^nspi1_sck_pc2 Fspi1_sck_pc2rsvd1R^nspi1_cs0_pc3 Fspi1_cs0_pc3rsvd1R^nspi1_cs1_pc4 Fspi1_cs1_pc4rsvd1R^nspi4_sck_pc5 Fspi4_sck_pc5rsvd1R^nspi4_cs0_pc6 Fspi4_cs0_pc6rsvd1R^nspi4_mosi_pc7Fspi4_mosi_pc7rsvd1R^nspi4_miso_pd0Fspi4_miso_pd0rsvd1R^nuart3_tx_pd1 Fuart3_tx_pd1rsvd2R^nuart3_rx_pd2 Fuart3_rx_pd2rsvd2R^nuart3_rts_pd3Fuart3_rts_pd3rsvd2R^nuart3_cts_pd4Fuart3_cts_pd4R^ndmic1_clk_pe0Fdmic1_clk_pe0i2s3R^ndmic1_dat_pe1Fdmic1_dat_pe1i2s3R^ndmic2_clk_pe2Fdmic2_clk_pe2i2s3R^ndmic2_dat_pe3Fdmic2_dat_pe3i2s3R^ndmic3_clk_pe4Fdmic3_clk_pe4R^ndmic3_dat_pe5Fdmic3_dat_pe5rsvd2R^npe6Fpe6rsvd0R^npe7Fpe7pwm3R^ngen3_i2c_scl_pf0Fgen3_i2c_scl_pf0i2c3R^ngen3_i2c_sda_pf1Fgen3_i2c_sda_pf1i2c3R^nuart2_tx_pg0 Fuart2_tx_pg0R^nuart2_rx_pg1 Fuart2_rx_pg1uartbR^nuart2_rts_pg2Fuart2_rts_pg2rsvd2R^nuart2_cts_pg3Fuart2_cts_pg3rsvd2R^nwifi_en_ph0 Fwifi_en_ph0R^nwifi_rst_ph1 Fwifi_rst_ph1rsvd0R^nwifi_wake_ap_ph2Fwifi_wake_ap_ph2R^nap_wake_bt_ph3Fap_wake_bt_ph3R^nbt_rst_ph4 Fbt_rst_ph4R^nbt_wake_ap_ph5Fbt_wake_ap_ph5R^nph6Fph6rsvd0R^nap_wake_nfc_ph7Fap_wake_nfc_ph7rsvd0R^nnfc_en_pi0 Fnfc_en_pi0R^nnfc_int_pi1 Fnfc_int_pi1R^ngps_en_pi2 Fgps_en_pi2rsvd0R^ngps_rst_pi3 Fgps_rst_pi3rsvd0R^nuart4_tx_pi4 Fuart4_tx_pi4uartdR^nuart4_rx_pi5 Fuart4_rx_pi5uartdR^nuart4_rts_pi6Fuart4_rts_pi6uartdR^nuart4_cts_pi7Fuart4_cts_pi7uartdR^ngen1_i2c_sda_pj0Fgen1_i2c_sda_pj0i2c1R^ngen1_i2c_scl_pj1Fgen1_i2c_scl_pj1i2c1R^ngen2_i2c_scl_pj2Fgen2_i2c_scl_pj2i2c2R^ngen2_i2c_sda_pj3Fgen2_i2c_sda_pj3i2c2R^ndap4_fs_pj4 Fdap4_fs_pj4rsvd1R^ndap4_din_pj5 Fdap4_din_pj5rsvd1R^ndap4_dout_pj6Fdap4_dout_pj6rsvd1R^ndap4_sclk_pj7Fdap4_sclk_pj7rsvd1R^npk0Fpk0rsvd2R^npk1Fpk1rsvd2R^npk2Fpk2rsvd2R^npk3Fpk3rsvd2R^npk4Fpk4rsvd1R^npk5Fpk5rsvd1R^npk6Fpk6rsvd1R^npk7Fpk7rsvd1R^npl0Fpl0rsvd0R^npl1Fpl1rsvd1R^nsdmmc1_clk_pm0Fsdmmc1_clk_pm0sdmmc1R^nsdmmc1_cmd_pm1Fsdmmc1_cmd_pm1sdmmc1R^nsdmmc1_dat3_pm2Fsdmmc1_dat3_pm2sdmmc1R^nsdmmc1_dat2_pm3Fsdmmc1_dat2_pm3sdmmc1R^nsdmmc1_dat1_pm4Fsdmmc1_dat1_pm4sdmmc1R^nsdmmc1_dat0_pm5Fsdmmc1_dat0_pm5sdmmc1R^nsdmmc3_clk_pp0Fsdmmc3_clk_pp0sdmmc3R^nsdmmc3_cmd_pp1Fsdmmc3_cmd_pp1sdmmc3R^nsdmmc3_dat3_pp2Fsdmmc3_dat3_pp2sdmmc3R^nsdmmc3_dat2_pp3Fsdmmc3_dat2_pp3sdmmc3R^nsdmmc3_dat1_pp4Fsdmmc3_dat1_pp4sdmmc3R^nsdmmc3_dat0_pp5Fsdmmc3_dat0_pp5sdmmc3R^ncam1_mclk_ps0Fcam1_mclk_ps0rsvd1R^ncam2_mclk_ps1Fcam2_mclk_ps1rsvd1R^ncam_i2c_scl_ps2Fcam_i2c_scl_ps2i2cviR^ncam_i2c_sda_ps3Fcam_i2c_sda_ps3i2cviR^ncam_rst_ps4 Fcam_rst_ps4rsvd1R^ncam_af_en_ps5Fcam_af_en_ps5rsvd2R^ncam_flash_en_ps6Fcam_flash_en_ps6rsvd2R^ncam1_pwdn_ps7Fcam1_pwdn_ps7rsvd1R^ncam2_pwdn_pt0Fcam2_pwdn_pt0rsvd1R^ncam1_strobe_pt1Fcam1_strobe_pt1rsvd1R^nuart1_tx_pu0 Fuart1_tx_pu0uartaR^nuart1_rx_pu1 Fuart1_rx_pu1uartaR^nuart1_rts_pu2Fuart1_rts_pu2uartaR^nuart1_cts_pu3Fuart1_cts_pu3uartaR^nlcd_bl_pwm_pv0Flcd_bl_pwm_pv0pwm0R^nlcd_bl_en_pv1Flcd_bl_en_pv1R^nlcd_rst_pv2 Flcd_rst_pv2rsvd0R^nlcd_gpio1_pv3Flcd_gpio1_pv3rsvd1R^nlcd_gpio2_pv4Flcd_gpio2_pv4pwm1R^nap_ready_pv5 Fap_ready_pv5rsvd0R^ntouch_rst_pv6Ftouch_rst_pv6R^ntouch_clk_pv7Ftouch_clk_pv7rsvd1R^nmodem_wake_ap_px0Fmodem_wake_ap_px0rsvd0R^ntouch_int_px1Ftouch_int_px1rsvd0R^nmotion_int_px2Fmotion_int_px2rsvd0R^nals_prox_int_px3Fals_prox_int_px3rsvd0R^ntemp_alert_px4Ftemp_alert_px4R^nbutton_power_on_px5Fbutton_power_on_px5rsvd0R^nbutton_vol_up_px6Fbutton_vol_up_px6R^nbutton_vol_down_px7Fbutton_vol_down_px7R^nbutton_slide_sw_py0Fbutton_slide_sw_py0rsvd0R^nbutton_home_py1Fbutton_home_py1R^nlcd_te_py2 Flcd_te_py2rsvd1R^npwr_i2c_scl_py3Fpwr_i2c_scl_py3i2cpmuR^npwr_i2c_sda_py4Fpwr_i2c_sda_py4i2cpmuR^nclk_32k_out_py5Fclk_32k_out_py5socR^npz0Fpz0R^npz1Fpz1sdmmc1R^npz2Fpz2rsvd2R^npz3Fpz3rsvd1R^npz4Fpz4R^npz5Fpz5socR^ndap2_fs_paa0 Fdap2_fs_paa0i2s2R^ndap2_sclk_paa1Fdap2_sclk_paa1i2s2R^ndap2_din_paa2Fdap2_din_paa2i2s2R^ndap2_dout_paa3Fdap2_dout_paa3i2s2R^naud_mclk_pbb0Faud_mclk_pbb0audR^ndvfs_pwm_pbb1Fdvfs_pwm_pbb1cldvfsR^ndvfs_clk_pbb2Fdvfs_clk_pbb2R^ngpio_x1_aud_pbb3Fgpio_x1_aud_pbb3rsvd0R^ngpio_x3_aud_pbb4Fgpio_x3_aud_pbb4rsvd0R^nhdmi_cec_pcc0Fhdmi_cec_pcc0cecR^nhdmi_int_dp_hpd_pcc1Fhdmi_int_dp_hpd_pcc1R^nspdif_out_pcc2Fspdif_out_pcc2rsvd1R^nspdif_in_pcc3Fspdif_in_pcc3R^nusb_vbus_en0_pcc4Fusb_vbus_en0_pcc4usbR^nusb_vbus_en1_pcc5Fusb_vbus_en1_pcc5usbR^ndp_hpd0_pcc6 Fdp_hpd0_pcc6rsvd1R^npcc7Fpcc7rsvd0R^nspi2_cs1_pdd0Fspi2_cs1_pdd0rsvd1R^nqspi_sck_pee0Fqspi_sck_pee0rsvd1R^nqspi_cs_n_pee1Fqspi_cs_n_pee1rsvd1R^nqspi_io0_pee2Fqspi_io0_pee2rsvd1R^nqspi_io1_pee3Fqspi_io1_pee3rsvd1R^nqspi_io2_pee4Fqspi_io2_pee4rsvd1R^nqspi_io3_pee5Fqspi_io3_pee5rsvd1R^ncore_pwr_req Fcore_pwr_reqcoreR^ncpu_pwr_req Fcpu_pwr_reqcpuR^npwr_int_n Fpwr_int_npmiR^nclk_32k_in Fclk_32k_inclkR^njtag_rtck Fjtag_rtckjtagR^nclk_reqFclk_reqsysR^nshutdown Fshutdown shutdownR^nserial@70006000)nvidia,tegra210-uartnvidia,tegra20-uart=p`@ A$LSserial_fserialrxtxyokayserial@70006040)nvidia,tegra210-uartnvidia,tegra20-uart=p`@@ A%LSserial_fserial  rxtx ydisabledserial@70006200)nvidia,tegra210-uartnvidia,tegra20-uart=pb@ A.L7Sserial_7fserial  rxtx ydisabledserial@70006300)nvidia,tegra210-uartnvidia,tegra20-uart=pc@ AZLASserial_Afserialrxtx ydisabledpwm@7000a000'nvidia,tegra210-pwmnvidia,tegra20-pwm=pLSpwm_fpwm ydisabledi2c@7000c000(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A&+L Sdiv-clk_ fi2crxtx ydisabledi2c@7000c400(nvidia,tegra210-i2cnvidia,tegra114-i2c=p AT+L6Sdiv-clk_6fi2crxtx ydisabledi2c@7000c500(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A\+LCSdiv-clk_Cfi2crxtx ydisabledi2c@7000c700(nvidia,tegra210-i2cnvidia,tegra114-i2c=p Ax+LgSdiv-clk_gfi2crxtx ydisabledi2c@7000d000(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A5+L/Sdiv-clk_/fi2crxtxyokayi2c@7000d100(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A?+LSdiv-clk_fi2crxtx ydisabledspi@7000d400(nvidia,tegra210-spinvidia,tegra114-spi=p A;+L)Sspi_)fspirxtx ydisabledspi@7000d600(nvidia,tegra210-spinvidia,tegra114-spi=p AR+L,Sspi_,fspirxtx ydisabledspi@7000d800(nvidia,tegra210-spinvidia,tegra114-spi=p AS+L.Sspi_.fspirxtx ydisabledspi@7000da00(nvidia,tegra210-spinvidia,tegra114-spi=p A]+LDSspi_Dfspirxtx ydisabledrtc@7000e000'nvidia,tegra210-rtcnvidia,tegra20-rtc=p ALSrtcpmc@7000e400nvidia,tegra210-pmc=p L%Spclkclk32k_infuse@7000f800nvidia,tegra210-efuse=pLSfuse_'ffusememory-controller@70019000nvidia,tegra210-mc=pL Smc AMhda@70030000'nvidia,tegra210-hdanvidia,tegra30-hda=p AQL}oShdahda2hdmihda2codec_2x_}ofhdahda2hdmihda2codec_2x ydisabledusb@70090000nvidia,tegra210-xusb0=p p p  hcdfpciipfsA'(XLYj"xSxusb_hostxusb_host_srcxusb_falcon_srcxusb_ssxusb_ss_div2xusb_ss_srcxusb_hs_srcxusb_fs_srcpll_u_480mclk_mpll_e_Yfxusb_hostxusb_ssxusb_src  ydisabledpadctl@7009f000nvidia,tegra210-xusb-padctl=p _fpadctl ydisabled  padsusb2LStrk ydisabledlanesusb2-0 ydisabled'usb2-1 ydisabled'usb2-2 ydisabled'usb2-3 ydisabled'hsicLStrk ydisabledlaneshsic-0 ydisabled'hsic-1 ydisabled'pcieLSpll_fphy ydisabledlanespcie-0 ydisabled'pcie-1 ydisabled'pcie-2 ydisabled'pcie-3 ydisabled'pcie-4 ydisabled'pcie-5 ydisabled'pcie-6 ydisabled'sataLSpll_fphy ydisabledlanessata-0 ydisabled'portsusb2-0 ydisabledusb2-1 ydisabledusb2-2 ydisabledusb2-3 ydisabledhsic-0 ydisabledusb3-0 ydisabledusb3-1 ydisabledusb3-2 ydisabledusb3-3 ydisabledsdhci@700b0000,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhci ydisabledsdhci@700b0200,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  AL Ssdhci_ fsdhci ydisabledsdhci@700b0400,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALESsdhci_Efsdhci ydisabledsdhci@700b0600,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhciyokay2<mipi@700e3000nvidia,tegra210-mipi=p0L8 Smipi-calJspi@70410000nvidia,tegra210-qspi=pA A +LSqspi_fqspirxtx ydisabledusb@7d0000002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@ AgutmiLSusb_fusbp  ydisabledusb-phy@7d000000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@}@gutmiLSregpll_uutmi-pads_fusbutmi-pads{ (> Q ydisabled  usb@7d0040002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@@ AgutmiL:Susb_:fusbp  ydisabledusb-phy@7d004000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@@}@gutmiL:Sregpll_uutmi-pads_:fusbutmi-pads{ (>  ydisabled  cpus+cpu@0ocpuarm,cortex-a57=cpu@1ocpuarm,cortex-a57=cpu@2ocpuarm,cortex-a57=cpu@3ocpuarm,cortex-a57=timerarm,armv8-timer0A    aliases{/rtc@7000e000/serial@70006000chosenserial0:115200n8memoryomemory=clocks simple-bus+clock@0 fixed-clock= compatibleinterrupt-parent#address-cells#size-cellsmodelreginterruptsclocksclock-namesresetsreset-namesrangesstatusiommusnvidia,headnvidia,mipi-calibrate#interrupt-cellsinterrupt-controllerlinux,phandleinterrupt-names#clock-cells#reset-cells#gpio-cellsgpio-controller#dma-cellspinctrl-namespinctrl-0nvidia,pinsnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-hvnvidia,functionreg-shiftdmasdma-names#pwm-cellsclock-frequencynvidia,invert-interrupt#iommu-cellsreg-namesnvidia,xusb-padctl#phy-cellsbus-widthnon-removable#nvidia,mipi-calibrate-cellsphy_typenvidia,phynvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,xcvr-hsslewnvidia,has-utmi-pad-registersdevice_typertc1serial0stdout-path