Ð þíÉÔ8Á¸(Á€"nvidia,p2371-2180nvidia,tegra210 + 7NVIDIA Jetson TX1 Developer Kithost1x@50000000"nvidia,tegra210-host1xsimple-bus=P@AACLShost1x_fhost1x+rTTdpaux@54040000nvidia,tegra210-dpaux=T A LÏ/ Sdpauxparent_Ïfdpauxy‡okaypinmux-aux Ždpaux-io•auxž ¤ pinmux-i2c Ždpaux-io•i2cž¤pinmux-off Ždpaux-io•offž¤i2c-bus+vi@54080000nvidia,tegra210-vi=T AE ‡disabledtsec@54100000nvidia,tegra210-tsec=Tdc@54200000nvidia,tegra210-dc=T  AILó Sdcparent_fdc¬³dc@54240000nvidia,tegra210-dc=T$ AJLó Sdcparent_fdc¬³dsi@54300000nvidia,tegra210-dsi=T0L0“ûSdsilpparent_0fdsiy¿À‡okay+Õpanel@0auo,b080uan01= éªö vic@54340000nvidia,tegra210-vic=T4 ‡disablednvjpg@54380000nvidia,tegra210-nvjpg=T8 ‡disableddsi@54400000nvidia,tegra210-dsi=T@LR”ûSdsilpparent_Rfdsiy¿ ‡disabled+nvdec@54480000nvidia,tegra210-nvdec=TH ‡disablednvenc@544c0000nvidia,tegra210-nvenc=TL ‡disabledtsec@54500000nvidia,tegra210-tsec=TP ‡disabledsor@54540000nvidia,tegra210-sor=TT AL L¶û/ÞSsorparentdpsafe_¶fsor  !  +auxi2coffy ‡disabledsor@54580000nvidia,tegra210-sor1=TX AK(L·ý/ÞSsorsourceparentdpsafe_·fsor ! +auxi2coffy‡okay9HWc vádpaux@545c0000nvidia,tegra124-dpaux=T\ AŸLµ/ Sdpauxparent_µfdpauxy ‡disabledpinmux-aux Ždpaux-io•auxž ¤ pinmux-i2c Ždpaux-io•i2cž ¤ pinmux-off Ždpaux-io•offž ¤ i2c-bus+isp@54600000nvidia,tegra210-isp=T` AG ‡disabledisp@54680000nvidia,tegra210-isp=Th AF ‡disabledi2c@546c0000nvidia,tegra210-i2c-vi=Tl A ‡disabledinterrupt-controller@50041000 arm,gic-400†—@=PP P@ P`  A  ž¤gpu@57000000 nvidia,gm20b =WXAž¬stallnonstallL¸+½ Sgpupwrref_¸fgpu¬ ‡disabled¼interrupt-controller@60004000nvidia,tegra210-ictlr`=`@@`A@`B@`C@`D@`E@—† ž¤timer@60005000+nvidia,tegra210-timernvidia,tegra20-timer=`PHA)*yzLStimerclock@60006000nvidia,tegra210-car=``ÇÔž¤flow-controller@60007000nvidia,tegra210-flowctrl=`pgpio@6000d000)nvidia,tegra210-gpionvidia,tegra30-gpio=`Ð`A !"#7WY}á톗ž¤dma@60020000.nvidia,tegra210-apbdmanvidia,tegra148-apbdma=`€Ahijklmnopqrstuvw€‚ƒ„…†‡ˆ‰Š‹ŒŽL"Sdma_"fdmaýž¤apbmisc@70000800/nvidia,tegra210-apbmiscnvidia,tegra20-apbmisc =pdpèdpinmux@700008d4nvidia,tegra210-pinmux =pÔœp0”+boot pinmuxž¤pex_l0_rst_n_pa0pex_l0_rst_n_pa0pe0$0@Tfpex_l0_clkreq_n_pa1pex_l0_clkreq_n_pa1pe0$0@Tfpex_wake_n_pa2pex_wake_n_pa2pe$0@Tfpex_l1_rst_n_pa3pex_l1_rst_n_pa3pe1$0@Tfpex_l1_clkreq_n_pa4pex_l1_clkreq_n_pa4pe1$0@Tfsata_led_active_pa5sata_led_active_pa5$0@Tpa6pa6sata$0@Tdap1_fs_pb0 dap1_fs_pb0$0@Tdap1_din_pb1 dap1_din_pb1$0@Tdap1_dout_pb2dap1_dout_pb2$0@Tdap1_sclk_pb3dap1_sclk_pb3$0@Tspi2_mosi_pb4spi2_mosi_pb4spi2$0@Tspi2_miso_pb5spi2_miso_pb5spi2$0@Tspi2_sck_pb6 spi2_sck_pb6spi2$0@Tspi2_cs0_pb7 spi2_cs0_pb7spi2$0@Tspi1_mosi_pc0spi1_mosi_pc0$0@Tspi1_miso_pc1spi1_miso_pc1$0@Tspi1_sck_pc2 spi1_sck_pc2$0@Tspi1_cs0_pc3 spi1_cs0_pc3$0@Tspi1_cs1_pc4 spi1_cs1_pc4$0@Tspi4_sck_pc5 spi4_sck_pc5spi4$0@Tspi4_cs0_pc6 spi4_cs0_pc6spi4$0@Tspi4_mosi_pc7spi4_mosi_pc7spi4$0@Tspi4_miso_pd0spi4_miso_pd0spi4$0@Tuart3_tx_pd1 uart3_tx_pd1uartc$0@Tuart3_rx_pd2 uart3_rx_pd2uartc$0@Tuart3_rts_pd3uart3_rts_pd3uartc$0@Tuart3_cts_pd4uart3_cts_pd4uartc$0@Tdmic1_clk_pe0dmic1_clk_pe0i2s3$0@Tdmic1_dat_pe1dmic1_dat_pe1i2s3$0@Tdmic2_clk_pe2dmic2_clk_pe2i2s3$0@Tdmic2_dat_pe3dmic2_dat_pe3i2s3$0@Tdmic3_clk_pe4dmic3_clk_pe4$0@Tdmic3_dat_pe5dmic3_dat_pe5$0@Tpe6pe6$0@Tpe7pe7pwm3$0@Tgen3_i2c_scl_pf0gen3_i2c_scl_pf0i2c3$0@Tfgen3_i2c_sda_pf1gen3_i2c_sda_pf1i2c3$0@Tfuart2_tx_pg0 uart2_tx_pg0uartb$0@Tuart2_rx_pg1 uart2_rx_pg1uartb$0@Tuart2_rts_pg2uart2_rts_pg2uartb$0@Tuart2_cts_pg3uart2_cts_pg3uartb$0@Twifi_en_ph0 wifi_en_ph0$0@Twifi_rst_ph1 wifi_rst_ph1$0@Twifi_wake_ap_ph2wifi_wake_ap_ph2$0@Tap_wake_bt_ph3ap_wake_bt_ph3$0@Tbt_rst_ph4 bt_rst_ph4$0@Tbt_wake_ap_ph5bt_wake_ap_ph5$0@Tph6ph6$0@Tap_wake_nfc_ph7ap_wake_nfc_ph7$0@Tnfc_en_pi0 nfc_en_pi0$0@Tnfc_int_pi1 nfc_int_pi1$0@Tgps_en_pi2 gps_en_pi2$0@Tgps_rst_pi3 gps_rst_pi3rsvd0$0@Tuart4_tx_pi4 uart4_tx_pi4uartd$0@Tuart4_rx_pi5 uart4_rx_pi5uartd$0@Tuart4_rts_pi6uart4_rts_pi6uartd$0@Tuart4_cts_pi7uart4_cts_pi7uartd$0@Tgen1_i2c_sda_pj0gen1_i2c_sda_pj0i2c1$0@Tfgen1_i2c_scl_pj1gen1_i2c_scl_pj1i2c1$0@Tfgen2_i2c_scl_pj2gen2_i2c_scl_pj2i2c2$0@Tfgen2_i2c_sda_pj3gen2_i2c_sda_pj3i2c2$0@Tfdap4_fs_pj4 dap4_fs_pj4i2s4b$0@Tdap4_din_pj5 dap4_din_pj5i2s4b$0@Tdap4_dout_pj6dap4_dout_pj6i2s4b$0@Tdap4_sclk_pj7dap4_sclk_pj7i2s4b$0@Tpk0pk0i2s5b$0@Tpk1pk1i2s5b$0@Tpk2pk2i2s5b$0@Tpk3pk3i2s5b$0@Tpk4pk4$0@Tpk5pk5$0@Tpk6pk6$0@Tpk7pk7$0@Tpl0pl0rsvd0$0@Tpl1pl1$0@Tsdmmc1_clk_pm0sdmmc1_clk_pm0sdmmc1$0@Tsdmmc1_cmd_pm1sdmmc1_cmd_pm1sdmmc1$0@Tsdmmc1_dat3_pm2sdmmc1_dat3_pm2sdmmc1$0@Tsdmmc1_dat2_pm3sdmmc1_dat2_pm3sdmmc1$0@Tsdmmc1_dat1_pm4sdmmc1_dat1_pm4sdmmc1$0@Tsdmmc1_dat0_pm5sdmmc1_dat0_pm5sdmmc1$0@Tsdmmc3_clk_pp0sdmmc3_clk_pp0sdmmc3$0@Tsdmmc3_cmd_pp1sdmmc3_cmd_pp1sdmmc3$0@Tsdmmc3_dat3_pp2sdmmc3_dat3_pp2sdmmc3$0@Tsdmmc3_dat2_pp3sdmmc3_dat2_pp3sdmmc3$0@Tsdmmc3_dat1_pp4sdmmc3_dat1_pp4sdmmc3$0@Tsdmmc3_dat0_pp5sdmmc3_dat0_pp5sdmmc3$0@Tcam1_mclk_ps0cam1_mclk_ps0 extperiph3$0@Tcam2_mclk_ps1cam2_mclk_ps1 extperiph3$0@Tcam_i2c_scl_ps2cam_i2c_scl_ps2i2cvi$0@Tfcam_i2c_sda_ps3cam_i2c_sda_ps3i2cvi$0@Tfcam_rst_ps4 cam_rst_ps4$0@Tcam_af_en_ps5cam_af_en_ps5$0@Tcam_flash_en_ps6cam_flash_en_ps6$0@Tcam1_pwdn_ps7cam1_pwdn_ps7$0@Tcam2_pwdn_pt0cam2_pwdn_pt0$0@Tcam1_strobe_pt1cam1_strobe_pt1$0@Tuart1_tx_pu0 uart1_tx_pu0uarta$0@Tuart1_rx_pu1 uart1_rx_pu1uarta$0@Tuart1_rts_pu2uart1_rts_pu2$0@Tuart1_cts_pu3uart1_cts_pu3$0@Tlcd_bl_pwm_pv0lcd_bl_pwm_pv0pwm0$0@Tlcd_bl_en_pv1lcd_bl_en_pv1$0@Tlcd_rst_pv2 lcd_rst_pv2$0@Tlcd_gpio1_pv3lcd_gpio1_pv3$0@Tlcd_gpio2_pv4lcd_gpio2_pv4pwm1$0@Tap_ready_pv5 ap_ready_pv5$0@Ttouch_rst_pv6touch_rst_pv6$0@Ttouch_clk_pv7touch_clk_pv7touch$0@Tmodem_wake_ap_px0modem_wake_ap_px0$0@Ttouch_int_px1touch_int_px1$0@Tmotion_int_px2motion_int_px2$0@Tals_prox_int_px3als_prox_int_px3$0@Ttemp_alert_px4temp_alert_px4$0@Tbutton_power_on_px5button_power_on_px5$0@Tbutton_vol_up_px6button_vol_up_px6$0@Tbutton_vol_down_px7button_vol_down_px7$0@Tbutton_slide_sw_py0button_slide_sw_py0$0@Tbutton_home_py1button_home_py1$0@Tlcd_te_py2 lcd_te_py2 displaya$0@Tpwr_i2c_scl_py3pwr_i2c_scl_py3i2cpmu$0@Tfpwr_i2c_sda_py4pwr_i2c_sda_py4i2cpmu$0@Tfclk_32k_out_py5clk_32k_out_py5soc$0@Tpz0pz0$0@Tpz1pz1sdmmc1$0@Tpz2pz2$0@Tpz3pz3$0@Tpz4pz4sdmmc1$0@Tpz5pz5soc$0@Tdap2_fs_paa0 dap2_fs_paa0i2s2$0@Tdap2_sclk_paa1dap2_sclk_paa1i2s2$0@Tdap2_din_paa2dap2_din_paa2i2s2$0@Tdap2_dout_paa3dap2_dout_paa3i2s2$0@Taud_mclk_pbb0aud_mclk_pbb0$0@Tdvfs_pwm_pbb1dvfs_pwm_pbb1cldvfs$0@Tdvfs_clk_pbb2dvfs_clk_pbb2$0@Tgpio_x1_aud_pbb3gpio_x1_aud_pbb3$0@Tgpio_x3_aud_pbb4gpio_x3_aud_pbb4rsvd0$0@Thdmi_cec_pcc0hdmi_cec_pcc0cec$0@Tfhdmi_int_dp_hpd_pcc1hdmi_int_dp_hpd_pcc1$0@Tfspdif_out_pcc2spdif_out_pcc2rsvd1$0@Tspdif_in_pcc3spdif_in_pcc3rsvd1$0@Tusb_vbus_en0_pcc4usb_vbus_en0_pcc4usb$0@Tfusb_vbus_en1_pcc5usb_vbus_en1_pcc5usb$0@Tfdp_hpd0_pcc6 dp_hpd0_pcc6dp$0@Tpcc7pcc7rsvd0$0@Tfspi2_cs1_pdd0spi2_cs1_pdd0spi2$0@Tqspi_sck_pee0qspi_sck_pee0rsvd1$0@Tqspi_cs_n_pee1qspi_cs_n_pee1rsvd1$0@Tqspi_io0_pee2qspi_io0_pee2rsvd1$0@Tqspi_io1_pee3qspi_io1_pee3rsvd1$0@Tqspi_io2_pee4qspi_io2_pee4rsvd1$0@Tqspi_io3_pee5qspi_io3_pee5rsvd1$0@Tcore_pwr_req core_pwr_reqcore$0@Tcpu_pwr_req cpu_pwr_reqcpu$0@Tpwr_int_n pwr_int_npmi$0@Tclk_32k_in clk_32k_inclk$0@Tjtag_rtck jtag_rtckjtag$0@Tclk_reqclk_reqrsvd1$0@Tshutdown shutdown shutdown$0@Tserial@70006000)nvidia,tegra210-uartnvidia,tegra20-uart=p`@s A$LSserial_fserial}‚rxtx‡okayserial@70006040)nvidia,tegra210-uartnvidia,tegra20-uart=p`@@s A%LàSserial_fserial}  ‚rxtx ‡disabledserial@70006200)nvidia,tegra210-uartnvidia,tegra20-uart=pb@s A.L7Sserial_7fserial}  ‚rxtx ‡disabledserial@70006300)nvidia,tegra210-uartnvidia,tegra20-uart=pc@s AZLASserial_Afserial}‚rxtx ‡disabledpwm@7000a000'nvidia,tegra210-pwmnvidia,tegra20-pwm=p ŒLSpwm_fpwm‡okayž¤i2c@7000c000(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÀ A&+L Sdiv-clk_ fi2c}‚rxtx ‡disabledi2c@7000c400(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÄ AT+L6Sdiv-clk_6fi2c}‚rxtx‡okay—† gpio@74 ti,tca9539=táíž5¤5backlight@2c ti,lp8557=,§€°ÿ¹r– Är–Élp8557ž ¤ rom_14hÓ܇rom_13hÓÜi2c@7000c500(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÅ A\+LCSdiv-clk_Cfi2c}‚rxtx ‡disabledi2c@7000c700(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÇ Ax+LgSdiv-clk_gfi2c}‚rxtx  +defaultidle‡okay—† ž¤i2c@7000d000(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÐ A5+L/Sdiv-clk_/fi2c}‚rxtx‡okay—€pmic@3cmaxim,max77620=< AV†—áí+default ž2¤2pinmuxž¤gpio0gpio0•gpiogpio1gpio1•fps-outäô +gpio2_3 gpio2gpio3•fps-outLôgpio4gpio4 •32k-out1gpio5_6_7gpio5gpio6gpio7•gpioäfpsfps0]tfps1]tfps2]regulators•¦·sd0ÅVDD_SOCÔ 'Àì\À*’Fklôsd1ÅVDD_DDR_1V1_PMIC*‚Fklôsd2ÅVDD_PRE_REG_1V35Ô™pì™p*°Fklôž¤sd3ÅVDD_1V8Ôw@ìw@*òFklôž¤ldo0 ÅAVDD_SYS_1V2ÔO€ìO€*F† ôž4¤4ldo1 ÅVDD_PEX_1V05Ôì*F† ôž$¤$ldo2 ÅVDDIO_SDMMCÔ2Z ì2Z *>F† ôž(¤(ldo3 ÅVDD_CAM_HVÔ*¹€ì*¹€*2F† ôldo4ÅVDD_RTCÔ øPì øP*F† ôldo5 ÅVDD_TS_HVÔ2Z ì2Z *>F† ôldo6 ÅVDD_TS_1V8Ôw@ìw@*$F† ô +ldo7ÅAVDD_1V05_PLLÔì*F† ôldo8ÅAVDD_SATA_HDMI_DP_1V05Ôì*F† ôž¤i2c@7000d100(nvidia,tegra210-i2cnvidia,tegra114-i2c=pÑ A?+L¦Sdiv-clk_¦fi2c}‚rxtx   +defaultidle ‡disabledspi@7000d400(nvidia,tegra210-spinvidia,tegra114-spi=pÔ A;+L)Sspi_)fspi}‚rxtx ‡disabledspi@7000d600(nvidia,tegra210-spinvidia,tegra114-spi=pÖ AR+L,Sspi_,fspi}‚rxtx ‡disabledspi@7000d800(nvidia,tegra210-spinvidia,tegra114-spi=pØ AS+L.Sspi_.fspi}‚rxtx ‡disabledspi@7000da00(nvidia,tegra210-spinvidia,tegra114-spi=pÚ A]+LDSspi_Dfspi}‚rxtx ‡disabledrtc@7000e000'nvidia,tegra210-rtcnvidia,tegra20-rtc=pà ALSrtcpmc@7000e400nvidia,tegra210-pmc=pä L%Spclkclk32k_in[powergatesaudLÆk_Æsž*¤*sor@L¶·40RµÏ8@_¶·40RµÏ8sž¤xusbaLœ_œsxusbbL!__sxusbcLY_Ysfuse@7000f800nvidia,tegra210-efuse=pøLæSfuse_'ffusememory-controller@70019000nvidia,tegra210-mc=pL Smc AM‡ž¤hda@70030000'nvidia,tegra210-hdanvidia,tegra30-hda=p AQL}€oShdahda2hdmihda2codec_2x_}€ofhdahda2hdmihda2codec_2x ‡disabledusb@70090000nvidia,tegra210-xusb0=p €p €p ”hcdfpciipfsA'(XLYœj"ÿéxSxusb_hostxusb_host_srcxusb_falcon_srcxusb_ssxusb_ss_div2xusb_ss_srcxusb_hs_srcxusb_fs_srcpll_u_480mclk_mpll_e_Yœfxusb_hostxusb_ssxusb_srcž‡okay± !"#*¶usb2-0usb2-1usb2-2usb2-3usb3-0usb3-1À$Òä%ô $!$8padctl@7009f000nvidia,tegra210-xusb-padctl=p ð_Žfpadctl‡okayž¤padsusb2LÒStrk‡okaylanesusb2-0‡okayQxusbž¤usb2-1‡okayQxusbž¤usb2-2‡okayQxusbž ¤ usb2-3‡okayQxusbž!¤!hsicLÑStrk ‡disabledlaneshsic-0 ‡disabledQhsic-1 ‡disabledQpcieLSpll_Ífphy‡okaylanespcie-0‡okayQpcie-x1pcie-1‡okayQpcie-x4pcie-2‡okayQpcie-x4pcie-3‡okayQpcie-x4pcie-4‡okayQpcie-x4pcie-5‡okayQusb3-ssž#¤#pcie-6‡okayQusb3-ssž"¤"sataLSpll_Ìfphy‡okaylanessata-0‡okayQsataportsusb2-0‡okay\otgusb2-1‡okaya&\hostusb2-2‡okaya'\hostusb2-3‡okay\hosthsic-0 ‡disabledusb3-0‡okaymusb3-1‡okaymusb3-2 ‡disabledusb3-3 ‡disabledsdhci@700b0000,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhci‡okayƒ –ÉŸ(¬)sdhci@700b0200,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  AL Ssdhci_ fsdhci ‡disabledsdhci@700b0400,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALESsdhci_Efsdhci ‡disabledsdhci@700b0600,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhci‡okayƒ¸mipi@700e3000nvidia,tegra210-mipi=p0L8 Smipi-calyÆž¤aconnect@702c0000nvidia,tegra210-aconnectLÆk Sapeapb2apey*+rp,p, ‡disableddma@702e2000nvidia,tegra210-adma=p.  +A !"#$%&'()*+,-ýLjSd_audio ‡disabledagic@702f9000nvidia,tegra210-agic†—=p/ p/   AfLÆSclk ‡disabledž+¤+spi@70410000nvidia,tegra210-qspi=pA A +LÓSqspi_Ófqspi}‚rxtx ‡disabledusb@7d0000002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@ AãutmiLSusb_fusbì, ‡disabledusb-phy@7d000000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@}@ãutmiLþSregpll_uutmi-pads_fusbutmi-pads÷(=S ey¤º Í ‡disabledž,¤,usb@7d0040002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@@ AãutmiL:Susb_:fusbì- ‡disabledusb-phy@7d004000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@@}@ãutmiL:þSregpll_uutmi-pads_:fusbutmi-pads÷(=S ey¤º  ‡disabledž-¤-cpus+cpu@0ëcpuarm,cortex-a57=cpu@1ëcpuarm,cortex-a57=cpu@2ëcpuarm,cortex-a57=cpu@3ëcpuarm,cortex-a57=timerarm,armv8-timer0A    thermal-sensor@700e2000nvidia,tegra210-soctherm =p ``”soctherm-regcar-reg A0LdNStsensorsoctherm_N fsoctherm÷ž.¤.throttle-cfgsheavy dU6ž0¤0thermal-zonescpuEè[i.tripscpu-shutdown-tripyd… çcriticalthrottle-tripy€Ä…èçhotž/¤/cooling-mapsmap0/ •0memE[i.tripsmem-shutdown-tripy’X… çcriticalcooling-mapsgpuEè[i.tripsgpu-shutdown-tripy’X… çcriticalthrottle-tripy† …èçhotž1¤1cooling-mapsmap01 •0pllxE[i.tripspllx-shutdown-tripy’X… çcriticalcooling-mapsaliases¤/i2c@7000d000/pmic@3c©/rtc@7000e000®/serial@70006000chosen¶serial0:115200n8memoryëmemory=€clocks simple-bus+clock@0 fixed-clock=Ç—€ž¤regulators simple-bus+regulator@100pwm-regulator=d ÄÅVDD_GPUÔ Õpì$@ é2FP*螤regulator@0regulator-fixed= ÅVDD_SYS_MUXÔLK@ìLK@ž3¤3regulator@1regulator-fixed= ÅVDD_5V0_SYSÔLK@ìLK@ 2ÂÕ3ž¤regulator@2regulator-fixed= ÅVDD_3V3_SYSÔ2Z ì2Z  2ÂÕ3* à'ž%¤%regulator@3regulator-fixed=ÅVDD_5V0_IO_SYSÔLK@ìLK@ž¤regulator@4regulator-fixed= ÅVDD_3V3_SDÔ2Z ì2Z  ÌÂÕ%*Øàž)¤)regulator@5regulator-fixed=ÅAVDD_DSI_CSI_1V2ÔO€ìO€Õ4ž¤regulator@6regulator-fixed=ÅVDD_DIS_3V3_LCDÔ2Z ì2Z  5ÂÕ%regulator@7regulator-fixed=ÅVDD_LCD_1V8_DISÔw@ìw@ 5ÂÕregulator@8regulator-fixed=ÅRTL_5VÔLK@ìLK@ 9ÂÕž&¤&regulator@9regulator-fixed=  ÅUSB_VBUS_EN1ÔLK@ìLK@ åÂÕž'¤'regulator@10regulator-fixed=  ÅVDD_HDMI_5V0ÔLK@ìLK@ 5 ÂÕž¤gpio-keys gpio-keys ýgpio-keyspowerýPower ð½tvolume_down ýVolume Down ðÀrvolume_up ýVolume Up ð¾s compatibleinterrupt-parent#address-cells#size-cellsmodelreginterruptsclocksclock-namesresetsreset-namesrangespower-domainsstatusgroupsfunctionlinux,phandleiommusnvidia,headnvidia,mipi-calibrateavdd-dsi-csi-supplyenable-gpiospower-supplybacklightpinctrl-0pinctrl-1pinctrl-2pinctrl-namesavdd-io-supplyvdd-pll-supplyhdmi-supplynvidia,ddc-i2c-busnvidia,hpd-gpio#interrupt-cellsinterrupt-controllerinterrupt-namesvdd-supply#clock-cells#reset-cells#gpio-cellsgpio-controller#dma-cellsnvidia,pinsnvidia,functionnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-hvreg-shiftdmasdma-names#pwm-cellsclock-frequencydev-ctrlinit-brtpwm-periodpwmspwm-namesrom-addrrom-valdrive-push-pullmaxim,active-fps-sourcemaxim,active-fps-power-up-slotmaxim,active-fps-power-down-slotdrive-open-drainmaxim,fps-event-sourcemaxim,suspend-fps-time-period-usin-ldo0-1-supplyin-ldo7-8-supplyin-sd3-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delaynvidia,invert-interrupt#power-domain-cells#iommu-cellsreg-namesnvidia,xusb-padctlphysphy-namesdvddio-pex-supplyhvddio-pex-supplyavdd-usb-supplyavdd-pll-utmip-supplyavdd-pll-uerefe-supplydvdd-usb-ss-pll-supplyhvdd-usb-ss-pll-e-supply#phy-cellsmodevbus-supplynvidia,usb2-companionbus-widthno-1-8-vcd-gpiosvqmmc-supplyvmmc-supplynon-removable#nvidia,mipi-calibrate-cellsphy_typenvidia,phynvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,xcvr-hsslewnvidia,has-utmi-pad-registersdevice_type#thermal-sensor-cellsnvidia,prioritynvidia,cpu-throt-percent#cooling-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicertc0rtc1serial0stdout-pathenable-active-highvin-supplyregulator-disable-ramp-delaylabellinux,codewakeup-source