8L(nvidia,p2571nvidia,tegra210 +'7NVIDIA Tegra210 P2571 reference designhost1x@50000000"nvidia,tegra210-host1xsimple-bus=P@AACLShost1x_fhost1x+rTTdpaux@54040000nvidia,tegra210-dpaux=T A L/ Sdpauxparent_fdpauxy disabledpinmux-aux dpaux-ioaux  pinmux-i2c dpaux-ioi2c  pinmux-off dpaux-iooff  i2c-bus+vi@54080000nvidia,tegra210-vi=T AE disabledtsec@54100000nvidia,tegra210-tsec=Tdc@54200000nvidia,tegra210-dc=T  AIL Sdcparent_fdcdc@54240000nvidia,tegra210-dc=T$ AJL Sdcparent_fdcdsi@54300000nvidia,tegra210-dsi=T0L0Sdsilpparent_0fdsiy disabled+vic@54340000nvidia,tegra210-vic=T4 disablednvjpg@54380000nvidia,tegra210-nvjpg=T8 disableddsi@54400000nvidia,tegra210-dsi=T@LRSdsilpparent_Rfdsiy disabled+nvdec@54480000nvidia,tegra210-nvdec=TH disablednvenc@544c0000nvidia,tegra210-nvenc=TL disabledtsec@54500000nvidia,tegra210-tsec=TP disabledsor@54540000nvidia,tegra210-sor=TT AL L/Ssorparentdpsafe_fsor auxi2coffy disabledsor@54580000nvidia,tegra210-sor1=TX AK(L/Ssorsourceparentdpsafe_fsor    auxi2coffy disableddpaux@545c0000nvidia,tegra124-dpaux=T\ AL/ Sdpauxparent_fdpauxy disabledpinmux-aux dpaux-ioauxpinmux-i2c dpaux-ioi2cpinmux-off dpaux-iooffi2c-bus+isp@54600000nvidia,tegra210-isp=T` AG disabledisp@54680000nvidia,tegra210-isp=Th AF disabledi2c@546c0000nvidia,tegra210-i2c-vi=Tl A disabledinterrupt-controller@50041000 arm,gic-400@=PP P@ P`  A    gpu@57000000 nvidia,gm20b =WXA'stallnonstallL+ Sgpupwrref_fgpu disabledinterrupt-controller@60004000nvidia,tegra210-ictlr`=`@@`A@`B@`C@`D@`E@ timer@60005000+nvidia,tegra210-timernvidia,tegra20-timer=`PHA)*yzLStimerclock@60006000nvidia,tegra210-car=``7Dflow-controller@60007000nvidia,tegra210-flowctrl=`pgpio@6000d000)nvidia,tegra210-gpionvidia,tegra30-gpio=``A !"#7WY}Q]dma@60020000.nvidia,tegra210-apbdmanvidia,tegra148-apbdma=`AhijklmnopqrstuvwL"Sdma_"fdmamapbmisc@70000800/nvidia,tegra210-apbmiscnvidia,tegra20-apbmisc =pdpdpinmux@700008d4nvidia,tegra210-pinmux =pp0boot pinmux  pex_l0_rst_n_pa0xpex_l0_rst_n_pa0pex_l0_clkreq_n_pa1xpex_l0_clkreq_n_pa1rsvd1pex_wake_n_pa2xpex_wake_n_pa2rsvd1pex_l1_rst_n_pa3xpex_l1_rst_n_pa3rsvd1pex_l1_clkreq_n_pa4xpex_l1_clkreq_n_pa4rsvd1sata_led_active_pa5xsata_led_active_pa5pa6xpa6rsvd1dap1_fs_pb0 xdap1_fs_pb0rsvd1dap1_din_pb1 xdap1_din_pb1rsvd1dap1_dout_pb2xdap1_dout_pb2rsvd1dap1_sclk_pb3xdap1_sclk_pb3rsvd1spi2_mosi_pb4xspi2_mosi_pb4rsvd2spi2_miso_pb5xspi2_miso_pb5rsvd2spi2_sck_pb6 xspi2_sck_pb6rsvd2spi2_cs0_pb7 xspi2_cs0_pb7rsvd2spi1_mosi_pc0xspi1_mosi_pc0rsvd1spi1_miso_pc1xspi1_miso_pc1rsvd1spi1_sck_pc2 xspi1_sck_pc2rsvd1spi1_cs0_pc3 xspi1_cs0_pc3rsvd1spi1_cs1_pc4 xspi1_cs1_pc4rsvd1spi4_sck_pc5 xspi4_sck_pc5rsvd1spi4_cs0_pc6 xspi4_cs0_pc6rsvd1spi4_mosi_pc7xspi4_mosi_pc7rsvd1spi4_miso_pd0xspi4_miso_pd0rsvd1uart3_tx_pd1 xuart3_tx_pd1rsvd2uart3_rx_pd2 xuart3_rx_pd2rsvd2uart3_rts_pd3xuart3_rts_pd3rsvd2uart3_cts_pd4xuart3_cts_pd4dmic1_clk_pe0xdmic1_clk_pe0i2s3dmic1_dat_pe1xdmic1_dat_pe1i2s3dmic2_clk_pe2xdmic2_clk_pe2i2s3dmic2_dat_pe3xdmic2_dat_pe3i2s3dmic3_clk_pe4xdmic3_clk_pe4dmic3_dat_pe5xdmic3_dat_pe5rsvd2pe6xpe6rsvd0pe7xpe7pwm3gen3_i2c_scl_pf0xgen3_i2c_scl_pf0i2c3gen3_i2c_sda_pf1xgen3_i2c_sda_pf1i2c3uart2_tx_pg0 xuart2_tx_pg0uart2_rx_pg1 xuart2_rx_pg1uartbuart2_rts_pg2xuart2_rts_pg2rsvd2uart2_cts_pg3xuart2_cts_pg3rsvd2wifi_en_ph0 xwifi_en_ph0wifi_rst_ph1 xwifi_rst_ph1rsvd0wifi_wake_ap_ph2xwifi_wake_ap_ph2ap_wake_bt_ph3xap_wake_bt_ph3bt_rst_ph4 xbt_rst_ph4bt_wake_ap_ph5xbt_wake_ap_ph5ph6xph6rsvd0ap_wake_nfc_ph7xap_wake_nfc_ph7rsvd0nfc_en_pi0 xnfc_en_pi0nfc_int_pi1 xnfc_int_pi1gps_en_pi2 xgps_en_pi2rsvd0gps_rst_pi3 xgps_rst_pi3rsvd0uart4_tx_pi4 xuart4_tx_pi4uartduart4_rx_pi5 xuart4_rx_pi5uartduart4_rts_pi6xuart4_rts_pi6uartduart4_cts_pi7xuart4_cts_pi7uartdgen1_i2c_sda_pj0xgen1_i2c_sda_pj0i2c1gen1_i2c_scl_pj1xgen1_i2c_scl_pj1i2c1gen2_i2c_scl_pj2xgen2_i2c_scl_pj2i2c2gen2_i2c_sda_pj3xgen2_i2c_sda_pj3i2c2dap4_fs_pj4 xdap4_fs_pj4rsvd1dap4_din_pj5 xdap4_din_pj5rsvd1dap4_dout_pj6xdap4_dout_pj6rsvd1dap4_sclk_pj7xdap4_sclk_pj7rsvd1pk0xpk0rsvd2pk1xpk1rsvd2pk2xpk2rsvd2pk3xpk3rsvd2pk4xpk4rsvd1pk5xpk5rsvd1pk6xpk6rsvd1pk7xpk7rsvd1pl0xpl0rsvd0pl1xpl1rsvd1sdmmc1_clk_pm0xsdmmc1_clk_pm0sdmmc1sdmmc1_cmd_pm1xsdmmc1_cmd_pm1sdmmc1sdmmc1_dat3_pm2xsdmmc1_dat3_pm2sdmmc1sdmmc1_dat2_pm3xsdmmc1_dat2_pm3sdmmc1sdmmc1_dat1_pm4xsdmmc1_dat1_pm4sdmmc1sdmmc1_dat0_pm5xsdmmc1_dat0_pm5sdmmc1sdmmc3_clk_pp0xsdmmc3_clk_pp0sdmmc3sdmmc3_cmd_pp1xsdmmc3_cmd_pp1sdmmc3sdmmc3_dat3_pp2xsdmmc3_dat3_pp2sdmmc3sdmmc3_dat2_pp3xsdmmc3_dat2_pp3sdmmc3sdmmc3_dat1_pp4xsdmmc3_dat1_pp4sdmmc3sdmmc3_dat0_pp5xsdmmc3_dat0_pp5sdmmc3cam1_mclk_ps0xcam1_mclk_ps0rsvd1cam2_mclk_ps1xcam2_mclk_ps1rsvd1cam_i2c_scl_ps2xcam_i2c_scl_ps2i2cvicam_i2c_sda_ps3xcam_i2c_sda_ps3i2cvicam_rst_ps4 xcam_rst_ps4rsvd1cam_af_en_ps5xcam_af_en_ps5rsvd2cam_flash_en_ps6xcam_flash_en_ps6rsvd2cam1_pwdn_ps7xcam1_pwdn_ps7rsvd1cam2_pwdn_pt0xcam2_pwdn_pt0rsvd1cam1_strobe_pt1xcam1_strobe_pt1rsvd1uart1_tx_pu0 xuart1_tx_pu0uartauart1_rx_pu1 xuart1_rx_pu1uartauart1_rts_pu2xuart1_rts_pu2uartauart1_cts_pu3xuart1_cts_pu3uartalcd_bl_pwm_pv0xlcd_bl_pwm_pv0pwm0lcd_bl_en_pv1xlcd_bl_en_pv1lcd_rst_pv2 xlcd_rst_pv2rsvd0lcd_gpio1_pv3xlcd_gpio1_pv3rsvd1lcd_gpio2_pv4xlcd_gpio2_pv4pwm1ap_ready_pv5 xap_ready_pv5rsvd0touch_rst_pv6xtouch_rst_pv6touch_clk_pv7xtouch_clk_pv7rsvd1modem_wake_ap_px0xmodem_wake_ap_px0rsvd0touch_int_px1xtouch_int_px1rsvd0motion_int_px2xmotion_int_px2rsvd0als_prox_int_px3xals_prox_int_px3rsvd0temp_alert_px4xtemp_alert_px4button_power_on_px5xbutton_power_on_px5rsvd0button_vol_up_px6xbutton_vol_up_px6button_vol_down_px7xbutton_vol_down_px7button_slide_sw_py0xbutton_slide_sw_py0rsvd0button_home_py1xbutton_home_py1lcd_te_py2 xlcd_te_py2rsvd1pwr_i2c_scl_py3xpwr_i2c_scl_py3i2cpmupwr_i2c_sda_py4xpwr_i2c_sda_py4i2cpmuclk_32k_out_py5xclk_32k_out_py5socpz0xpz0pz1xpz1sdmmc1pz2xpz2rsvd2pz3xpz3rsvd1pz4xpz4pz5xpz5socdap2_fs_paa0 xdap2_fs_paa0i2s2dap2_sclk_paa1xdap2_sclk_paa1i2s2dap2_din_paa2xdap2_din_paa2i2s2dap2_dout_paa3xdap2_dout_paa3i2s2aud_mclk_pbb0xaud_mclk_pbb0auddvfs_pwm_pbb1xdvfs_pwm_pbb1cldvfsdvfs_clk_pbb2xdvfs_clk_pbb2gpio_x1_aud_pbb3xgpio_x1_aud_pbb3rsvd0gpio_x3_aud_pbb4xgpio_x3_aud_pbb4rsvd0hdmi_cec_pcc0xhdmi_cec_pcc0cechdmi_int_dp_hpd_pcc1xhdmi_int_dp_hpd_pcc1spdif_out_pcc2xspdif_out_pcc2rsvd1spdif_in_pcc3xspdif_in_pcc3usb_vbus_en0_pcc4xusb_vbus_en0_pcc4usbusb_vbus_en1_pcc5xusb_vbus_en1_pcc5usbdp_hpd0_pcc6 xdp_hpd0_pcc6rsvd1pcc7xpcc7rsvd0spi2_cs1_pdd0xspi2_cs1_pdd0rsvd1qspi_sck_pee0xqspi_sck_pee0rsvd1qspi_cs_n_pee1xqspi_cs_n_pee1rsvd1qspi_io0_pee2xqspi_io0_pee2rsvd1qspi_io1_pee3xqspi_io1_pee3rsvd1qspi_io2_pee4xqspi_io2_pee4rsvd1qspi_io3_pee5xqspi_io3_pee5rsvd1core_pwr_req xcore_pwr_reqcorecpu_pwr_req xcpu_pwr_reqcpupwr_int_n xpwr_int_npmiclk_32k_in xclk_32k_inclkjtag_rtck xjtag_rtckjtagclk_reqxclk_reqsysshutdown xshutdown shutdownserial@70006000)nvidia,tegra210-uartnvidia,tegra20-uart=p`@ A$LSserial_fserialrxtxokayserial@70006040)nvidia,tegra210-uartnvidia,tegra20-uart=p`@@ A%LSserial_fserial  rxtx disabledserial@70006200)nvidia,tegra210-uartnvidia,tegra20-uart=pb@ A.L7Sserial_7fserial  rxtx disabledserial@70006300)nvidia,tegra210-uartnvidia,tegra20-uart=pc@ AZLASserial_Afserialrxtx disabledpwm@7000a000'nvidia,tegra210-pwmnvidia,tegra20-pwm=pLSpwm_fpwm disabledi2c@7000c000(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A&+L Sdiv-clk_ fi2crxtx disabledi2c@7000c400(nvidia,tegra210-i2cnvidia,tegra114-i2c=p AT+L6Sdiv-clk_6fi2crxtx disabledi2c@7000c500(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A\+LCSdiv-clk_Cfi2crxtx disabledi2c@7000c700(nvidia,tegra210-i2cnvidia,tegra114-i2c=p Ax+LgSdiv-clk_gfi2crxtx   defaultidle disabledi2c@7000d000(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A5+L/Sdiv-clk_/fi2crxtxokayi2c@7000d100(nvidia,tegra210-i2cnvidia,tegra114-i2c=p A?+LSdiv-clk_fi2crxtx defaultidle disabledspi@7000d400(nvidia,tegra210-spinvidia,tegra114-spi=p A;+L)Sspi_)fspirxtx disabledspi@7000d600(nvidia,tegra210-spinvidia,tegra114-spi=p AR+L,Sspi_,fspirxtx disabledspi@7000d800(nvidia,tegra210-spinvidia,tegra114-spi=p AS+L.Sspi_.fspirxtx disabledspi@7000da00(nvidia,tegra210-spinvidia,tegra114-spi=p A]+LDSspi_Dfspirxtx disabledrtc@7000e000'nvidia,tegra210-rtcnvidia,tegra20-rtc=p ALSrtcpmc@7000e400nvidia,tegra210-pmc=p L%Spclkclk32k_inpowergatesaudLk_/sor@L40R8@_40R8/xusbaL_/xusbbL!__/xusbcLY_Y/fuse@7000f800nvidia,tegra210-efuse=pLSfuse_'ffusememory-controller@70019000nvidia,tegra210-mc=pL Smc AMChda@70030000'nvidia,tegra210-hdanvidia,tegra30-hda=p AQL}oShdahda2hdmihda2codec_2x_}ofhdahda2hdmihda2codec_2x disabledusb@70090000nvidia,tegra210-xusb0=p p p PhcdfpciipfsA'(XLYj"xSxusb_hostxusb_host_srcxusb_falcon_srcxusb_ssxusb_ss_div2xusb_ss_srcxusb_hs_srcxusb_fs_srcpll_u_480mclk_mpll_e_Yfxusb_hostxusb_ssxusb_srcZ disabledpadctl@7009f000nvidia,tegra210-xusb-padctl=p _fpadctl disabledpadsusb2LStrk disabledlanesusb2-0 disabledmusb2-1 disabledmusb2-2 disabledmusb2-3 disabledmhsicLStrk disabledlaneshsic-0 disabledmhsic-1 disabledmpcieLSpll_fphy disabledlanespcie-0 disabledmpcie-1 disabledmpcie-2 disabledmpcie-3 disabledmpcie-4 disabledmpcie-5 disabledmpcie-6 disabledmsataLSpll_fphy disabledlanessata-0 disabledmportsusb2-0 disabledusb2-1 disabledusb2-2 disabledusb2-3 disabledhsic-0 disabledusb3-0 disabledusb3-1 disabledusb3-2 disabledusb3-3 disabledsdhci@700b0000,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhci disabledsdhci@700b0200,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  AL Ssdhci_ fsdhci disabledsdhci@700b0400,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALESsdhci_Efsdhci disabledsdhci@700b0600,nvidia,tegra210-sdhcinvidia,tegra124-sdhci=p  ALSsdhci_fsdhciokayxmipi@700e3000nvidia,tegra210-mipi=p0L8 Smipi-calyaconnect@702c0000nvidia,tegra210-aconnectLk Sapeapb2apey+rp,p, disableddma@702e2000nvidia,tegra210-adma=p.  A !"#$%&'()*+,-mLjSd_audio disabledagic@702f9000nvidia,tegra210-agic=p/ p/  AfLSclk disabledspi@70410000nvidia,tegra210-qspi=pA A +LSqspi_fqspirxtx disabledusb@7d0000002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@ AutmiLSusb_fusb disabledusb-phy@7d000000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@}@utmiLSregpll_uutmi-pads_fusbutmi-pads /CWn  disabledusb@7d0040002nvidia,tegra210-ehcinvidia,tegra30-ehciusb-ehci=}@@ AutmiL:Susb_:fusb disabledusb-phy@7d004000/nvidia,tegra210-usb-phynvidia,tegra30-usb-phy =}@@}@utmiL:Sregpll_uutmi-pads_:fusbutmi-pads /CWn  disabledcpus+cpu@0cpuarm,cortex-a57=cpu@1cpuarm,cortex-a57=cpu@2cpuarm,cortex-a57=cpu@3cpuarm,cortex-a57=timerarm,armv8-timer0A    thermal-sensor@700e2000nvidia,tegra210-soctherm =p ``Psoctherm-regcar-reg A0LdNStsensorsoctherm_N fsocthermthrottle-cfgsheavydUthermal-zonescpu%3tripscpu-shutdown-tripCdO criticalthrottle-tripCOhotcooling-mapsmap0Z _mem%3tripsmem-shutdown-tripCXO criticalcooling-mapsgpu%3tripsgpu-shutdown-tripCXO criticalthrottle-tripCOhotcooling-mapsmap0Z _pllx%3tripspllx-shutdown-tripCXO criticalcooling-mapsaliasesn/rtc@7000e000s/serial@70006000chosen{serial0:115200n8memorymemory=clocks simple-bus+clock@0 fixed-clock=7 compatibleinterrupt-parent#address-cells#size-cellsmodelreginterruptsclocksclock-namesresetsreset-namesrangespower-domainsstatusgroupsfunctionlinux,phandleiommusnvidia,headnvidia,mipi-calibratepinctrl-0pinctrl-1pinctrl-2pinctrl-names#interrupt-cellsinterrupt-controllerinterrupt-names#clock-cells#reset-cells#gpio-cellsgpio-controller#dma-cellsnvidia,pinsnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-hvnvidia,functionreg-shiftdmasdma-names#pwm-cellsclock-frequencynvidia,invert-interrupt#power-domain-cells#iommu-cellsreg-namesnvidia,xusb-padctl#phy-cellsbus-widthnon-removable#nvidia,mipi-calibrate-cellsphy_typenvidia,phynvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,xcvr-hsslewnvidia,has-utmi-pad-registersdevice_type#thermal-sensor-cellsnvidia,prioritynvidia,cpu-throt-percent#cooling-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicertc1serial0stdout-path