8d(i, ,Pine64+(2pine64,pine64-plusallwinner,sun50i-a64cpus cpu@02arm,cortex-a53arm,armv8=cpuIMpscicpu@12arm,cortex-a53arm,armv8=cpuIMpscicpu@22arm,cortex-a53arm,armv8=cpuIMpscicpu@32arm,cortex-a53arm,armv8=cpuIMpsciosc24M_clk[ 2fixed-clockhn6xosc24Mosc32k_clk[ 2fixed-clockhxosc32kinternal-osc-clk[ 2fixed-clockh$xiosc  psci 2arm,psci-0.2Tsmctimer2arm,armv8-timer0   soc 2simple-bus mmc@1c0f0002allwinner,sun50i-a64-mmcIKahbmmcahb <рokay default ".9mmc@1c100002allwinner,sun50i-a64-mmcI Lahbmmc ahb =р disabled mmc@1c110002allwinner,sun50i-a64-emmcI!Mahbmmc ahb >  disabled usb@01c190002allwinner,sun8i-a33-musbI) GCmcSXusbbokayihostphy@01c194002allwinner,sun50i-a64-usb-phyIqphy_ctrlpmu0pmu1VWusb0_phyusb1_phyusb0_resetusb1_resetokay{usb@01c1b000'2allwinner,sun50i-a64-ehcigeneric-ehciI J-+]SXusbokayusb@01c1b400'2allwinner,sun50i-a64-ohcigeneric-ohciI K-]SXusbokayclock@01c200002allwinner,sun50i-a64-ccuI hosclosc[pinctrl@1c208002allwinner,sun50i-a64-pinctrlI$ :i2c1_pinsPH2PH3i2c1  mmc0-pinsPF0PF1PF2PF3PF4PF5mmc0mmc1-pinsPG0PG1PG2PG3PG4PG5mmc1mmc2-pins7PC1PC5PC6PC8PC9PC10PC11PC12PC13PC14PC15PC16mmc2uart0@0PB8PB9uart0  uart1_pinsPG6PG7uart1uart1_rts_cts_pinsPG8PG9uart1serial@1c280002snps,dw-apb-uartI€  C.okaydefault serial@1c284002snps,dw-apb-uartI„  D/ disabledserial@1c288002snps,dw-apb-uartIˆ  E0 disabledserial@1c28c002snps,dw-apb-uartIŒ  F1 disabledserial@1c290002snps,dw-apb-uartI  G2 disabledi2c@1c2ac002allwinner,sun6i-a31-i2cI¬ ?* disabled i2c@1c2b0002allwinner,sun6i-a31-i2cI° @+okay default i2c@1c2b4002allwinner,sun6i-a31-i2cI´ A, disabled interrupt-controller@1c81000 2arm,gic-400 I @ `   rtc@1f000002allwinner,sun6i-a31-rtcIT()clock@1f014002allwinner,sun50i-a64-r-ccuI  hoscloscioscpll-periph[  pinctrl@01f02c002allwinner,sun50i-a64-r-pinctrlI, - apbhoscloscaliases/soc/serial@1c28000chosenserial0:115200n8vcc3v32regulator-fixed*vcc3v392ZQ2Z interrupt-parent#address-cells#size-cellsmodelcompatibledevice_typeregenable-method#clock-cellsclock-frequencyclock-output-nameslinux,phandleclock-accuracyinterruptsrangesclocksclock-namesresetsreset-namesmax-frequencystatuspinctrl-namespinctrl-0vmmc-supplycd-gpioscd-inverteddisable-wpbus-widthinterrupt-namesphysphy-namesextcondr_modereg-names#phy-cells#reset-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellspinsfunctionbias-pull-updrive-strengthreg-shiftreg-io-widthserial0stdout-pathregulator-nameregulator-min-microvoltregulator-max-microvolt