8(^)Qualcomm Technologies, Inc. MSM 8916 MTP:qcom,msm8916-mtpqcom,msm8916-mtp/1qcom,msm8916qcom,mtp"1aliases=/soc/sdhci@07824000C/soc/sdhci@07864000I/soc/serial@78b0000Q/soc/spmi@200f000/pm8916@0chosenWserial0memorycmemoryoreserved-memory"1stz-apps@86000000o0zsmem_region@86300000o0zhypervisor@86400000o@ztz@86500000oPzreserved@8668000ohzrmtfs@86700000opzrfsa@867e00000o~zmpss@86800000oz33wcnss@89300000o0`z55mba@8ea00000zo22cpus"1cpu@0ccpuarm,cortex-a53arm,armv8opsciLLcpu@1ccpuarm,cortex-a53arm,armv8opsciNNcpu@2ccpuarm,cortex-a53arm,armv8opsciPPcpu@3ccpuarm,cortex-a53arm,armv8opsciRRl2-cachecacheidle-statesspcarm,idle-state@psci arm,psci-1.0smcpmuarm,cortex-a53-pmu $thermal-zonescpu-thermal0/EStripstrip0c$ojpassivetrip1co jcriticalcpu-thermal1/EStripstrip0c$ojpassivetrip1co jcriticaltimerarm,armv8-timer0$clocksxo_board fixed-clockz$sleep_clk fixed-clockzsmem qcom,smemfirmwarescm qcom,scmhgfcorebusiface--soc"1s simple-busrestart@4ab000 qcom,psholdoJpinctrl@1000000qcom,msm8916-pinctrlo0 $blsp1_uart1_defaultpinmux  blsp_uart1)gpio0gpio1gpio2gpio3pinconf)gpio0gpio1gpio2gpio3.=blsp1_uart1_sleeppinmux gpio)gpio0gpio1gpio2gpio3pinconf)gpio0gpio1gpio2gpio3.Jblsp1_uart2_default  pinmux  blsp_uart2 )gpio4gpio5pinconf )gpio4gpio5.=blsp1_uart2_sleep  pinmux gpio )gpio4gpio5pinconf )gpio4gpio5.Jspi1_default  pinmux  blsp_spi1)gpio0gpio1gpio3pinmux_cs gpio)gpio2pinconf)gpio0gpio1gpio3. =pinconf_cs)gpio2.=Yspi1_sleeppinmux gpio)gpio0gpio1gpio2gpio3pinconf)gpio0gpio1gpio2gpio3.Jspi2_defaultpinmux  blsp_spi2)gpio4gpio5gpio7pinmux_cs gpio)gpio6pinconf)gpio4gpio5gpio7. =pinconf_cs)gpio6.=Yspi2_sleeppinmux gpio)gpio4gpio5gpio6gpio7pinconf)gpio4gpio5gpio6gpio7.Jspi3_defaultpinmux  blsp_spi3)gpio8gpio9gpio11pinmux_cs gpio)gpio10pinconf)gpio8gpio9gpio11. =pinconf_cs)gpio10.=Yspi3_sleeppinmux gpio)gpio8gpio9gpio10gpio11pinconf)gpio8gpio9gpio10gpio11.Jspi4_defaultpinmux  blsp_spi4)gpio12gpio13gpio15pinmux_cs gpio)gpio14pinconf)gpio12gpio13gpio15. =pinconf_cs)gpio14.=Yspi4_sleeppinmux gpio)gpio12gpio13gpio14gpio15pinconf)gpio12gpio13gpio14gpio15.Jspi5_defaultpinmux  blsp_spi5)gpio16gpio17gpio19pinmux_cs gpio)gpio18pinconf)gpio16gpio17gpio19. =pinconf_cs)gpio18.=Yspi5_sleeppinmux gpio)gpio16gpio17gpio18gpio19pinconf)gpio16gpio17gpio18gpio19.Jspi6_defaultpinmux  blsp_spi6)gpio20gpio21gpio23pinmux_cs gpio)gpio22pinconf)gpio20gpio21gpio23. =pinconf_cs)gpio22.=Yspi6_sleeppinmux gpio)gpio20gpio21gpio22gpio23pinconf)gpio20gpio21gpio22gpio23.Ji2c2_defaultpinmux  blsp_i2c2 )gpio6gpio7pinconf )gpio6gpio7.=i2c2_sleeppinmux gpio )gpio6gpio7pinconf )gpio6gpio7.=i2c4_defaultpinmux  blsp_i2c4)gpio14gpio15pinconf)gpio14gpio15.=i2c4_sleeppinmux gpio)gpio14gpio15pinconf)gpio14gpio15.=i2c6_defaultpinmux  blsp_i2c6)gpio22gpio23pinconf)gpio22gpio23.=i2c6_sleeppinmux gpio)gpio22gpio23pinconf)gpio22gpio23.=sdhc2_cd_pincd_onpinmux gpio)gpio38pinconf)gpio38.ecd_offpinmux gpio)gpio38pinconf)gpio38.=pmx_sdc1_clkclk_onpinmux )sdc1_clkpinconf )sdc1_clk=.clk_offpinmux )sdc1_clkpinconf )sdc1_clk=.pmx_sdc1_cmdcmd_onpinmux )sdc1_cmdpinconf )sdc1_cmde. cmd_offpinmux )sdc1_cmdpinconf )sdc1_cmde.pmx_sdc1_datadata_onpinmux )sdc1_datapinconf )sdc1_datae. data_offpinmux )sdc1_datapinconf )sdc1_datae.pmx_sdc2_clkclk_onpinmux )sdc2_clkpinconf )sdc2_clk=.clk_offpinmux )sdc2_clkpinconf )sdc2_clk=.pmx_sdc2_cmdcmd_onpinmux )sdc2_cmdpinconf )sdc2_cmde. cmd_offpinmux )sdc2_cmdpinconf )sdc2_cmde.pmx_sdc2_datadata_onpinmux )sdc2_datapinconf )sdc2_datae. data_offpinmux )sdc2_datapinconf )sdc2_datae.ext-codec-lineslines_onpinmux gpio)gpio67pinconf)gpio67.=Ylines_offpinmux gpio)gpio67pinconf)gpio67.=cdc-pdm-linespdm_lines_onpinmux  cdc_pdm0*)gpio63gpio64gpio65gpio66gpio67gpio68pinconf*)gpio63gpio64gpio65gpio66gpio67gpio68.rpdm_lines_offpinmux  cdc_pdm0*)gpio63gpio64gpio65gpio66gpio67gpio68pinconf*)gpio63gpio64gpio65gpio66gpio67gpio68.=ext-pri-tlmm-linesext_pa_onpinmux  pri_mi2s )gpio113gpio114gpio115gpio116pinconf )gpio113gpio114gpio115gpio116.rext_pa_offpinmux  pri_mi2s )gpio113gpio114gpio115gpio116pinconf )gpio113gpio114gpio115gpio116.=ext-pri-ws-lineext_pa_onpinmux  pri_mi2s_ws)gpio110pinconf)gpio110.rext_pa_offpinmux  pri_mi2s_ws)gpio110pinconf)gpio110.=ext-mclk-tlmm-linesmclk_lines_onpinmux  pri_mi2s)gpio116pinconf)gpio116.rmclk_lines_offpinmux  pri_mi2s)gpio116pinconf)gpio116.=ext-sec-tlmm-linestlmm_lines_onpinmux  sec_mi2s )gpio112gpio117gpio118gpio119pinconf )gpio112gpio117gpio118gpio119.rtlmm_lines_offpinmux  sec_mi2s )gpio112gpio117gpio118gpio119pinconf )gpio112gpio117gpio118gpio119.=cdc-dmic-linesdmic_lines_onpinmux_dmic0_clk  dmic0_clk)gpio0pinmux_dmic0_data  dmic0_data)gpio1pinconf )gpio0gpio1.dmic_lines_offpinconf )gpio0gpio1.=cross-conn-detlines_onpinmux gpio)gpio120pinconf)gpio120.Jlines_offpinmux gpio)gpio120pinconf)gpio120.=wcnss-active88pinmux#)gpio40gpio41gpio42gpio43gpio44  wcss_wlanpinconf#)gpio40gpio41gpio42gpio43gpio44.eclock-controller@1800000qcom,gcc-msm8916zosyscon@1905000sysconoP  syscon@1937000qcom,tcsr-msm8916sysconop11hwlockqcom,tcsr-mutex  memory@60000qcom,rpm-msg-ramoserial@78af000%qcom,msm-uartdm-v1.4qcom,msm-uartdmo $kD6 coreiface  rxtx disabledsyscon@b011000syscono 44serial@78b0000%qcom,msm-uartdm-v1.4qcom,msm-uartdmo $lE6 coreiface  rxtxokaydefaultsleep  dma@7884000qcom,bam-v1.7.0o@0 $6bam_clk disabled  spi@78b5000qcom,spi-qup-v2.2.1oP $_96 coreiface  rxtxdefaultsleep "1 disabledspi@78b6000qcom,spi-qup-v2.2.1o` $`;6 coreiface  rxtxdefaultsleep"1 disabledspi@78b7000qcom,spi-qup-v2.2.1op $a=6 coreiface rxtxdefaultsleep"1 disabledspi@78b8000qcom,spi-qup-v2.2.1o $b?6 coreiface rxtxdefaultsleep"1 disabledspi@78b9000qcom,spi-qup-v2.2.1o $cA6 coreiface rxtxdefaultsleep"1 disabledspi@78ba000qcom,spi-qup-v2.2.1o $dC6 coreiface  rxtxdefaultsleep"1 disabledi2c@78b6000qcom,i2c-qup-v2.2.1o` $`6: ifacecoredefaultsleep"1 disabledi2c@78b8000qcom,i2c-qup-v2.2.1o $b6> ifacecoredefaultsleep"1 disabledi2c@78ba000qcom,i2c-qup-v2.2.1o $d6B ifacecoredefaultsleep"1 disabledlpass@07708000 disabledqcom,lpass-cpu-apq80168aahbix-clkpcnoc-mport-clkpcnoc-sway-clkmi2s-bit-clk0mi2s-bit-clk1mi2s-bit-clk2mi2s-bit-clk3 $lpass-irq-lpaifop !lpass-lpaifcodecqcom,msm8916-wcd-digital-codecoqahbix-clkmclksdhci@07824000qcom,sdhci-msm-v4oI@!hc_memcore_mem${hc_irqpwr_irq{zcoreifacexo+8B disabledsdhci@07864000qcom,sdhci-msm-v4oI@!hc_memcore_mem$}hc_irqpwr_irq}|coreifacexo8 disabledusb@78d9000 qcom,ci-hdrco Pperipheral $X  disabledehci@78d9000qcom,ehci-hosto $X  disabledphy@78d9000qcom,usb-otg-snpso$ ` B@$@pDk$ Pperipheralifacecoresleep#" phylink disabled  interrupt-controller@b000000qcom,msm-qgic2o  timer@b020000"1sarm,armv7-timer-memo $frame@b021000$o   frame@b023000 $ o 0 disabledframe@b024000 $ o @ disabledframe@b025000 $ o P disabledframe@b026000 $ o ` disabledframe@b027000 $ o p disabledframe@b028000 $o  disabledspmi@200f000qcom,spmi-pmic-arb(o@@@ !!corechnlsobsrvrintrcnfg periph_irq $"1""pm8916@0qcom,pm8916qcom,spmi-pmico"1rtc@6000qcom,pm8941-rtco` !rtcalarm$apwrkey@800qcom,pm8941-pwrkeyo$= egpios@c000qcom,pm8916-gpioo@$mpps@a000qcom,pm8916-mppo@$temp-alarm@2400qcom,spmi-temp-alarmo$$$!thermalvadc@3100qcom,spmi-vadco1$1"1!!usb_ino& vph_pwro&die_temporef_625mvo ref_1250vo ref_gndoref_vddopm8916@1qcom,pm8916qcom,spmi-pmico"1codec@f000qcom,pm8916-wcd-analog-codeco!pmic-codec-coremclk"$cdc_spk_cnp_intcdc_spk_clip_intcdc_spk_ocp_intmbhc_ins_rem_det1mbhc_but_rel_detmbhc_but_press_detmbhc_ins_rem_detmbhc_switch_intcdc_ear_ocp_intcdc_hphr_ocp_intcdc_hphl_ocp_detcdc_ear_cnp_intcdc_hphr_cnp_intcdc_hphl_cnp_int7#I#a$rng@22000 qcom,prngo ycoreqfprom@5c000 qcom,qfpromo"1caldata@d0o%%calsel@eco&&thermal-sensor@4a8000qcom,msm8916-tsensoJ t%&calibcalib_selmdss@1a00000 qcom,mdsso0!mdss_physvbif_physmnsiface_clkbus_clkvsync_clk $H"1s''mdp@1a01000 qcom,mdp5o  !mdp_phys'$ mnqs%iface_clkbus_clkcore_clkvsync_clkports"1port@0oendpoint(**dsi@1a98000qcom,mdss-dsi-ctrlo\ !dsi_ctrl'$+.))0qmnorp;mdp_core_clkiface_clkbus_clkbyte_clkpixel_clkcore_clk)dsi-phyports"1port@0oendpoint*((port@1oendpointdsi-phy@1a98300qcom,dsi-phy-28nm-lpo0"!dsi_plldsi_phydsi_phy_regulatorzm iface_clk))hexagon@4080000qcom,q6v5-pilo@ !qdsp6rmb@++++#wdogfatalreadyhandoverstop-acktFifacebusmemxo, stop- mss_restartW. /*051 disabledmba2mpss3smd-edge $D R4 [khexagonwcnss@a21b000qcom,pronto-v2-pilqcom,prontoo @  !0 !ccudxepmu5@6666#wdogfatalreadyhandoverstop-ackq/~07stopdefault8 disabled<<iris qcom,wcn36209xo0:;#smd-edge $ R4D[kprontowcnss qcom,wcnss WCNSS_CTRL<btqcom,wcnss-btwifiqcom,wcnss-wlan$txrx= =  tx-enabletx-rings-emptytpiu@820000!arm,coresight-tpiuarm,primecello99 apb_pclkatclkportendpoint>BBfunnel@821000#arm,coresight-funnelarm,primecello99 apb_pclkatclkports"1port@4oendpoint?KKport@8oendpoint@DDreplicator@824000*qcom,coresight-replicator1xarm,primecello@99 apb_pclkatclkports"1port@0oendpointAFFport@1oendpointB>>port@2oendpointCEEetf@825000 arm,coresight-tmcarm,primecelloP99 apb_pclkatclkports"1port@0oendpointDCCport@1oendpointE@@etr@826000 arm,coresight-tmcarm,primecello`99 apb_pclkatclkportendpointFAAfunnel@841000#arm,coresight-funnelarm,primecello99 apb_pclkatclkports"1port@0oendpointGMMport@1oendpointHOOport@2oendpointIQQport@3oendpointJSSport@4oendpointK??etm@85c000"arm,coresight-etm4xarm,primecello99 apb_pclkatclkLportendpointMGGetm@85d000"arm,coresight-etm4xarm,primecello99 apb_pclkatclkNportendpointOHHetm@85e000"arm,coresight-etm4xarm,primecello99 apb_pclkatclkPportendpointQIIetm@85f000"arm,coresight-etm4xarm,primecello99 apb_pclkatclkRportendpointSJJsmd qcom,smdrpm $ R4Drpm_requestsqcom,rpm-msm8916 rpm_requestsqcom,rpmccqcom,rpmcc-msm8916z99pm8916-regulatorsqcom,rpm-pm8916-regulatorss1..s3::s4l1l2l3//l4l5##l6l700l8l9;;l10l11l12l13$$l14l15l16l17l18hexagon-smp2p qcom,smp2p $ R4[master-kernel!master-kernel1,,slave-kernel !slave-kernel++wcnss-smp2p qcom,smp2p $ R4[master-kernel!master-kernel177slave-kernel !slave-kernel66smsm qcom,smsm"1 H4  S4apps@0o1==hexagon@1o $wcnss@6o $ modelcompatibleinterrupt-parent#address-cells#size-cellssdhc1sdhc2serial0usid0stdout-pathdevice_typeregrangesno-maplinux,phandlenext-level-cacheenable-methodcpu-idle-statescache-levelarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresis#clock-cellsclock-frequencymemory-regionqcom,rpm-msg-ramhwlocksclocksclock-names#reset-cellsgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsfunctionpinsdrive-strengthbias-disablebias-pull-downoutput-highbias-pull-upbias-pull-noneoutput-low#power-domain-cellssyscon#hwlock-cellsdmasdma-namesstatuspinctrl-namespinctrl-0pinctrl-1#dma-cellsqcom,ee#sound-dai-cellsinterrupt-namesreg-namesmmc-ddr-1_8vbus-widthnon-removabledr_modeusb-phyqcom,vdd-levelsqcom,phy-init-sequenceqcom,otg-controlqcom,manual-pullupresetsreset-namesframe-numberqcom,channeldebounceio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalingvdd-cdc-io-supplyvdd-cdc-tx-rx-cx-supplyvdd-micbias-supplynvmem-cellsnvmem-cell-namespower-domainsremote-endpointassigned-clocksassigned-clock-parentsphysphy-namesinterrupts-extendedqcom,smem-statesqcom,smem-state-namesmx-supplypll-supplyqcom,halt-regsqcom,smd-edgeqcom,ipcqcom,remote-pidlabelvddmx-supplyvddpx-supplyqcom,stateqcom,state-namesvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioslave-modecpuqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsqcom,ipc-1qcom,ipc-6