8(%Marvell Reference Design 88F5182 NAS?!marvell,rd-88f5182-nasmarvell,orion5x-88f5182marvell,orion5x,chosen#=console=ttyS0,115200n8 earlyprintk F/soc/internal-regs/serial@12000aliasesX/soc/internal-regs/gpio@10100memory^memoryjsocn(!marvell,orion5x-88f5182-mbussimple-bus@y devbus-bootcs!marvell,orion-devbus jlyokay_֐֐___flash@0 !cfi-flashj!devbus-cs0!marvell,orion-devbus j\y disableddevbus-cs1!marvell,orion-devbus j`yokay_֐֐___flash@0 !cfi-flashj!devbus-cs2!marvell,orion-devbus jdy disabledinternal-regs !simple-busygpio@10100!marvell,orion-gpio,8j@H Odu spi@10600!marvell,orion-spij( disabledi2c@11000!marvell,mv64xxx-i2cj uokayrtc@68default!dallas,ds1338jhserial@12000 !ns16550aj uokayserial@12100 !ns16550aj!u disabledbridge-interrupt-ctrl@20110!marvell,orion-bridge-intcOdjuinterrupt-controller@20200!marvell,orion-intcOdjtimer@20300!marvell,orion-timerj ,uwdt@20300!marvell,orion-wdtj(,uokayehci@50000!marvell,orion-ehcijuokaydma-controller@60900!marvell,orion-xorj  okayxor00uxor01uethernet-controller@72000!marvell,orion-ethj @@okayethernet-port@0!marvell,orion-eth-portju 2mdio-bus@72004!marvell,orion-mdioj uokayethernet-phyjsata@80000!marvell,orion-satajPuokaydefault=crypto@90000!marvell,orion-cryptoj FregsuP eokayehci@a0000!marvell,orion-ehcij u okaypinctrl@10000!marvell,88f5182-pinctrljP  defaultpmx-sata0 ~mpp12mpp14sata0pmx-sata1 ~mpp13mpp15sata1pmx-debug_led~mpp0gpio  pmx-reset-switch~mpp1gpio  pmx-rtc~mpp3gpiopmx-misc-gpios ~mpp4mpp5gpio  pmx-pci-gpios ~mpp6mpp7gpio  core-clocks@10030!marvell,mv88f5182-core-clockjmbus-controller@20000!marvell,mbus-controllerj sa-sram !mmio-sram j   gpio-leds !gpio-leds defaultled@0rd88f5182:cpu heartbeat I #address-cells#size-cellsmodelcompatibleinterrupt-parentbootargslinux,stdout-pathgpio0device_typeregcontrollerrangesclocksstatusdevbus,bus-widthdevbus,turn-off-psdevbus,badr-skew-psdevbus,acc-first-psdevbus,acc-next-psdevbus,wr-high-psdevbus,wr-low-psdevbus,ale-wr-psbank-width#gpio-cellsgpio-controllerngpiosinterrupt-controller#interrupt-cellsinterruptslinux,phandlecell-indexclock-frequencypinctrl-0pinctrl-namesreg-shiftmarvell,#interruptsdmacap,memcpydmacap,xordmacap,memsetmarvell,tx-checksum-limitlocal-mac-addressphy-handlenr-portsreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizemarvell,pinsmarvell,function#clock-cellslabellinux,default-trigger