z 8t0(s&Freescale i.MX6 Quad Armadillo2 Board!fsl,imx6q-arm2fsl,imx6qchosenaliases),/soc/aips-bus@02100000/ethernet@02188000(6/soc/aips-bus@02000000/flexcan@02090000(;/soc/aips-bus@02000000/flexcan@02094000%@/soc/aips-bus@02000000/gpio@0209c000%F/soc/aips-bus@02000000/gpio@020a0000%L/soc/aips-bus@02000000/gpio@020a4000%R/soc/aips-bus@02000000/gpio@020a8000%X/soc/aips-bus@02000000/gpio@020ac000%^/soc/aips-bus@02000000/gpio@020b0000%d/soc/aips-bus@02000000/gpio@020b4000$j/soc/aips-bus@02100000/i2c@021a0000$o/soc/aips-bus@02100000/i2c@021a4000$t/soc/aips-bus@02100000/i2c@021a8000&y/soc/aips-bus@02100000/usdhc@02190000&~/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02018000memorymemoryinterrupt-controller@00a01000!arm,cortex-a9-gic%+clocksckil!fsl,imx-ckilfixed-clock3@ckih1!fsl,imx-ckih1fixed-clock3@osc!fsl,imx-oscfixed-clock3@n6soc !simple-busPdma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0W    bgpmi0gpmi1gpmi2gpmi3r}j%+gpmi-nand@00112000!fsl,imx6q-gpmi-nand @ gpmi-nandbch Wbbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx disableddefaulthdmi@0120000 Ws{| iahbisfr disabled!fsl,imx6q-hdmiport@0endpoint%-+-port@1endpoint%1+1port@2endpoint %5+5port@3endpoint %8+8timer@00a00600!arm,cortex-a9-twd-timer  W l2-cache@00a02000!arm,pl310-cache  W\  %;+;pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ dbiconfigpciHP$ Wxbmsi.A{zyxpciepcie_buspcie_phy disabledpmu!arm,cortex-a9-pmu W^aips-bus@02000000!fsl,aips-bussimple-busPspba-bus@02000000!fsl,spba-bussimple-busPspdif@02004000!fsl,imx35-spdif@@ W4   rxtxH5corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7 disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ Wppipgper   rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W qqipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W!rripgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ W"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledesai@02024000O!fsl,imx35-esai@@ W3(vcorememextalfsysdma   rxtx disabledssi@02028000O!fsl,imx6q-ssifsl,imx51-ssi@ W. ipgbaud  % &rxtx` disabledssi@0202c000O!fsl,imx6q-ssifsl,imx51-ssi@ W/ ipgbaud  ) *rxtx` disabledssi@02030000O!fsl,imx6q-ssifsl,imx51-ssi@ W0 ipgbaud  - .rxtx` disabledasrc@02034000!fsl,imx53-asrc@@ W2kmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fdma`      rxarxbrxctxatxbtxco}okayspba@0203c000@ecspi@02018000 !fsl,imx6q-ecspifsl,imx51-ecspi@ W#ttipgper   rxtx disabledvpu@02040000!fsl,imx6q-vpucnm,coda960W  bbitjpegperahb  aipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ WS>ipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ WT>ipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ WU>ipgper disabledpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ WV>ipgper disabledflexcan@02090000!fsl,imx6q-flexcan @ Wnlmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ Wonoipgper disabledgpt@02098000!fsl,imx6q-gptfsl,imx31-gpt @ W7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @WBC% + gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @WDEgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@WFG%B+Bgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @WHIgpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @WJKgpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @WLM%"+"gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@WNOkpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ WR> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ WPwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ WQ disabledccm@020c4000!fsl,imx6q-ccm @@WWX3%+anatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $W16%+regulator-1p1@110!fsl,anatop-regulatorvdd1p1 5  2G\o 5regulator-3p0@120!fsl,anatop-regulatorvdd3p0*0   2G\o( 3@regulator-2p5@130!fsl,anatop-regulatorvdd2p5)0  02G\o)0regulator-vddcore@140!fsl,anatop-regulatorvddarm    @2Gp\o  %<+<regulator-vddpu@140!fsl,anatop-regulatorvddpu   @2 Gp\o  %+regulator-vddsoc@140!fsl,anatop-regulatorvddsoc    @2Gp\o  %=+=tempmon!fsl,imx6q-tempmon W1usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W,%+usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  W-%+snvs@020cc000#!fsl,sec-v4.0-monsysconsimple-mfd @%+snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp+4Wsnvs-poweroff!syscon-poweroff+8<` disabledepit@020d0000 @ W8epit@020d4000 @@ W9src@020d8000!fsl,imx6q-srcfsl,imx51-src @W[`&% + gpc@020dc000!fsl,imx6q-gpc @WYZ30zJy=%+iomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8%+iomuxc@020e0000!fsl,imx6q-iomuxc@defaultipu2ipu2grp-1Q\p`tdxh|lptx|imx6q-arm2hoggrpQ%+enetgrpQ@Xl\p`tdxh|tDpHxL|PTlX0< %!+!gpminandgrpQ %+uart2grp`Q ( $%+++uart4grp0Q 8%,+,usbotggrpQ$ pY%+usdhc3grpQpYYpYpYpYpYpYpYpYpY%$+$usdhc3cdwp0Q%%+%usdhc4grpQpYYpY pY$ pY(pY,pY0pY4pY8 pY%&+&ldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb disabled@!"'()*8di0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0 disabledport@0endpoint%/+/port@1endpoint%3+3port@2endpoint%6+6port@3endpoint%9+9lvds-channel@1 disabledport@0endpoint%0+0port@1endpoint%4+4port@2endpoint%7+7port@3endpoint%:+:dcic@020e4000@@ W|dcic@020e8000@ W}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ WipgahbrZimx/sdma/sdma-imx6q.bin% + aips-bus@02100000!fsl,aips-bussimple-busPcaam@2100000 !fsl,sec-v4.0s P memaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ring Wijr1@2000!fsl,sec-v4.0-job-ring  Wjaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ W+okaydefaultusb@02184200!fsl,imx6q-usbfsl,imx27-usbB W(host disabledusb@02184400!fsl,imx6q-usbfsl,imx27-usbD W)host disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF W*host disabledusbmisc@02184800!fsl,imx6q-usbmiscH%+ethernet@02188000!fsl,imx6q-fec@ wuu ipgahbptpokaydefault!rgmiimlb@0218c000@$W5u~usdhc@02190000!fsl,imx6q-usdhc@ W ipgahbper disabledusdhc@02194000!fsl,imx6q-usdhc@@ W ipgahbper disabledusdhc@02198000!fsl,imx6q-usdhc@ W ipgahbperokay "  "#default$%usdhc@0219c000!fsl,imx6q-usdhc@ W ipgahbperokay#default&i2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ W$} disabledi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ W%~ disabledi2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ W& disabledromcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ Wocotp@021bc000!fsl,imx6q-ocotpsyscon@%+tzasc@021d0000@ Wltzasc@021d4000@@ Wmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@ disabledmipi@021dc000@mipi@021e0000@ disabledportsport@0endpoint'%.+.port@1endpoint(%2+2port@2endpoint)port@3endpoint*vdoa@021e4000@@ Wserial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtxokaydefault+,serial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ Wipgper   rxtxokaydefault,serial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ Wipgper  ! "rxtx disabledipu@02400000!fsl,imx6q-ipu@@W busdi0di1 port@0port@1port@2%>+>endpoint@0endpoint@1-%+endpoint@2.%'+'endpoint@3/%+endpoint@40%+port@3%?+?endpoint@0endpoint@11%+endpoint@22%(+(endpoint@33%+endpoint@44%+sram@00900000 !mmio-sram% + sata@02200000!fsl,imx6q-ahci @ W'isatasata_refahb disabledipu@02800000!fsl,imx6q-ipu@W busdi0di1 port@0port@1port@2%@+@endpoint@0endpoint@15% + endpoint@2%)+)endpoint@36%+endpoint@47%+port@3%A+Aendpoint@18% + endpoint@2%*+*endpoint@39%+endpoint@4:%+cpuscpu@0!arm,cortex-a9cpu@;(QOtx2   (bOtx2   {l(h)armpll2_pfd2_396msteppll1_swpll1_sys<3=cpu@1!arm,cortex-a9cpu@;cpu@2!arm,cortex-a9cpu@;cpu@3!arm,cortex-a9cpu@;display-subsystem!fsl,imx-display-subsystem>?@Aregulators !simple-busregulator@0!regulator-fixed3P3V2Z2Z %#+#regulator@1!regulator-fixed usb_otg_vbusLK@LK@ B%+leds !gpio-ledsdebug-led Heartbeat B heartbeat #address-cells#size-cellsmodelcompatibleethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1spi4device_typereg#interrupt-cellsinterrupt-controllerinterrupt-parentlinux,phandle#clock-cellsclock-frequencyrangesinterruptsinterrupt-names#dma-cellsdma-channelsclocksreg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprremote-endpointcache-unifiedcache-levelarm,tag-latencyarm,data-latencynum-lanesinterrupt-map-maskinterrupt-map#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthpower-domainsresetsiram#pwm-cellsgpio-controller#gpio-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatopregmap#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modebus-widthcd-gpioswp-gpiosvmmc-supplynon-removablefsl,dte-modefsl,uart-has-rtsctsnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportsgpioenable-active-highlabellinux,default-trigger