Ð þí@ÁH<„(=<<+Altera SOCFPGA Arria V SoC Development Kit!!altr,socfpga-arria5altr,socfpgachosen ,earlyprintk5serial0:115200n8aliasesA/soc/ethernet@ff702000K/soc/ethernet@ff702000U/soc/serial0@ffc02000]/soc/serial1@ffc03000e/soc/timer0@ffc08000l/soc/timer1@ffc09000s/soc/timer2@ffd00000z/soc/timer3@ffd01000memorymemory@cpus‘altr,socfpga-smpcpu@0!arm,cortex-a9cpuŸcpu@1!arm,cortex-a9cpuŸintc@fffed000!arm,cortex-a9-gic°ÁÿþÐÿþÁÖÜsoc !simple-bussocäõamba !arm,amba-busõpdma@ffe01000!arm,pl330arm,primecellÿà`ühijklmno . 5apb_pclkÖ)Ü)can@ffc00000 !bosch,d_canÿÀ0üƒ„…†. Adisabledcan@ffc01000 !bosch,d_canÿÀ0ü‡ˆ‰Š. Adisabledclkmgr@ffd04000 !altr,clk-mgrÿÐ@clocksosc1H !fixed-clockU}x@ÖÜosc2H !fixed-clockÖÜf2s_periph_ref_clkH !fixed-clockÖ Ü f2s_sdram_ref_clkH !fixed-clockÖ Ü main_pllH!altr,socfpga-pll-clock.@ÖÜmpuclkH!altr,socfpga-perip-clk. eà HÖ Ü mainclkH!altr,socfpga-perip-clk. eä LÖÜdbg_base_clkH!altr,socfpga-perip-clk. eè PÖÜmain_qspi_clkH!altr,socfpga-perip-clk.TÖÜmain_nand_sdmmc_clkH!altr,socfpga-perip-clk.XÖÜcfg_h2f_usr0_clkH!altr,socfpga-perip-clk.\ÖÜperiph_pllH!altr,socfpga-pll-clock . €Ö Ü emac0_clkH!altr,socfpga-perip-clk. ˆÖÜemac1_clkH!altr,socfpga-perip-clk. ŒÖÜper_qsi_clkH!altr,socfpga-perip-clk. ÖÜper_nand_mmc_clkH!altr,socfpga-perip-clk. ”ÖÜper_base_clkH!altr,socfpga-perip-clk. ˜ÖÜh2f_usr1_clkH!altr,socfpga-perip-clk. œÖÜsdram_pllH!altr,socfpga-pll-clock . ÀÖ Ü ddr_dqs_clkH!altr,socfpga-perip-clk. ÈÖÜddr_2x_dqs_clkH!altr,socfpga-perip-clk. ÌÖÜddr_dq_clkH!altr,socfpga-perip-clk. ÐÖÜh2f_usr2_clkH!altr,socfpga-perip-clk. ÔÖÜmpu_periph_clkH!altr,socfpga-perip-clk. mÖ(Ü(mpu_l2_ram_clkH!altr,socfpga-perip-clk. ml4_main_clkH!altr,socfpga-gate-clk.{`ÖÜl3_main_clkH!altr,socfpga-perip-clk.ml3_mp_clkH!altr,socfpga-gate-clk. ed{`ÖÜl3_sp_clkH!altr,socfpga-gate-clk. edl4_mp_clkH!altr,socfpga-gate-clk. ed{`Ö#Ü#l4_sp_clkH!altr,socfpga-gate-clk. ed{`Ö"Ü"dbg_at_clkH!altr,socfpga-gate-clk. eh{`ÖÜdbg_clkH!altr,socfpga-gate-clk. eh{`dbg_trace_clkH!altr,socfpga-gate-clk. el{`dbg_timer_clkH!altr,socfpga-gate-clk.{`cfg_clkH!altr,socfpga-gate-clk.{`h2f_user0_clkH!altr,socfpga-gate-clk.{` emac_0_clkH!altr,socfpga-gate-clk.{ emac_1_clkH!altr,socfpga-gate-clk.{ usb_mp_clkH!altr,socfpga-gate-clk.{  e¤Ö*Ü*spi_m_clkH!altr,socfpga-gate-clk.{  e¤Ö'Ü'can0_clkH!altr,socfpga-gate-clk.{  e¤ÖÜcan1_clkH!altr,socfpga-gate-clk.{  e¤ ÖÜgpio_db_clkH!altr,socfpga-gate-clk.{  e¨h2f_user1_clkH!altr,socfpga-gate-clk.{ sdmmc_clkH!altr,socfpga-gate-clk . { „‡ÖÜsdmmc_clk_dividedH!altr,socfpga-gate-clk.{ mÖ%Ü%nand_x_clkH!altr,socfpga-gate-clk . {  nand_clkH!altr,socfpga-gate-clk . {  mqspi_clkH!altr,socfpga-gate-clk . {  ddr_dqs_clk_gateH!altr,socfpga-gate-clk.{Øddr_2x_dqs_clk_gateH!altr,socfpga-gate-clk.{Øddr_dq_clk_gateH!altr,socfpga-gate-clk.{Øh2f_user2_clkH!altr,socfpga-gate-clk.{Øethernet@ff7000000!altr,socfpga-stmmacsnps,dwmac-3.70asnps,dwmac Ž `ÿp  üs¡macirq±. 5stmmaceth½!  ÄstmmacethÐë€ Adisabledethernet@ff7020000!altr,socfpga-stmmacsnps,dwmac-3.70asnps,dwmac Ž `ÿp  üx¡macirq±. 5stmmaceth½!! ÄstmmacethÐë€Aokay#rgmii,9FS`m (y†Ði2c@ffc04000!snps,designware-i2cÿÀ@." üžAokayeeprom@51 !atmel,24c32Q’ rtc@68!dallas,ds1339hi2c@ffc05000!snps,designware-i2cÿÀP." üŸ Adisabledi2c@ffc06000!snps,designware-i2cÿÀ`." ü  Adisabledi2c@ffc07000!snps,designware-i2cÿÀp." ü¡ Adisabledgpio@ff708000!snps,dw-apb-gpioÿp€.# Adisabledgpio-controller@0!snps,dw-apb-gpio-port›«·Á° ü¤gpio@ff709000!snps,dw-apb-gpioÿp.# Adisabledgpio-controller@0!snps,dw-apb-gpio-port›«·Á° ü¥gpio@ff70a000!snps,dw-apb-gpioÿp .# Adisabledgpio-controller@0!snps,dw-apb-gpio-port›«·Á° ü¦sdr@ffc25000!sysconÿÂPÖ$Ü$sdramedac!altr,sdram-edacÅ$ ü'l2-cache@fffef000!arm,pl310-cacheÿþð ü&Õã ï ÿÖÜdwmmc0@ff704000!altr,socfpga-dw-mshcÿp@ ü‹ .#%5biuciu-7AK]n&z&sram@ffff0000 !mmio-sramÿÿspi@fff00000!snps,dw-apb-ssiÿð üš‡.' Adisabledsnoop-control-unit@fffec000!arm,cortex-a9-scuÿþÀspi@fff01000!snps,dw-apb-ssiÿð ü›‡.' Adisabledtimer@fffec600!arm,cortex-a9-twd-timerÿþÆ ü .(timer0@ffc08000!snps,dw-apb-timer ü§ÿÀ€."5timertimer1@ffc09000!snps,dw-apb-timer ü¨ÿÀ."5timertimer2@ffd00000!snps,dw-apb-timer ü©ÿÐ.5timertimer3@ffd01000!snps,dw-apb-timer üªÿÐ.5timerserial0@ffc02000!snps,dw-apb-uartÿÀ  ü¢Ž˜."¥))ªtxrxserial1@ffc03000!snps,dw-apb-uartÿÀ0 ü£Ž˜."¥))ªtxrxrstmgr@ffd05000´ !altr,rst-mgrÿÐPÁÖ!Ü!usbphy@0Ô!usb-nop-xceivAokayÖ+Ü+usb@ffb00000 !snps,dwc2ÿ°ÿÿ ü}.*5otgß+ äusb2-phy Adisabledusb@ffb40000 !snps,dwc2ÿ´ÿÿ ü€.*5otgß+ äusb2-phyAokaywatchdog@ffd02000 !snps,dw-wdtÿÐ  ü«. Adisabledwatchdog@ffd03000 !snps,dw-wdtÿÐ0 ü¬. Adisabledsysmgr@ffd08000!altr,sys-mgrsysconÿЀ@îÿЀÄÖ Ü 3-3-v-regulator!regulator-fixedþ3.3V 2Z %2Z Ö&Ü& #address-cells#size-cellsmodelcompatiblebootargsstdout-pathethernet0ethernet1serial0serial1timer0timer1timer2timer3device_typeregenable-methodnext-level-cache#interrupt-cellsinterrupt-controllerlinux,phandleinterrupt-parentrangesinterrupts#dma-cells#dma-channels#dma-requestsclocksclock-namesstatus#clock-cellsclock-frequencydiv-regfixed-dividerclk-gateclk-phasealtr,sysmgr-sysconinterrupt-namesmac-addressresetsreset-namessnps,multicast-filter-binssnps,perfect-filter-entriestx-fifo-depthrx-fifo-depthphy-moderxd0-skew-psrxd1-skew-psrxd2-skew-psrxd3-skew-pstxen-skew-pstxc-skew-psrxdv-skew-psrxc-skew-pspagesizegpio-controller#gpio-cellssnps,nr-gpiosaltr,sdr-sysconcache-unifiedcache-levelarm,tag-latencyarm,data-latencyprefetch-dataprefetch-instrnum-slotsbroken-cdbus-widthcap-mmc-highspeedcap-sd-highspeedvmmc-supplyvqmmc-supplynum-csreg-shiftreg-io-widthdmasdma-names#reset-cellsaltr,modrst-offset#phy-cellsphysphy-namescpu1-start-addrregulator-nameregulator-min-microvoltregulator-max-microvolt