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jdisabledusb@01c190002allwinner,sun6i-a31-musbc Gnmc~usb jdisabledphy@01c194002allwinner,sun6i-a31-usb-phyphy_ctrlpmu1pmu2c  usb0_phyusb1_phyusb2_phy!usb0_resetusb1_resetusb2_resetjokay28usb@01c1a000&2allwinner,sun6i-a31-ehcigeneric-ehci Hc~usbjokayusb@01c1a400&2allwinner,sun6i-a31-ohcigeneric-ohci Ic~usb jdisabledusb@01c1b000&2allwinner,sun6i-a31-ehcigeneric-ehci Jc~usbjokayusb@01c1b400&2allwinner,sun6i-a31-ohcigeneric-ohci Kc~usb jdisabledusb@01c1c400&2allwinner,sun6i-a31-ohcigeneric-ohci Mc jdisabledpinctrl@01c208002allwinner,sun6i-a31-pinctrl0 c28uart0@0 PH20PH21 uart0.2!8!i2c0@0 PH14PH15 i2c0.i2c1@0 PH16PH17 i2c1.i2c2@0 PH18PH19 i2c2.mmc0@0PF0PF1PF2PF3PF4PF5 mmc0.28mmc1@0PG0PG1PG2PG3PG4PG5 mmc1.gmac_mii@0TPA0PA1PA2PA3PA8PA9PA11PA12PA13PA14PA19PA20PA21PA22PA23PA24PA26PA27 gmac.2#8#gmac_gmii@0PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27 gmac.gmac_rgmii@0FPA0PA1PA2PA3PA9PA10PA11PA12PA13PA14PA19PA20PA25PA26PA27 gmac.ahci_pwr_pin@0PB8  gpio_out.2282usb0_vbus_pin@0PB9  gpio_out.2383usb1_vbus_pin@0PC27  gpio_out.2484usb2_vbus_pin@0PH3  gpio_out.2585led_pins@0PH13  gpio_out.2686mmc0_cd_pin@0PH22 gpio_in.28reset@01c202c02allwinner,sun6i-a31-ahb1-reset 28reset@01c202d0 2allwinner,sun6i-a31-clock-resetreset@01c202d8 2allwinner,sun6i-a31-clock-reset28timer@01c20c002allwinner,sun4i-a10-timer <cwatchdog@01c20ca02allwinner,sun6i-a31-wdt rtp@01c250002allwinner,sun6i-a31-tsP =28serial@01c280002snps,dw-apb-uart€ S]cj  orxtxjokay+default9!serial@01c284002snps,dw-apb-uart„ S]cj  orxtx jdisabledserial@01c288002snps,dw-apb-uartˆ S]cj  orxtx jdisabledserial@01c28c002snps,dw-apb-uartŒ S]cj orxtx jdisabledserial@01c290002snps,dw-apb-uart S]cj orxtx jdisabledserial@01c294002snps,dw-apb-uart” S]cj  orxtx jdisabledi2c@01c2ac002allwinner,sun6i-a31-i2c¬ c jdisabledi2c@01c2b0002allwinner,sun6i-a31-i2c° c jdisabledi2c@01c2b4002allwinner,sun6i-a31-i2c´ c jdisabledi2c@01c2b8002allwinner,sun6i-a31-i2c¸ c jdisabledethernet@01c300002allwinner,sun7i-a20-gmacT Rnmacirq c"stmmacethallwinner_gmac_tx stmmacethyjokay+default9#$miiethernet-phy@12$8$crypto-engine@01c150002allwinner,sun4i-a10-cryptoP P c%ahbmodahbtimer@01c6000082allwinner,sun6i-a31-hstimerallwinner,sun7i-a20-hstimer03456cspi@01c680002allwinner,sun6i-a31-spiƀ A c&ahbmodj  orxtx jdisabledspi@01c690002allwinner,sun6i-a31-spiƐ B c'ahbmodj  orxtx jdisabledspi@01c6a0002allwinner,sun6i-a31-spiƠ C c(ahbmodj  orxtx jdisabledspi@01c6b0002allwinner,sun6i-a31-spiư D c)ahbmodj  orxtx jdisabledinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic  @ `   28rtc@01f000002allwinner,sun6i-a31-rtcT()interrupt-controller@01f00c0c2allwinner,sun6i-a31-sc-nmi 8 prcm@01f014002allwinner,sun6i-a31-prcmar100_clk2allwinner,sun6i-a31-ar100-clkcar1002*8*ahb0_clk2fixed-factor-clockc*ahb02+8+apb0_clk2allwinner,sun6i-a31-apb0-clkc+apb02,8,apb0_gates_clk#2allwinner,sun6i-a31-apb0-gates-clkc,Dapb0_pioapb0_irapb0_timerapb0_p2wiapb0_uartapb0_1wireapb0_i2c2-8-ir_clk2allwinner,sun4i-a10-mod0-clkcir2.8.apb0_rst 2allwinner,sun6i-a31-clock-reset2/8/cpucfg@01f01c002allwinner,sun6i-a31-cpuconfigir@01f020002allwinner,sun5i-a13-ir c-.apbir/ % @jokay+default90pinctrl@01f02c002allwinner,sun6i-a31-r-pinctrl,-.c-/ir@0PL4 s_ir.2080p2wiPL0PL1 s_p2wi.2181i2c@01f034002allwinner,sun6i-a31-p2wi4 'c-/+default91 jdisabledahci-5v2regulator-fixed+default92ahci-5vLK@LK@ 0 jdisabledusb0-vbus2regulator-fixed+default93 usb0-vbusLK@LK@0  jdisabledusb1-vbus2regulator-fixed+default94 usb1-vbusLK@LK@ 0jokay28usb2-vbus2regulator-fixed+default95 usb2-vbusLK@LK@ 0 jdisabledvcc3v02regulator-fixedvcc3v0--vcc3v32regulator-fixedvcc3v32Z2Z28vcc5v02regulator-fixedvcc5v0LK@LK@leds 2gpio-leds+default96blue 5i7:blue:usr\  #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0device_typereginterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methodclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levellinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-output-namesassigned-clocksassigned-clock-parentsclock-indices#reset-cellsresets#dma-cellsclock-namesreset-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextconreg-names#phy-cellsusb1_vbus-supplygpio-controllerinterrupt-controller#interrupt-cells#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#thermal-sensor-cellsreg-shiftreg-io-widthdmasdma-namessnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-modeclock-divclock-multregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiolabel