m=8h(h`,Olimex A20-OLinuXino-LIME2/2olimex,a20-olinuxino-lime2allwinner,sun7i-a20chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmi c$+, jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c$, jdisabledframebuffer@202allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-tve0 c"$, jdisabledaliases q/soc@01c00000/ethernet@01c50000{/soc@01c00000/serial@01c28000memorymemory@cpuscpu@02arm,cortex-a7cpuc8\ \ / OB@2B@cpu@12arm,cortex-a7cputhermal-zonescpu_thermal cooling-mapsmap0' ,tripscpu_alert0;$Gpassivecpu_crit;G criticaltimer2arm,armv7-timer0R   pmu%2arm,cortex-a7-pmuarm,cortex-a15-pmuRxyclocks=clk@01c20050]2allwinner,sun4i-a10-osc-clkPjn6zosc24Mclk@0] 2fixed-clockjzosc32k  clk@01c20000]2allwinner,sun4i-a10-pll1-clkczpll1  clk@01c20018]2allwinner,sun7i-a20-pll4-clkczpll4clk@01c20020]2allwinner,sun4i-a10-pll5-clk czpll5_ddrpll5_otherclk@01c20028]2allwinner,sun4i-a10-pll6-clk(c%zpll6_satapll6_otherpll6pll6_div_4  clk@01c20040]2allwinner,sun7i-a20-pll4-clk@czpll8cpu@01c20054]2allwinner,sun4i-a10-cpu-clkTc  zcpuaxi@01c20054]2allwinner,sun4i-a10-axi-clkTczaxi  ahb@01c20054]2allwinner,sun5i-a13-ahb-clkTc  zahb    clk@01c20060]"2allwinner,sun7i-a20-ahb-gates-clk`c   !"#$%()*+,-./124vzahb_usb0ahb_ehci0ahb_ohci0ahb_ehci1ahb_ohci1ahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_mmc3ahb_msahb_nandahb_sdramahb_aceahb_emacahb_tsahb_spi0ahb_spi1ahb_spi2ahb_spi3ahb_sataahb_hstimerahb_veahb_tvdahb_tve0ahb_tve1ahb_lcd0ahb_lcd1ahb_csi0ahb_csi1ahb_hdmi1ahb_hdmi0ahb_de_be0ahb_de_be1ahb_de_fe0ahb_de_fe1ahb_gmacahb_mpahb_maliapb0@01c20054]2allwinner,sun4i-a10-apb0-clkTc zapb0clk@01c20068]#2allwinner,sun7i-a20-apb0-gates-clkhc( ezapb0_codecapb0_spdifapb0_ac97apb0_iis0apb0_iis1apb0_pioapb0_ir0apb0_ir1apb0_iis2apb0_keypad((clk@01c20058]2allwinner,sun4i-a10-apb1-clkXc  zapb1clk@01c2006c]#2allwinner,sun7i-a20-apb1-gates-clklcDzapb1_i2c0apb1_i2c1apb1_i2c2apb1_i2c3apb1_canapb1_scrapb1_ps20apb1_ps21apb1_i2c4apb1_uart0apb1_uart1apb1_uart2apb1_uart3apb1_uart4apb1_uart5apb1_uart6apb1_uart7++clk@01c20080]2allwinner,sun4i-a10-mod0-clkc znandclk@01c20084]2allwinner,sun4i-a10-mod0-clkc zmsclk@01c20088]2allwinner,sun4i-a10-mmc-clkc zmmc0mmc0_outputmmc0_sampleclk@01c2008c]2allwinner,sun4i-a10-mmc-clkc zmmc1mmc1_outputmmc1_sampleclk@01c20090]2allwinner,sun4i-a10-mmc-clkc zmmc2mmc2_outputmmc2_sampleclk@01c20094]2allwinner,sun4i-a10-mmc-clkc zmmc3mmc3_outputmmc3_sampleclk@01c20098]2allwinner,sun4i-a10-mod0-clkc ztsclk@01c2009c]2allwinner,sun4i-a10-mod0-clkc zss$$clk@01c200a0]2allwinner,sun4i-a10-mod0-clkc zspi0clk@01c200a4]2allwinner,sun4i-a10-mod0-clkc zspi1clk@01c200a8]2allwinner,sun4i-a10-mod0-clkc zspi2%%clk@01c200ac]2allwinner,sun4i-a10-mod0-clkc zpataclk@01c200b0]2allwinner,sun4i-a10-mod0-clkc zir0))clk@01c200b4]2allwinner,sun4i-a10-mod0-clkc zir1**clk@01c200cc]2allwinner,sun4i-a10-usb-clkc zusb_ohci0usb_ohci1usb_phy!!clk@01c200d4]2allwinner,sun4i-a10-mod0-clkc zspi3''clk@01c2015c]2allwinner,sun5i-a13-mbus-clk\c zmbusclk@2] 2fixed-clockj}x@ zmii_phy_txclk@3] 2fixed-clockjsY@ zgmac_int_txclk@01c20164]2allwinner,sun7i-a20-gmac-clkdczgmac_tx11clk@1]2fixed-factor-clockc zosc24M_32kclk@01c201f0]2allwinner,sun7i-a20-out-clk c  zclk_out_aclk@01c201f4]2allwinner,sun7i-a20-out-clk c  zclk_out_bsoc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller0=sram@00000000 2mmio-sram =sram-section@80002allwinner,sun4i-a10-sram-a3-a4@ jdisabledsram@00010000 2mmio-sram =sram-section@00002allwinner,sun4i-a10-sram-d jdisabled  interrupt-controller@01c000302allwinner,sun7i-a20-sc-nmi0  R..dma-controller@01c020002allwinner,sun4i-a10-dma  Rc spi@01c050002allwinner,sun4i-a10-spiP R  cahbmod!&rxtx jdisabledspi@01c060002allwinner,sun4i-a10-spi` R  cahbmod! &rxtx jdisabledethernet@01c0b0002allwinner,sun4i-a10-emac R7c0 jdisabledmdio@01c0b0802allwinner,sun4i-a10-mdio jdisabledmmc@01c0f0002allwinner,sun5i-a13-mmc cahbmmcoutputsample R jokay?defaultMWcmvmmc@01c100002allwinner,sun5i-a13-mmc c ahbmmcoutputsample R! jdisabledmmc@01c110002allwinner,sun5i-a13-mmc c ahbmmcoutputsample R" jdisabledmmc@01c120002allwinner,sun5i-a13-mmc  c ahbmmcoutputsample R# jdisabledusb@01c130002allwinner,sun4i-a10-musb0c R&mcusb0  jdisabledphy@01c134002allwinner,sun7i-a20-usb-phy4Hphy_ctrlpmu1pmu2c!usb_phy!!!!usb0_resetusb1_resetusb2_resetjokay"#usb@01c14000&2allwinner,sun7i-a20-ehcigeneric-ehci@ R'cusbjokayusb@01c14400&2allwinner,sun7i-a20-ohcigeneric-ohciD R@c!usbjokaycrypto-engine@01c150002allwinner,sun4i-a10-cryptoP RV c$ahbmodspi@01c170002allwinner,sun4i-a10-spip R  c%ahbmod!&rxtx jdisabledsata@01c180002allwinner,sun4i-a10-ahci R8c jokay&usb@01c1c000&2allwinner,sun7i-a20-ehcigeneric-ehci R(cusbjokayusb@01c1c400&2allwinner,sun7i-a20-ohcigeneric-ohci RAc!usbjokayspi@01c1f0002allwinner,sun4i-a10-spi R2 c'ahbmod!&rxtx jdisabledpinctrl@01c208002allwinner,sun7i-a20-pinctrl Rc(pwm0@0PB2+pwm>Npwm1@0PI3+pwm>Nuart0@0 PB22PB23+uart0>N,,uart2@0PI16PI17PI18PI19+uart2>Nuart3@0PG6PG7PG8PG9+uart3>Nuart3@1PH0PH1+uart3>Nuart4@0 PG10PG11+uart4>Nuart4@1PH4PH5+uart4>Nuart5@0 PI10PI11+uart5>Nuart6@0 PI12PI13+uart6>Nuart7@0 PI20PI21+uart7>Ni2c0@0PB0PB1+i2c0>N--i2c1@0 PB18PB19+i2c1>N00i2c2@0 PB20PB21+i2c2>Ni2c3@0PI0PI1+i2c3>Nemac0@0KPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16+emac>Nclk_out_a@0PI12 +clk_out_a>Nclk_out_b@0PI13 +clk_out_b>Ngmac_mii@0KPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16+gmac>Ngmac_rgmii@0BPA0PA1PA2PA3PA4PA5PA6PA7PA8PA10PA11PA12PA13PA15PA16+gmac>N22spi0@0PI11PI12PI13+spi0>Nspi0_cs0@0PI10+spi0>Nspi0_cs1@0PI14+spi0>Nspi1@0PI17PI18PI19+spi1>Nspi1_cs0@0PI16+spi1>Nspi2@0PC20PC21PC22+spi2>Nspi2@1PB15PB16PB17+spi2>Nspi2_cs0@0PC19+spi2>Nspi2_cs0@1PB14+spi2>Nmmc0@0PF0PF1PF2PF3PF4PF5+mmc0>Nmmc0_cd_pin@0PH1+gpio_in>Nmmc2@0PC6PC7PC8PC9PC10PC11+mmc2>Nmmc3@0PI4PI5PI6PI7PI8PI9+mmc3>Nir0@0PB4+ir0>Nir0@1PB3+ir0>Nir1@0PB23+ir1>Nir1@1PB22+ir1>Nps20@0 PI20PI21+ps2>Nps21@0 PH12PH13+ps2>Nahci_pwr_pin@0PB8 +gpio_out>Nusb0_vbus_pin@0PB9 +gpio_out>N55usb1_vbus_pin@0PH6 +gpio_out>N66usb2_vbus_pin@0PH3 +gpio_out>N77ahci_pwr_pin@1PC3 +gpio_out>N44led_pins@0PH2 +gpio_out>N88timer@01c20c002allwinner,sun4i-a10-timer HRCDcwatchdog@01c20c902allwinner,sun4i-a10-wdt rtc@01c20d002allwinner,sun7i-a20-rtc  Rpwm@01c20e002allwinner,sun7i-a20-pwm c] jdisabledir@01c218002allwinner,sun4i-a10-ir c()apbir R@ jdisabledir@01c21c002allwinner,sun4i-a10-ir c(*apbir R@ jdisabledlradc@01c228002allwinner,sun4i-a10-lradc-keys( R jdisabledeeprom@01c238002allwinner,sun7i-a20-sid8rtp@01c250002allwinner,sun5i-a13-tsP Rhserial@01c280002snps,dw-apb-uart€ R~c+jokay?defaultM,serial@01c284002snps,dw-apb-uart„ R~c+ jdisabledserial@01c288002snps,dw-apb-uartˆ R~c+ jdisabledserial@01c28c002snps,dw-apb-uartŒ R~c+ jdisabledserial@01c290002snps,dw-apb-uart R~c+ jdisabledserial@01c294002snps,dw-apb-uart” R~c+ jdisabledserial@01c298002snps,dw-apb-uart˜ R~c+ jdisabledserial@01c29c002snps,dw-apb-uartœ R~c+ jdisabledi2c@01c2ac0002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c¬ Rc+jokay?defaultM-pmic@342x-powers,axp2094.R/////regulatorsldo1  ldo2w@2Zldo3 `5gldo42Zdcdc2 `"dcdc3 `5gi2c@01c2b00002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c° Rc+jokay?defaultM0i2c@01c2b40002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c´ R c+ jdisabledi2c@01c2b80002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c¸ RXc+ jdisabledi2c@01c2c00002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c RYc+ jdisabledethernet@01c500002allwinner,sun7i-a20-gmac RUmacirq c11stmmacethallwinner_gmac_tx#4jokay?defaultM2K3Orgmiiethernet-phy@133hstimer@01c600002allwinner,sun7i-a20-hstimer0RQRSTcinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic  @ `  R ps2@01c2a0002allwinner,sun4i-a10-ps2  R>c+ jdisabledps2@01c2a4002allwinner,sun4i-a10-ps2¤ R?c+ jdisabledahci-5v2regulator-fixed?defaultM4Xahci-5vLK@LK@gyjokay&&usb0-vbus2regulator-fixed?defaultM5 Xusb0-vbusLK@LK@y  jdisabledusb1-vbus2regulator-fixed?defaultM6 Xusb1-vbusLK@LK@gyjokay""usb2-vbus2regulator-fixed?defaultM7 Xusb2-vbusLK@LK@gyjokay##vcc3v02regulator-fixedXvcc3v0--vcc3v32regulator-fixedXvcc3v32Z2Zvcc5v02regulator-fixedXvcc5v0LK@LK@leds 2gpio-leds?defaultM8greena20-olinuxino-lime2:green:usrponaxp_ipsout2regulator-fixed Xaxp-ipsoutLK@LK@// #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levellinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisinterrupts#clock-cellsclock-frequencyclock-output-namesassigned-clocksassigned-clock-parentsclock-indices#reset-cellsclock-divclock-multinterrupt-controller#interrupt-cells#dma-cellsclock-namesdmasdma-namesallwinner,srampinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextcon#phy-cellsreg-namesresetsreset-namesusb1_vbus-supplyusb2_vbus-supplytarget-supplygpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#pwm-cells#thermal-sensor-cellsreg-shiftreg-io-widthacin-supplyvin2-supplyvin3-supplyldo24in-supplyldo3in-supplyregulator-min-microvoltregulator-max-microvoltregulator-always-onsnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-moderegulator-nameregulator-boot-onenable-active-highgpiolabeldefault-state