r 8mD(m ,Olimex A20-Olinuxino Micro/2olimex,a20-olinuxino-microallwinner,sun7i-a20chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmi c$+, jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c$, jdisabledframebuffer@202allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-tve0 c"$, jdisabledaliases q/soc@01c00000/ethernet@01c50000{/soc@01c00000/serial@01c28000/soc@01c00000/serial@01c29800/soc@01c00000/serial@01c29c00/soc@01c00000/spi@01c06000/soc@01c00000/spi@01c17000memorymemory@cpuscpu@02arm,cortex-a7cpuc8\ \ / OB@2B@cpu@12arm,cortex-a7cputhermal-zonescpu_thermal #1cooling-mapsmap0A Ftripscpu_alert0U$apassivecpu_critUa criticaltimer2arm,armv7-timer0l   pmu%2arm,cortex-a7-pmuarm,cortex-a15-pmulxyclocks=clk@01c20050w2allwinner,sun4i-a10-osc-clkPn6osc24Mclk@0w 2fixed-clockosc32k  clk@01c20000w2allwinner,sun4i-a10-pll1-clkcpll1  clk@01c20018w2allwinner,sun7i-a20-pll4-clkcpll4clk@01c20020w2allwinner,sun4i-a10-pll5-clk cpll5_ddrpll5_otherclk@01c20028w2allwinner,sun4i-a10-pll6-clk(c%pll6_satapll6_otherpll6pll6_div_4  clk@01c20040w2allwinner,sun7i-a20-pll4-clk@cpll8cpu@01c20054w2allwinner,sun4i-a10-cpu-clkTc  cpuaxi@01c20054w2allwinner,sun4i-a10-axi-clkTcaxi  ahb@01c20054w2allwinner,sun5i-a13-ahb-clkTc  ahb    clk@01c20060w"2allwinner,sun7i-a20-ahb-gates-clk`c   !"#$%()*+,-./124vahb_usb0ahb_ehci0ahb_ohci0ahb_ehci1ahb_ohci1ahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_mmc3ahb_msahb_nandahb_sdramahb_aceahb_emacahb_tsahb_spi0ahb_spi1ahb_spi2ahb_spi3ahb_sataahb_hstimerahb_veahb_tvdahb_tve0ahb_tve1ahb_lcd0ahb_lcd1ahb_csi0ahb_csi1ahb_hdmi1ahb_hdmi0ahb_de_be0ahb_de_be1ahb_de_fe0ahb_de_fe1ahb_gmacahb_mpahb_maliapb0@01c20054w2allwinner,sun4i-a10-apb0-clkTc apb0clk@01c20068w#2allwinner,sun7i-a20-apb0-gates-clkhc( eapb0_codecapb0_spdifapb0_ac97apb0_iis0apb0_iis1apb0_pioapb0_ir0apb0_ir1apb0_iis2apb0_keypad11clk@01c20058w2allwinner,sun4i-a10-apb1-clkXc  apb1clk@01c2006cw#2allwinner,sun7i-a20-apb1-gates-clklcDapb1_i2c0apb1_i2c1apb1_i2c2apb1_i2c3apb1_canapb1_scrapb1_ps20apb1_ps21apb1_i2c4apb1_uart0apb1_uart1apb1_uart2apb1_uart3apb1_uart4apb1_uart5apb1_uart6apb1_uart755clk@01c20080w2allwinner,sun4i-a10-mod0-clkc nandclk@01c20084w2allwinner,sun4i-a10-mod0-clkc msclk@01c20088w2allwinner,sun4i-a10-mmc-clkc mmc0mmc0_outputmmc0_sampleclk@01c2008cw2allwinner,sun4i-a10-mmc-clkc mmc1mmc1_outputmmc1_sampleclk@01c20090w2allwinner,sun4i-a10-mmc-clkc mmc2mmc2_outputmmc2_sampleclk@01c20094w2allwinner,sun4i-a10-mmc-clkc mmc3mmc3_outputmmc3_sample  clk@01c20098w2allwinner,sun4i-a10-mod0-clkc tsclk@01c2009cw2allwinner,sun4i-a10-mod0-clkc ss++clk@01c200a0w2allwinner,sun4i-a10-mod0-clkc spi0clk@01c200a4w2allwinner,sun4i-a10-mod0-clkc spi1clk@01c200a8w2allwinner,sun4i-a10-mod0-clkc spi2,,clk@01c200acw2allwinner,sun4i-a10-mod0-clkc pataclk@01c200b0w2allwinner,sun4i-a10-mod0-clkc ir022clk@01c200b4w2allwinner,sun4i-a10-mod0-clkc ir133clk@01c200ccw2allwinner,sun4i-a10-usb-clkc usb_ohci0usb_ohci1usb_phy%%clk@01c200d4w2allwinner,sun4i-a10-mod0-clkc spi300clk@01c2015cw2allwinner,sun5i-a13-mbus-clk\c mbusclk@2w 2fixed-clock}x@ mii_phy_txclk@3w 2fixed-clocksY@ gmac_int_txclk@01c20164w2allwinner,sun7i-a20-gmac-clkdcgmac_tx==clk@1w2fixed-factor-clockc osc24M_32kclk@01c201f0w2allwinner,sun7i-a20-out-clk c  clk_out_aclk@01c201f4w2allwinner,sun7i-a20-out-clk c  clk_out_bsoc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller0=sram@00000000 2mmio-sram =sram-section@80002allwinner,sun4i-a10-sram-a3-a4@ jdisabledsram@00010000 2mmio-sram =sram-section@00002allwinner,sun4i-a10-sram-djokay$$interrupt-controller@01c000302allwinner,sun7i-a20-sc-nmi0  l::dma-controller@01c020002allwinner,sun4i-a10-dma  lc$spi@01c050002allwinner,sun4i-a10-spiP l  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clk_out_bgmac_mii@0KsPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16gmac>>gmac_rgmii@0BsPA0PA1PA2PA3PA4PA5PA6PA7PA8PA10PA11PA12PA13PA15PA16gmacspi0@0sPI11PI12PI13spi0spi0_cs0@0sPI10spi0spi0_cs1@0sPI14spi0spi1@0sPI17PI18PI19spi1spi1_cs0@0sPI16spi1spi2@0sPC20PC21PC22spi2--spi2@1sPB15PB16PB17spi2spi2_cs0@0sPC19spi2..spi2_cs0@1sPB14spi2mmc0@0sPF0PF1PF2PF3PF4PF5mmc0mmc0_cd_pin@0sPH1gpio_inmmc2@0sPC6PC7PC8PC9PC10PC11mmc2mmc3@0sPI4PI5PI6PI7PI8PI9mmc3!!ir0@0sPB4ir0ir0@1sPB3ir0ir1@0sPB23ir1ir1@1sPB22ir1ps20@0 sPI20PI21ps2ps21@0 sPH12PH13ps2ahci_pwr_pin@0sPB8 gpio_out@@usb0_vbus_pin@0sPB9 gpio_outAAusb1_vbus_pin@0sPH6 gpio_outBBusb2_vbus_pin@0sPH3 gpio_outCCmmc3_cd_pin@0sPH11gpio_in""led_pins@0sPH2 gpio_outDDusb0_id_detect_pin@0sPH4gpio_in&&usb0_vbus_detect_pin@0sPH5gpio_in''timer@01c20c002allwinner,sun4i-a10-timer HlCDcwatchdog@01c20c902allwinner,sun4i-a10-wdt rtc@01c20d002allwinner,sun7i-a20-rtc  lpwm@01c20e002allwinner,sun7i-a20-pwm c jdisabledir@01c218002allwinner,sun4i-a10-ir c12/apbir l@ jdisabledir@01c21c002allwinner,sun4i-a10-ir c13/apbir l@ jdisabledlradc@01c228002allwinner,sun4i-a10-lradc-keys( ljokay4button@191 Volume Ups*button@392 Volume Downrbutton@601Menu ,?button@795Search !button@987Homebutton@1184Escbutton@1398EnterXeeprom@01c238002allwinner,sun7i-a20-sid8rtp@01c250002allwinner,sun5i-a13-tsP lserial@01c280002snps,dw-apb-uart€ l c5jokayJdefaultX6serial@01c284002snps,dw-apb-uart„ l c5 jdisabledserial@01c288002snps,dw-apb-uartˆ l c5 jdisabledserial@01c28c002snps,dw-apb-uartŒ l c5 jdisabledserial@01c290002snps,dw-apb-uart l c5 jdisabledserial@01c294002snps,dw-apb-uart” l c5 jdisabledserial@01c298002snps,dw-apb-uart˜ l c5jokayJdefaultX7serial@01c29c002snps,dw-apb-uartœ l c5jokayJdefaultX8i2c@01c2ac0002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c¬ lc5jokayJdefaultX9pmic@342x-powers,axp2094:li2c@01c2b00002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c° lc5jokayJdefaultX;i2c@01c2b40002allwinner,sun7i-a20-i2callwinner,sun4i-a10-i2c´ l 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#address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0serial1serial2spi0spi1device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levellinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisinterrupts#clock-cellsclock-frequencyclock-output-namesassigned-clocksassigned-clock-parentsclock-indices#reset-cellsclock-divclock-multinterrupt-controller#interrupt-cells#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0allwinner,sramvmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextcondr_mode#phy-cellsreg-namesresetsreset-namesusb0_id_det-gpiousb0_vbus_det-gpiousb0_vbus-supplyusb1_vbus-supplyusb2_vbus-supplytarget-supplygpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#pwm-cellsvref-supplylabellinux,codechannelvoltage#thermal-sensor-cellsreg-shiftreg-io-widthsnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-moderegulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highdefault-state