<80( +0:ti,am572x-beagle-x15ti,am5728ti,dra742ti,dra74ti,dra7&7TI AM5728 BeagleBoard-X15chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000/ocp/i2c@48060000/rtc@6f-/ocp/i2c@48070000/tps659038@58/tps659038_rtc/ocp/rtc@48838000 /connectormemorymemorytimerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic H!H! H!@ H!`   &&,interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&&,socti,omap-inframpu ti,omap5-mpu4mpuocpti,dra7-l3-nocsimple-bus>4l3_main_1l3_main_2DE E l4@4a000000ti,dra7-l4-cfgsimple-bus >J"scm@2000ti,dra7-scm-coresimple-bus  > scm_conf@0sysconsimple-bus >&,pbias_regulatorti,pbias-dra7ti,pbias-omapYpbias_mmc_omap5`pbias_mmc_omap5ow@-&,clocksdss_deshdcp_clkti,gate-clockXpinmux@1400ti,dra7-padconfpinctrl-singleh ?&,leds_pins_default &,i2c1_pins_default&,pinmux_hdmi_pins &,i2c3_pins_default  &,uart3_pins_default  &,mmc1_pins_default8lTX\`dh&,mmc2_pins_defaultP&,cpsw_pins_defaultPTX\`dhlptx|&,cpsw_pins_sleepPTX\`dhlptx|&,davinci_mdio_pins_default<@&,davinci_mdio_pins_sleep<@&,tps659038_pins_default&,tmp102_pins_default&,mcp79410_pins_default$&,pinmux_usb1_pins &,extcon_usb1_pins&,pinmux_tpd12s015_pinsp&,clkout2_pins_default &,clkout2_pins_sleep&,mcasp3_pins_default $(,0&,mcasp3_pins_sleep $(,0&,scm_conf@1c04syscon cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ckti,dra7-atl-clock&7,7atl_clkin1_ckti,dra7-atl-clock&6,6atl_clkin2_ckti,dra7-atl-clock&5,5atl_clkin3_ckti,dra7-atl-clock&4,4hdmi_clkin_ck fixed-clock&%,%mlb_clkin_ck fixed-clock&,mlbp_clkin_ck fixed-clock&,pciesref_acs_clk_ck fixed-clock&N,Nref_clkin0_ck fixed-clock&9,9ref_clkin1_ck fixed-clock&:,:ref_clkin2_ck fixed-clock&;,;ref_clkin3_ck fixed-clock&<,<rmii_clk_ck fixed-clocksdvenc_clkin_ck fixed-clocksecure_32k_clk_src_ck fixed-clock&,sys_32k_ck fixed-clock&D,Dvirt_12000000_ck fixed-clock&r,rvirt_13000000_ck fixed-clock]@virt_16800000_ck fixed-clockY&t,tvirt_19200000_ck fixed-clock$&u,uvirt_20000000_ck fixed-clock1-&s,svirt_26000000_ck fixed-clock&v,vvirt_27000000_ck fixed-clock&w,wvirt_38400000_ck fixed-clockI&x,xsys_clkin2 fixed-clockX&8,8usb_otg_clkin_ck fixed-clock&~,~video1_clkin_ck fixed-clock&.,.video1_m2_clkin_ck fixed-clock&$,$video2_clkin_ck fixed-clock&/,/video2_m2_clkin_ck fixed-clock&#,#dpll_abe_ckti,omap4-dpll-m4xen-clock& , dpll_abe_x2_ckti,omap4-dpll-x2-clock & , dpll_abe_m2x2_ckti,divider-clock *<S& , abe_clkti,divider-clock j&z,zdpll_abe_m2_ckti,divider-clock *<S&c,cdpll_abe_m3x2_ckti,divider-clock *<S& , dpll_core_byp_mux ti,mux-clock ,&,dpll_core_ckti,omap4-dpll-core-clock  $,(&,dpll_core_x2_ckti,omap4-dpll-x2-clock&,dpll_core_h12x2_ckti,divider-clock?*<<S&,mpu_dpll_hs_clk_divfixed-factor-clock&,dpll_mpu_ckti,omap5-mpu-dpll-clock `dlh&,dpll_mpu_m2_ckti,divider-clock*p<S&,mpu_dclk_divfixed-factor-clock&,dsp_dpll_hs_clk_divfixed-factor-clock&,dpll_dsp_byp_mux ti,mux-clock @&,dpll_dsp_ckti,omap4-dpll-clock 48@<&,dpll_dsp_m2_ckti,divider-clock*D<S&|,|iva_dpll_hs_clk_divfixed-factor-clock&,dpll_iva_byp_mux ti,mux-clock &,dpll_iva_ckti,omap4-dpll-clock &,dpll_iva_m2_ckti,divider-clock*<S&,iva_dclkfixed-factor-clock&,dpll_gpu_byp_mux ti,mux-clock &,dpll_gpu_ckti,omap4-dpll-clock &,dpll_gpu_m2_ckti,divider-clock*<S&h,hdpll_core_m2_ckti,divider-clock*0<S&,core_dpll_out_dclk_divfixed-factor-clock&,dpll_ddr_byp_mux ti,mux-clock &,dpll_ddr_ckti,omap4-dpll-clock & , dpll_ddr_m2_ckti,divider-clock * <S&},}dpll_gmac_byp_mux ti,mux-clock &!,!dpll_gmac_ckti,omap4-dpll-clock !&","dpll_gmac_m2_ckti,divider-clock"*<S&e,evideo2_dclk_divfixed-factor-clock#&,video1_dclk_divfixed-factor-clock$&,hdmi_dclk_divfixed-factor-clock%&,per_dpll_hs_clk_divfixed-factor-clock &R,Rusb_dpll_hs_clk_divfixed-factor-clock &V,Veve_dpll_hs_clk_divfixed-factor-clock&&,&dpll_eve_byp_mux ti,mux-clock &&','dpll_eve_ckti,omap4-dpll-clock '&(,(dpll_eve_m2_ckti,divider-clock(*<S&),)eve_dclk_divfixed-factor-clock)&,dpll_core_h13x2_ckti,divider-clock?*@<Sdpll_core_h14x2_ckti,divider-clock?*D<S&f,fdpll_core_h22x2_ckti,divider-clock?*T<S&0,0dpll_core_h23x2_ckti,divider-clock?*X<S&q,qdpll_core_h24x2_ckti,divider-clock?*\<Sdpll_ddr_x2_ckti,omap4-dpll-x2-clock &*,*dpll_ddr_h11x2_ckti,divider-clock*?*(<Sdpll_dsp_x2_ckti,omap4-dpll-x2-clock&+,+dpll_dsp_m3x2_ckti,divider-clock+*H<S&,dpll_gmac_x2_ckti,omap4-dpll-x2-clock"&,,,dpll_gmac_h11x2_ckti,divider-clock,?*<S&-,-dpll_gmac_h12x2_ckti,divider-clock,?*<Sdpll_gmac_h13x2_ckti,divider-clock,?*<Sdpll_gmac_m3x2_ckti,divider-clock,*<Sgmii_m_clk_divfixed-factor-clock-hdmi_clk2_divfixed-factor-clock%&B,Bhdmi_div_clkfixed-factor-clock%&H,Hl3_iclk_divti,divider-clockj&,l4_root_clk_divfixed-factor-clockvideo1_clk2_divfixed-factor-clock.&@,@video1_div_clkfixed-factor-clock.&F,Fvideo2_clk2_divfixed-factor-clock/&A,Avideo2_div_clkfixed-factor-clock/&G,Gipu1_gfclk_mux ti,mux-clock 0 mcasp1_ahclkr_mux ti,mux-clock8123456789:;<=>Pmcasp1_ahclkx_mux ti,mux-clock8123456789:;<=>Pmcasp1_aux_gfclk_mux ti,mux-clock?@ABPtimer5_gfclk_mux ti,mux-clock0CD89:;<EFGHIXtimer6_gfclk_mux ti,mux-clock0CD89:;<EFGHI`timer7_gfclk_mux ti,mux-clock0CD89:;<EFGHIhtimer8_gfclk_mux ti,mux-clock0CD89:;<EFGHIpuart6_gfclk_mux ti,mux-clockJKdummy_ck fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ckti,omap4-dpll-clock  &L,Ldpll_pcie_ref_m2ldo_ckti,divider-clockL*<S&M,Mapll_pcie_in_clk_mux@4ae06118 ti,mux-clockMN&O,Oapll_pcie_ckti,dra7-apll-clockOL &P,Poptfclk_pciephy1_32khz@4a0093b0ti,gate-clockD&,optfclk_pciephy2_32khz@4a0093b8ti,gate-clockD&,optfclk_pciephy_div@4a00821cti,divider-clockP&Q,Qoptfclk_pciephy1_clk@4a0093b0ti,gate-clockP &,optfclk_pciephy2_clk@4a0093b8ti,gate-clockP &,optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockQ &,optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockQ &,apll_pcie_clkvcoldofixed-factor-clockPapll_pcie_clkvcoldo_divfixed-factor-clockPapll_pcie_m2_ckfixed-factor-clockP&,dpll_per_byp_mux ti,mux-clock RL&S,Sdpll_per_ckti,omap4-dpll-clock S@DLH&T,Tdpll_per_m2_ckti,divider-clockT*P<S&U,Ufunc_96m_aon_dclk_divfixed-factor-clockU&,dpll_usb_byp_mux ti,mux-clock V&W,Wdpll_usb_ckti,omap4-dpll-j-type-clock W&X,Xdpll_usb_m2_ckti,divider-clockX*<S&[,[dpll_pcie_ref_m2_ckti,divider-clockL*<S&,dpll_per_x2_ckti,omap4-dpll-x2-clockT&Y,Ydpll_per_h11x2_ckti,divider-clockY?*X<S&Z,Zdpll_per_h12x2_ckti,divider-clockY?*\<S&^,^dpll_per_h13x2_ckti,divider-clockY?*`<S&o,odpll_per_h14x2_ckti,divider-clockY?*d<S&g,gdpll_per_m2x2_ckti,divider-clockY*P<S&K,Kdpll_usb_clkdcoldofixed-factor-clockX&],]func_128m_clkfixed-factor-clockZ&j,jfunc_12m_fclkfixed-factor-clockKfunc_24m_clkfixed-factor-clockU&3,3func_48m_fclkfixed-factor-clockK&J,Jfunc_96m_fclkfixed-factor-clockKl3init_60m_fclkti,divider-clock[clkout2_clkti,gate-clock\&,l3init_960m_gfclkti,gate-clock]&b,bdss_32khz_clkti,gate-clockD  dss_48mhz_clkti,gate-clockJ  &,dss_dss_clkti,gate-clock^ &,dss_hdmi_clkti,gate-clock_  &,dss_video1_clkti,gate-clock`  &,dss_video2_clkti,gate-clocka  &,gpio2_dbclkti,gate-clockD`gpio3_dbclkti,gate-clockDhgpio4_dbclkti,gate-clockDpgpio5_dbclkti,gate-clockDxgpio6_dbclkti,gate-clockDgpio7_dbclkti,gate-clockDgpio8_dbclkti,gate-clockDmmc1_clk32kti,gate-clockD(mmc2_clk32kti,gate-clockD0mmc3_clk32kti,gate-clockD mmc4_clk32kti,gate-clockD(sata_ref_clkti,gate-clock &,usb_otg_ss1_refclk960mti,gate-clockb&,usb_otg_ss2_refclk960mti,gate-clockb@&,usb_phy1_always_on_clk32kti,gate-clockD@&,usb_phy2_always_on_clk32kti,gate-clockD&,usb_phy3_always_on_clk32kti,gate-clockD&,atl_dpll_clk_mux ti,mux-clockD./% &d,datl_gfclk_mux ti,mux-clock cd &,gmac_gmii_ref_clk_divti,divider-clocke&,gmac_rft_clk_mux ti,mux-clock./c%gpu_core_gclk_mux ti,mux-clock fgh gpu_hyd_gclk_mux ti,mux-clock fgh l3instr_ts_gclk_divti,divider-clockiP  mcasp2_ahclkr_mux ti,mux-clock8123456789:;<=>`mcasp2_ahclkx_mux ti,mux-clock8123456789:;<=>`mcasp2_aux_gfclk_mux ti,mux-clock?@AB`mcasp3_ahclkx_mux ti,mux-clock8123456789:;<=>h&,mcasp3_aux_gfclk_mux ti,mux-clock?@ABh&,mcasp4_ahclkx_mux ti,mux-clock8123456789:;<=>mcasp4_aux_gfclk_mux ti,mux-clock?@ABmcasp5_ahclkx_mux ti,mux-clock8123456789:;<=>xmcasp5_aux_gfclk_mux ti,mux-clock?@ABxmcasp6_ahclkx_mux ti,mux-clock8123456789:;<=>mcasp6_aux_gfclk_mux ti,mux-clock?@ABmcasp7_ahclkx_mux ti,mux-clock8123456789:;<=>mcasp7_aux_gfclk_mux ti,mux-clock?@ABmcasp8_ahclk_mux ti,mux-clock8123456789:;<=>mcasp8_aux_gfclk_mux ti,mux-clock?@ABmmc1_fclk_mux ti,mux-clockjK(&k,kmmc1_fclk_divti,divider-clockk(jmmc2_fclk_mux ti,mux-clockjK0&l,lmmc2_fclk_divti,divider-clockl0jmmc3_gfclk_mux ti,mux-clockJK &m,mmmc3_gfclk_divti,divider-clockm jmmc4_gfclk_mux ti,mux-clockJK(&n,nmmc4_gfclk_divti,divider-clockn(jqspi_gfclk_mux ti,mux-clockjo8&p,pqspi_gfclk_divti,divider-clockp8j&,timer10_gfclk_mux ti,mux-clock,CD89:;<EFGH(timer11_gfclk_mux ti,mux-clock,CD89:;<EFGH0timer13_gfclk_mux ti,mux-clock,CD89:;<EFGHtimer14_gfclk_mux ti,mux-clock,CD89:;<EFGHtimer15_gfclk_mux ti,mux-clock,CD89:;<EFGHtimer16_gfclk_mux ti,mux-clock,CD89:;<EFGH0timer2_gfclk_mux ti,mux-clock,CD89:;<EFGH8timer3_gfclk_mux ti,mux-clock,CD89:;<EFGH@timer4_gfclk_mux ti,mux-clock,CD89:;<EFGHHtimer9_gfclk_mux ti,mux-clock,CD89:;<EFGHPuart1_gfclk_mux ti,mux-clockJK@uart2_gfclk_mux ti,mux-clockJKHuart3_gfclk_mux ti,mux-clockJKPuart4_gfclk_mux ti,mux-clockJKXuart5_gfclk_mux ti,mux-clockJKpuart7_gfclk_mux ti,mux-clockJKuart8_gfclk_mux ti,mux-clockJKuart9_gfclk_mux ti,mux-clockJKvip1_gclk_mux ti,mux-clockq vip2_gclk_mux ti,mux-clockq(vip3_gclk_mux ti,mux-clockq0clockdomainscoreaon_clkdmti,clockdomainXl4@4ae00000ti,dra7-l4-wkupsimple-bus >Jcounter@4000ti,omap-counter32k@@ 4counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1 ti,mux-clockrstuvwx<& , abe_dpll_sys_clk_mux ti,mux-clock 8&y,yabe_dpll_bypass_clk_mux ti,mux-clockyD&,abe_dpll_clk_mux ti,mux-clockyD &,abe_24m_fclkti,divider-clock &1,1aess_fclkti,divider-clockzx&{,{abe_giclk_divti,divider-clock{t&E,Eabe_lp_clk_divti,divider-clock  &,abe_sys_clk_divti,divider-clock  &2,2adc_gfclk_mux ti,mux-clock  8Dsys_clk1_dclk_divti,divider-clock @j&,sys_clk2_dclk_divti,divider-clock8@j&,per_abe_x1_dclk_divti,divider-clockc@j&,dsp_gclk_divti,divider-clock|@j&,gpu_dclkti,divider-clockh@j&,emif_phy_dclk_divti,divider-clock}@j&,gmac_250m_dclk_divti,divider-clocke@j&,l3init_480m_dclk_divti,divider-clock[@j&,usb_otg_dclk_divti,divider-clock~@j&,sata_dclk_divti,divider-clock @j&,pcie2_dclk_divti,divider-clock@j&,pcie_dclk_divti,divider-clock@j&,emu_dclk_divti,divider-clock @j&,secure_32k_dclk_divti,divider-clock@j&,clkoutmux0_clk_mux ti,mux-clockXX&I,Iclkoutmux1_clk_mux ti,mux-clockX\clkoutmux2_clk_mux ti,mux-clockX`&\,\custefuse_sys_gfclk_divfixed-factor-clock eve_clk ti,mux-clock)hdmi_dpll_clk_mux ti,mux-clock 8d&_,_mlb_clkti,divider-clock@4j&=,=mlbp_clkti,divider-clock@0j&>,>per_abe_x1_gfclk2_divti,divider-clockc@8j&?,?timer_sys_clk_divti,divider-clock D&C,Cvideo1_dpll_clk_mux ti,mux-clock 8h&`,`video2_dpll_clk_mux ti,mux-clock 8l&a,awkupaon_iclk_mux ti,mux-clock &i,igpio1_dbclkti,gate-clockD8dcan1_sys_clk_mux ti,mux-clock 8&,timer1_gfclk_mux ti,mux-clock,CD89:;<EFGH@uart10_gfclk_mux ti,mux-clockJKclockdomainsaxi@0 simple-bus>QQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigpci0>0 004pcie1 pcie-phy0` interrupt-controller&,axi@1 simple-bus>QQ00 disabledpcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcdpci0>00004pcie2 pcie-phy0`interrupt-controller&,bandgap@4a0021e00J! J#, J#,J#txrxokayhdefaultu mmc@480b4000ti,omap4-hsmmcH @ Q4mmc2Q/0txrxokaydefaultummc@480ad000ti,omap4-hsmmcH  Y4mmc3QMNtxrx disabledmmc@480d1000ti,omap4-hsmmcH  [4mmc4Q9:txrx disabledmmu@40d01000ti,dra7-dsp-iommu@  4mmu0_dsp1 disabledmmu@40d02000ti,dra7-dsp-iommu@   4mmu1_dsp1 disabledmmu@58882000ti,dra7-iommuX   4mmu_ipu1 disabledmmu@55082000ti,dra7-iommuU   4mmu_ipu2 disabledregulator-abb-mpu ti,abb-v3`abb_mpu 2(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-address-EHY,@vregulator-abb-ivahd ti,abb-v3 `abb_ivahd 2(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-address@-EHY0regulator-abb-dspeve ti,abb-v3 `abb_dspeve 2(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-address -EHY0regulator-abb-gpu ti,abb-v3`abb_gpu 2(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-address-EHYvspi@48098000ti,omap4-mcspiH  <4mcspi1e@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3 disabledspi@4809a000ti,omap4-mcspiH  =4mcspi2e +,-.tx0rx0tx1rx1 disabledspi@480b8000ti,omap4-mcspiH  V4mcspi3etx0rx0 disabledspi@480ba000ti,omap4-mcspiH  +4mcspi4eFGtx0rx0 disabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmapsX4qspifckl W disabledcontrol-phy@4a002374ti,control-phy-pipe3J#tpower sysclk&,ocp2scp@4a090000ti,omap-ocp2scp>J  4ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrl sysclkrefclk&,pciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_txLMQ4dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-div&,pciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_txLMQ4dpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-div disabled&,sata@4a141100snps,dwc-ahciJJ 1 sata-phy4sataokaycontrol-phy@0x4a003c40ti,control-phy-pcieJ<@J<J<4powercontrol_smapcie_pcs sysclk&,control-pcie@0x4a003c44ti,control-phy-pcieJJ  4ocp2scp1phy@4a084000 ti,omap-usb2J@wkupclkrefclk&,phy@4a085000 ti,omap-usb2JPwkupclkrefclk&,phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrl  wkupclksysclkrefclk&,omap_dwc3_1@48880000ti,dwc3 4usb_otg_ss1H H>usb@48890000 snps,dwc3Hp$GGH)peripheralhostotgusb2-phyusb3-phy super-speedhostdefaultomap_dwc3_2@488c0000ti,dwc3 4usb_otg_ss2H W>usb@488d0000 snps,dwc3Hp$IIW)peripheralhostotg usb2-phy high-speed peripheralomap_dwc3_3@48900000ti,dwc3 4usb_otg_ss3H X> disabledusb@48910000 snps,dwc3Hp$XXX)peripheralhostotg high-speedotgelm@48078000ti,am3352-elmH 4elm disabledgpmc@50000000ti,am3352-gpmc4gpmcP| ,8 disabledatl@4843c000 ti,dra7-atlHC4atlJ7654fck disabledmcasp@48468000ti,dra7-mcasp-audio4mcasp3HF mpu)txrxtxrx fckahclkxokaydefaultsleep]m8&,crossbar@4a002a48ti,irq-crossbarJ*H0&  &,ethernet@48484000ti,dra7-cpswti,cpsw4gmac" fckcpts '1@: FMZjHH@HHR.{0NOPQ>Yokaydefaultsleepmdio@48485000ti,davinci_mdio 4davinci_mdioB@HHPdefaultsleep&,slave@48480200rgmiislave@48480300rgmiicpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T gmii-selcan@481cc000ti,dra7-d_can4dcan1J  X  disabledcan@481d0000ti,dra7-d_can4dcan2HH  X   disableddss@58000000 ti,dra7-dssok 4dss_core8>(XX@TXC XPTXS (dsspll1_clkctrlpll1pll2_clkctrlpll2 fckvideo1_clkvideo2_clkdispc@58001000ti,dra7-dispcX  4dss_dispcfck4encoder@58060000 ti,dra7-hdmi XXXXwppllphycore `ok 4dss_hdmi fcksys_clk defaultportendpoint &,dsp_system@41500000sysconAP&,omap_dwc3_4@48940000ti,dwc3 4usb_otg_ss4H Z> disabledusb@48950000 snps,dwc3Hp$YYZ)peripheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  4mmu0_dsp2 disabledmmu@41502000ti,dra7-dsp-iommuAP   4mmu1_dsp2 disabledthermal-zonescpu_thermal  6 Dtripscpu_alert T `passive&,cpu_crit TH ` criticalcpu_alert1 TP `active&,cooling-mapsmap0 k pmap1 k pgpu_thermal  6 Dtripsgpu_crit TH ` criticalcore_thermal  6 Dtripscore_crit TH ` criticalboard_thermal  6 Dtripsboard_alert T@ `active&,board_crit T( ` criticalcooling-mapsmap0 k pcpuscpu@0cpuarm,cortex-a15 B@,@cpu      &,cpu@1cpuarm,cortex-a15pmuarm,cortex-a15-pmu&fixedregulator-vdd_3v3regulator-fixed`vdd_3v3 o2Z2Z&,fixedregulator-aic_dvddregulator-fixed`aic_dvdd_fixed ow@w@&,fixedregulator-vttregulator-fixed `vtt_fixed o2Z2ZDX  leds gpio-ledsdefaultled@0 beagle-x15:usr0   heartbeat .offled@1 beagle-x15:usr1  cpu0 .offled@2 beagle-x15:usr2  mmc0 .offled@3 beagle-x15:usr3  ide-disk .offgpio_fan gpio-fan  <2 &,extcon_usb1linux,extcon-usb-gpio Odefault&,connectorhdmi-connector hdmiaportendpoint &,encoder ti,tpd12s015default$  portsport@0endpoint &,port@1endpoint &,sound@0simple-audio-card WBeagleBoard-X15 nLineLine OutLineLine In: Line OutLLOUTLine OutRLOUTMIC2LLine InMIC2RLine In dsp_b   simple-audio-card,cpu !simple-audio-card,codec !]\m&, #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0rtc0rtc1rtc2display0device_typereginterruptsinterrupt-controller#interrupt-cellslinux,phandleti,hwmodsrangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclocksti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsclock-frequencyti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoclock-multclock-divti,dividersti,set-rate-parentreg-namesnum-lanesphysphy-namesinterrupt-map-maskinterrupt-mapgpiosstatus#thermal-sensor-cells#dma-cellsdma-channelsdma-requeststi,dma-safe-mapdma-mastersgpio-controller#gpio-cellsti,no-reset-on-initti,no-idle-on-initdmasdma-namespinctrl-namespinctrl-0#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwon#hwlock-cellsti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondsti,enable-vbus-detectionti,enable-id-detectionid-gpios#sound-dai-cellspinctrl-1adc-settle-msAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyinterrupt-namesvcc-supplyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpiosti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsclock-namesctrl-modulesyscon-pllreset#phy-cellsphy-supplyutmi-modeextcontx-fifo-resizemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,provided-clocksassigned-clocksassigned-clock-parentsop-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_ramrx_descsmac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceoperating-pointsclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-tolerancevin-supplyenable-active-highgpiolabellinux,default-triggerdefault-stategpio-fan,speed-mapid-gpiosimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,bitclock-inversionsound-dai