^8R,( TQNcompulab,sbc-am57xcompulab,cl-som-am57xti,am5728ti,dra742ti,dra74ti,dra7&&7CompuLab CL-SOM-AM57x on SB-SOM-AM57xchosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@481cc000/ocp/can@481d0000/ocp/qspi@4b300000 /display#/ocp/dss@58000000/encoder@58060000timerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&cpuscpu@0"cpuarm,cortex-a15.BIcpuUcucpu@1"cpuarm,cortex-a15.opp-tableoperating-points-v2-ti-cpuopp_nom-1000000000; , P0opp_od-1176000000FV @ @socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busl3_main_1l3_main_2 DE   l4@4a000000ti,dra7-l4-cfgsimple-bus J"scm@2000ti,dra7-scm-coresimple-bus   scm_conf@0sysconsimple-bus pbias_regulator@e00ti,pbias-dra7ti,pbias-omappbias_mmc_omap5pbias_mmc_omap5,w@D-clocksdss_deshdcp_clk@558\ti,gate-clockB iXehrpwm0_tbclk@558\ti,gate-clockB iXehrpwm1_tbclk@558\ti,gate-clockB iXehrpwm2_tbclk@558\ti,gate-clockB iXsys_32k_ck\ ti,mux-clockB iPPpinmux@1400ti,dra7-padconfpinctrl-singlehv ?leds_pins_default|i2c1_pins_defaulti2c3_pins_default  i2c4_pins_default  tps659038_pins_defaultmmc2_pins_defaultPpinmux_qspi1_pins0tcpsw_pins_defaultPTX\`dhlptx|cpsw_pins_sleepPTX\`dhlptx|davinci_mdio_pins_defaultdavinci_mdio_pins_sleeppinmux_ads7846_pinsdmcasp3_pins_default $(,0mcasp3_pins_sleep $(,0uart3_pins_defaultH L mmc1_pins_default@TX\`dhl|pinmux_usb1_pins i2c5_pins_default  lcd_pins_defaultd  pinmux_hdmi_pins pinmux_hdmi_conn_pins  scm_conf@1c04syscon scm_conf@1c24syscon$$dma-router@b78ti,dra7-dma-crossbar x dma-router@c78ti,dra7-dma-crossbar x|cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ck\ti,dra7-atl-clockBCCatl_clkin1_ck\ti,dra7-atl-clockBBBatl_clkin2_ck\ti,dra7-atl-clockBAAatl_clkin3_ck\ti,dra7-atl-clockB@@hdmi_clkin_ck\ fixed-clock//mlb_clkin_ck\ fixed-clockmlbp_clkin_ck\ fixed-clockpciesref_acs_clk_ck\ fixed-clockZZref_clkin0_ck\ fixed-clockEEref_clkin1_ck\ fixed-clockFFref_clkin2_ck\ fixed-clockGGref_clkin3_ck\ fixed-clockHHrmii_clk_ck\ fixed-clockqqsdvenc_clkin_ck\ fixed-clocksecure_32k_clk_src_ck\ fixed-clocksys_clk32_crystal_ck\ fixed-clock  sys_clk32_pseudo_ck\fixed-factor-clockB#b  virt_12000000_ck\ fixed-clockvirt_13000000_ck\ fixed-clock]@virt_16800000_ck\ fixed-clockYvirt_19200000_ck\ fixed-clock$virt_20000000_ck\ fixed-clock1-virt_26000000_ck\ fixed-clockvirt_27000000_ck\ fixed-clockvirt_38400000_ck\ fixed-clockIsys_clkin2\ fixed-clockXDDusb_otg_clkin_ck\ fixed-clockvideo1_clkin_ck\ fixed-clock99video1_m2_clkin_ck\ fixed-clock..video2_clkin_ck\ fixed-clock::video2_m2_clkin_ck\ fixed-clock--dpll_abe_ck@1e0\ti,omap4-dpll-m4xen-clockBdpll_abe_x2_ck\ti,omap4-dpll-x2-clockBdpll_abe_m2x2_ck@1f0\ti,divider-clockB-8Jaabe_clk@108\ti,divider-clockB-xdpll_abe_m2_ck@1f0\ti,divider-clockB-8Jaoodpll_abe_m3x2_ck@1f4\ti,divider-clockB-8Jadpll_core_byp_mux@12c\ ti,mux-clockBi,dpll_core_ck@120\ti,omap4-dpll-core-clockB $,(dpll_core_x2_ck\ti,omap4-dpll-x2-clockBdpll_core_h12x2_ck@13c\ti,divider-clockB-?8<Jampu_dpll_hs_clk_div\fixed-factor-clockB#dpll_mpu_ck@160\ti,omap5-mpu-dpll-clockB`dlhdpll_mpu_m2_ck@170\ti,divider-clockB-8pJampu_dclk_div\fixed-factor-clockB#dsp_dpll_hs_clk_div\fixed-factor-clockB#dpll_dsp_byp_mux@240\ ti,mux-clockBi@dpll_dsp_ck@234\ti,omap4-dpll-clockB48@<#Fdpll_dsp_m2_ck@244\ti,divider-clockB-8DJa #F  iva_dpll_hs_clk_div\fixed-factor-clockB#!!dpll_iva_byp_mux@1ac\ ti,mux-clockB!i""dpll_iva_ck@1a0\ti,omap4-dpll-clockB"#Ep}@##dpll_iva_m2_ck@1b0\ti,divider-clockB#-8Ja$%$$iva_dclk\fixed-factor-clockB$#dpll_gpu_byp_mux@2e4\ ti,mux-clockBi%%dpll_gpu_ck@2d8\ti,omap4-dpll-clockB%&Ly@&&dpll_gpu_m2_ck@2e8\ti,divider-clockB&-8Ja'_(k''dpll_core_m2_ck@130\ti,divider-clockB-80Ja((core_dpll_out_dclk_div\fixed-factor-clockB(#dpll_ddr_byp_mux@21c\ ti,mux-clockBi))dpll_ddr_ck@210\ti,omap4-dpll-clockB)**dpll_ddr_m2_ck@220\ti,divider-clockB*-8 Jadpll_gmac_byp_mux@2b4\ ti,mux-clockBi++dpll_gmac_ck@2a8\ti,omap4-dpll-clockB+,,dpll_gmac_m2_ck@2b8\ti,divider-clockB,-8Javideo2_dclk_div\fixed-factor-clockB-#video1_dclk_div\fixed-factor-clockB.#hdmi_dclk_div\fixed-factor-clockB/#per_dpll_hs_clk_div\fixed-factor-clockB#^^usb_dpll_hs_clk_div\fixed-factor-clockB#bbeve_dpll_hs_clk_div\fixed-factor-clockB#00dpll_eve_byp_mux@290\ ti,mux-clockB0i11dpll_eve_ck@284\ti,omap4-dpll-clockB122dpll_eve_m2_ck@294\ti,divider-clockB2-8Ja33eve_dclk_div\fixed-factor-clockB3#dpll_core_h13x2_ck@140\ti,divider-clockB-?8@Jadpll_core_h14x2_ck@144\ti,divider-clockB-?8DJarrdpll_core_h22x2_ck@154\ti,divider-clockB-?8TJa;;dpll_core_h23x2_ck@158\ti,divider-clockB-?8XJa~~dpll_core_h24x2_ck@15c\ti,divider-clockB-?8\Jadpll_ddr_x2_ck\ti,omap4-dpll-x2-clockB*44dpll_ddr_h11x2_ck@228\ti,divider-clockB4-?8(Jadpll_dsp_x2_ck\ti,omap4-dpll-x2-clockB55dpll_dsp_m3x2_ck@248\ti,divider-clockB5-8HJa6ׄ66dpll_gmac_x2_ck\ti,omap4-dpll-x2-clockB,77dpll_gmac_h11x2_ck@2c0\ti,divider-clockB7-?8Ja88dpll_gmac_h12x2_ck@2c4\ti,divider-clockB7-?8Jadpll_gmac_h13x2_ck@2c8\ti,divider-clockB7-?8Jadpll_gmac_m3x2_ck@2bc\ti,divider-clockB7-8Jagmii_m_clk_div\fixed-factor-clockB8#hdmi_clk2_div\fixed-factor-clockB/#NNhdmi_div_clk\fixed-factor-clockB/#TTl3_iclk_div@100\ti,divider-clock-iBx  l4_root_clk_div\fixed-factor-clockB #  video1_clk2_div\fixed-factor-clockB9#LLvideo1_div_clk\fixed-factor-clockB9#RRvideo2_clk2_div\fixed-factor-clockB:#MMvideo2_div_clk\fixed-factor-clockB:#SSipu1_gfclk_mux@520\ ti,mux-clockB;i <;<<mcasp1_ahclkr_mux@550\ ti,mux-clock8B=>?@ABCDEFGHIJiPmcasp1_ahclkx_mux@550\ ti,mux-clock8B=>?@ABCDEFGHIJiPmcasp1_aux_gfclk_mux@550\ ti,mux-clockBKLMNiPtimer5_gfclk_mux@558\ ti,mux-clock0BOPDEFGHQRSTUiXtimer6_gfclk_mux@560\ ti,mux-clock0BOPDEFGHQRSTUi`timer7_gfclk_mux@568\ ti,mux-clock0BOPDEFGHQRSTUihtimer8_gfclk_mux@570\ ti,mux-clock0BOPDEFGHQRSTUipuart6_gfclk_mux@580\ ti,mux-clockBVWidummy_ck\ fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200\ti,omap4-dpll-clockB XXdpll_pcie_ref_m2ldo_ck@210\ti,divider-clockBX-8JaYYapll_pcie_in_clk_mux@4ae06118 ti,mux-clockBYZ\i[[apll_pcie_ck@21c\ti,dra7-apll-clockB[X \\optfclk_pciephy1_32khz@4a0093b0ti,gate-clockBP\ioptfclk_pciephy2_32khz@4a0093b8ti,gate-clockBP\ioptfclk_pciephy_div@4a00821cti,divider-clockB\\i-]]optfclk_pciephy1_clk@4a0093b0ti,gate-clockB\\i optfclk_pciephy2_clk@4a0093b8ti,gate-clockB\\i optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockB]\i optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockB]\i apll_pcie_clkvcoldo\fixed-factor-clockB\#apll_pcie_clkvcoldo_div\fixed-factor-clockB\#apll_pcie_m2_ck\fixed-factor-clockB\#dpll_per_byp_mux@14c\ ti,mux-clockB^iL__dpll_per_ck@140\ti,omap4-dpll-clockB_@DLH``dpll_per_m2_ck@150\ti,divider-clockB`-8PJaaafunc_96m_aon_dclk_div\fixed-factor-clockBa#dpll_usb_byp_mux@18c\ ti,mux-clockBbiccdpll_usb_ck@180\ti,omap4-dpll-j-type-clockBcdddpll_usb_m2_ck@190\ti,divider-clockBd-8Jaggdpll_pcie_ref_m2_ck@210\ti,divider-clockBX-8Jadpll_per_x2_ck\ti,omap4-dpll-x2-clockB`eedpll_per_h11x2_ck@158\ti,divider-clockBe-?8XJaffdpll_per_h12x2_ck@15c\ti,divider-clockBe-?8\Jajjdpll_per_h13x2_ck@160\ti,divider-clockBe-?8`Ja||dpll_per_h14x2_ck@164\ti,divider-clockBe-?8dJassdpll_per_m2x2_ck@150\ti,divider-clockBe-8PJaWWdpll_usb_clkdcoldo\fixed-factor-clockBd#iifunc_128m_clk\fixed-factor-clockBf#wwfunc_12m_fclk\fixed-factor-clockBW#func_24m_clk\fixed-factor-clockBa#??func_48m_fclk\fixed-factor-clockBW#VVfunc_96m_fclk\fixed-factor-clockBW#l3init_60m_fclk@104\ti,divider-clockBgclkout2_clk@6b0\ti,gate-clockBhil3init_960m_gfclk@6c0\ti,gate-clockBiinndss_32khz_clk@1120\ti,gate-clockBPi  dss_48mhz_clk@1120\ti,gate-clockBVi  dss_dss_clk@1120\ti,gate-clockBji dss_hdmi_clk@1120\ti,gate-clockBki  dss_video1_clk@1120\ti,gate-clockBli  dss_video2_clk@1120\ti,gate-clockBmi  gpio2_dbclk@1760\ti,gate-clockBPi`gpio3_dbclk@1768\ti,gate-clockBPihgpio4_dbclk@1770\ti,gate-clockBPipgpio5_dbclk@1778\ti,gate-clockBPixgpio6_dbclk@1780\ti,gate-clockBPigpio7_dbclk@1810\ti,gate-clockBPigpio8_dbclk@1818\ti,gate-clockBPimmc1_clk32k@1328\ti,gate-clockBPi(mmc2_clk32k@1330\ti,gate-clockBPi0mmc3_clk32k@1820\ti,gate-clockBPi mmc4_clk32k@1828\ti,gate-clockBPi(sata_ref_clk@1388\ti,gate-clockBiusb_otg_ss1_refclk960m@13f0\ti,gate-clockBniusb_otg_ss2_refclk960m@1340\ti,gate-clockBni@usb_phy1_always_on_clk32k@640\ti,gate-clockBPi@usb_phy2_always_on_clk32k@688\ti,gate-clockBPiusb_phy3_always_on_clk32k@698\ti,gate-clockBPiatl_dpll_clk_mux@c00\ ti,mux-clockBP9:/i ppatl_gfclk_mux@c00\ ti,mux-clock B opi rmii_50mhz_clk_mux@13d0\ ti,mux-clockB8qigmac_rft_clk_mux@13d0\ ti,mux-clockB9:o/ igpu_core_gclk_mux@1220\ ti,mux-clock Brs'i t'ttgpu_hyd_gclk_mux@1220\ ti,mux-clock Brs'i u'uul3instr_ts_gclk_div@e50\ti,divider-clockBviP  mcasp2_ahclkr_mux@1860\ ti,mux-clock8B=>?@ABCDEFGHIJi`mcasp2_ahclkx_mux@1860\ ti,mux-clock8B=>?@ABCDEFGHIJi`mcasp2_aux_gfclk_mux@1860\ ti,mux-clockBKLMNi`mcasp3_ahclkx_mux@1868\ ti,mux-clock8B=>?@ABCDEFGHIJihmcasp3_aux_gfclk_mux@1868\ ti,mux-clockBKLMNihmcasp4_ahclkx_mux@1898\ ti,mux-clock8B=>?@ABCDEFGHIJimcasp4_aux_gfclk_mux@1898\ ti,mux-clockBKLMNimcasp5_ahclkx_mux@1878\ ti,mux-clock8B=>?@ABCDEFGHIJixmcasp5_aux_gfclk_mux@1878\ ti,mux-clockBKLMNixmcasp6_ahclkx_mux@1904\ ti,mux-clock8B=>?@ABCDEFGHIJimcasp6_aux_gfclk_mux@1904\ ti,mux-clockBKLMNimcasp7_ahclkx_mux@1908\ ti,mux-clock8B=>?@ABCDEFGHIJimcasp7_aux_gfclk_mux@1908\ ti,mux-clockBKLMNimcasp8_ahclkx_mux@1890\ ti,mux-clock8B=>?@ABCDEFGHIJimcasp8_aux_gfclk_mux@1890\ ti,mux-clockBKLMNimmc1_fclk_mux@1328\ ti,mux-clockBwWi(xxmmc1_fclk_div@1328\ti,divider-clockBxi-(xmmc2_fclk_mux@1330\ ti,mux-clockBwWi0yymmc2_fclk_div@1330\ti,divider-clockByi-0xmmc3_gfclk_mux@1820\ ti,mux-clockBVWi zzmmc3_gfclk_div@1820\ti,divider-clockBzi- xmmc4_gfclk_mux@1828\ ti,mux-clockBVWi({{mmc4_gfclk_div@1828\ti,divider-clockB{i-(xqspi_gfclk_mux@1838\ ti,mux-clockBw|i8}}qspi_gfclk_div@1838\ti,divider-clockB}i-8xtimer10_gfclk_mux@1728\ ti,mux-clock,BOPDEFGHQRSTi(timer11_gfclk_mux@1730\ ti,mux-clock,BOPDEFGHQRSTi0timer13_gfclk_mux@17c8\ ti,mux-clock,BOPDEFGHQRSTitimer14_gfclk_mux@17d0\ ti,mux-clock,BOPDEFGHQRSTitimer15_gfclk_mux@17d8\ ti,mux-clock,BOPDEFGHQRSTitimer16_gfclk_mux@1830\ ti,mux-clock,BOPDEFGHQRSTi0timer2_gfclk_mux@1738\ ti,mux-clock,BOPDEFGHQRSTi8timer3_gfclk_mux@1740\ ti,mux-clock,BOPDEFGHQRSTi@timer4_gfclk_mux@1748\ ti,mux-clock,BOPDEFGHQRSTiHtimer9_gfclk_mux@1750\ ti,mux-clock,BOPDEFGHQRSTiPuart1_gfclk_mux@1840\ ti,mux-clockBVWi@uart2_gfclk_mux@1848\ ti,mux-clockBVWiHuart3_gfclk_mux@1850\ ti,mux-clockBVWiPuart4_gfclk_mux@1858\ ti,mux-clockBVWiXuart5_gfclk_mux@1870\ ti,mux-clockBVWipuart7_gfclk_mux@18d0\ ti,mux-clockBVWiuart8_gfclk_mux@18e0\ ti,mux-clockBVWiuart9_gfclk_mux@18e8\ ti,mux-clockBVWivip1_gclk_mux@1020\ ti,mux-clockB ~i vip2_gclk_mux@1028\ ti,mux-clockB ~i(vip3_gclk_mux@1030\ ti,mux-clockB ~i0clockdomainscoreaon_clkdmti,clockdomainBdl4@4ae00000ti,dra7-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110\ ti,mux-clockBJabe_dpll_sys_clk_mux@118\ ti,mux-clockBDabe_dpll_bypass_clk_mux@114\ ti,mux-clockBPabe_dpll_clk_mux@10c\ ti,mux-clockBP abe_24m_fclk@11c\ti,divider-clockB==aess_fclk@178\ti,divider-clockBx-abe_giclk_div@174\ti,divider-clockBt-QQabe_lp_clk_div@1d8\ti,divider-clockB abe_sys_clk_div@120\ti,divider-clockB ->>adc_gfclk_mux@1dc\ ti,mux-clock BDPsys_clk1_dclk_div@1c8\ti,divider-clockB-@xsys_clk2_dclk_div@1cc\ti,divider-clockBD-@xper_abe_x1_dclk_div@1bc\ti,divider-clockBo-@xdsp_gclk_div@18c\ti,divider-clockB -@xgpu_dclk@1a0\ti,divider-clockB'-@xemif_phy_dclk_div@190\ti,divider-clockB-@xgmac_250m_dclk_div@19c\ti,divider-clockB-@xgmac_main_clk\fixed-factor-clockB#l3init_480m_dclk_div@1ac\ti,divider-clockBg-@xusb_otg_dclk_div@184\ti,divider-clockB-@xsata_dclk_div@1c0\ti,divider-clockB-@xpcie2_dclk_div@1b8\ti,divider-clockB-@xpcie_dclk_div@1b4\ti,divider-clockB-@xemu_dclk_div@194\ti,divider-clockB-@xsecure_32k_dclk_div@1c4\ti,divider-clockB-@xclkoutmux0_clk_mux@158\ ti,mux-clockXBXUUclkoutmux1_clk_mux@15c\ ti,mux-clockXB\clkoutmux2_clk_mux@160\ ti,mux-clockXB`hhcustefuse_sys_gfclk_div\fixed-factor-clockB#eve_clk@180\ ti,mux-clockB36hdmi_dpll_clk_mux@164\ ti,mux-clockBDdkkmlb_clk@134\ti,divider-clockB-@4xIImlbp_clk@130\ti,divider-clockB-@0xJJper_abe_x1_gfclk2_div@138\ti,divider-clockBo-@8xKKtimer_sys_clk_div@144\ti,divider-clockBD-OOvideo1_dpll_clk_mux@168\ ti,mux-clockBDhllvideo2_dpll_clk_mux@16c\ ti,mux-clockBDlmmwkupaon_iclk_mux@108\ ti,mux-clockBvvgpio1_dbclk@1838\ti,gate-clockBPi8dcan1_sys_clk_mux@1888\ ti,mux-clockBDitimer1_gfclk_mux@1840\ ti,mux-clock,BOPDEFGHQRSTi@uart10_gfclk_mux@1880\ ti,mux-clockBVWiclockdomainsscm_conf@c000sysconaxi@0 simple-busQQ0 pcie@51000000 ti,dra7-pcieQ Q L rc_dbicsti_confconfig"pci00 00pcie1 pcie-phy0'`:interrupt-controlleraxi@1 simple-busQQ00 Hdisabledpcie@51800000 ti,dra7-pcieQ Q L rc_dbicsti_confconfigcd"pci00000pcie2 pcie-phy0'`:interrupt-controllerocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000 Hdisabled mmio-sram@@ @@ocmcram@40500000 Hdisabled mmio-sram@P @Pbandgap@4a0021e00J! J#, J#,J#txrxHokaydefault  " +mmc@480b4000ti,omap4-hsmmcH @ Qmmc2/0txrxHokaydefault 4Emmc@480ad000ti,omap4-hsmmcH  Ymmc3MNtxrx Hdisabledmmc@480d1000ti,omap4-hsmmcH  [mmc49:txrx Hdisabledmmu@40d01000ti,dra7-dsp-iommu@  mmu0_dsp1\i Hdisabledmmu@40d02000ti,dra7-dsp-iommu@   mmu1_dsp1\i Hdisabledmmu@58882000ti,dra7-iommuX   mmu_ipu1\} Hdisabledmmu@55082000ti,dra7-iommuU   mmu_ipu2\} Hdisabledregulator-abb-mpu ti,abb-v3abb_mpuB2(J}J}J`J; JXDsetup-addresscontrol-addressint-addressefuse-addressldo-addressH,@vregulator-abb-ivahd ti,abb-v3 abb_ivahdB2(J~4J~$J`J% J$pDsetup-addresscontrol-addressint-addressefuse-addressldo-address@H0regulator-abb-dspeve ti,abb-v3 abb_dspeveB2(J~0J~ J`J% J$lDsetup-addresscontrol-addressint-addressefuse-addressldo-address H0regulator-abb-gpu ti,abb-v3abb_gpuB2(J}J}J`J; JTDsetup-addresscontrol-addressint-addressefuse-addressldo-addressHvspi@48098000ti,omap4-mcspiH  <mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3 Hdisabledspi@4809a000ti,omap4-mcspiH  =mcspi2 +,-.tx0rx0tx1rx1 Hdisabledspi@480b8000ti,omap4-mcspiH  Vmcspi3tx0rx0 Hdisabledspi@480ba000ti,omap4-mcspiH  +mcspi4FGtx0rx0 Hdisabledqspi@4b300000ti,dra7xxx-qspiK0\qspi_baseqspi_mmapXqspiBIfck  WHokaydefault&lspi_flash@0spansion,m25p80jedec,spi-nor&lpartition@08uboot partition@c00008uboot environment partition@100000 8reservedads7846@0default ti,ads7846>&`& IV_hqz ocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4A096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrltBIsysclkrefclkpciephy@4a094000ti,phy-pipe3-pcieJ @J Ddphy_rxphy_txBXY];Idpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclkpciephy@4a095000ti,phy-pipe3-pcieJ PJ Tdphy_rxphy_tx BXY];Idpll_refdpll_ref_m2wkupclkrefclkdiv-clkphy-divsysclk Hdisabledsata@4a141100snps,dwc-ahciJJ 1 sata-phyBsataHokayrtc@48838000ti,am3352-rtcHrtcssBPocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1phy@4a084000ti,dra7x-usb2ti,omap-usb2J@BIwkupclkrefclkphy@4a085000 ti,dra7x-usb2-phy2ti,omap-usb2JPtBIwkupclkrefclkphy@4a084400 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Hdisabledthermal-zonescpu_thermal J ` n ~tripscpu_alert  )passivecpu_crit   )criticalcooling-mapsmap0  gpu_thermal J ` n ~tripsgpu_crit H  )criticalcore_thermal J ` n ~tripscore_crit H  )criticaldspeve_thermal J ` n ~tripsdspeve_crit H  )criticaliva_thermal J ` n ~tripsiva_crit H  )criticalpmuarm,cortex-a15-pmu&memory@0"memory leds gpio-ledsdefaultled08cl-som-am57x:green % heartbeat offfixedregulator-vdd_3v3regulator-fixedvdd_3v3,2ZD2Zfixedregulator-ads7846-regregulator-fixed ads7846-reg,2ZD2Zsound0simple-audio-card CL-SOM-AM57x-Sound-Card i2s  ,C KHeadphoneHeadphone JackMicrophoneMicrophone JackLineLine Jackf eHeadphone JackRHPOUTHeadphone JackLHPOUTLLINEINLine JackMICINMic BiasMic BiasMicrophone Jacksimple-audio-card,cpu simple-audio-card,codec  fixedregulator-v3_3regulator-fixedvsb_3v3,2ZD2Zp display!startek,startek-kd050cpanel-dpi8lcddefault    panel-timing@    ( ( +     # 0 :portendpoint $  4connectorhdmi-connector8hdmi)adefault  J portendpoint $ #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0display0display1interruptsinterrupt-controller#interrupt-cellsreglinux,phandledevice_typeoperating-points-v2clocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-tolerancesysconopp-sharedopp-hzopp-microvoltopp-supported-hwopp-suspendti,hwmodsrangesinterrupts-extendedregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shift#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoassigned-clocksassigned-clock-ratesassigned-clock-parentsti,dividersti,set-rate-parentreg-namesbus-rangenum-laneslinux,pci-domainphysphy-namesinterrupt-map-maskinterrupt-mapstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsti,no-reset-on-initdmasdma-namespinctrl-namespinctrl-0#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellsti,system-power-controllerregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondspagesize#sound-dai-cellsti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-gpioswp-gpiosti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectsspi-max-frequencylabelvcc-supplypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repsyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsports-implementedphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkgpmc,num-csgpmc,num-waitpinsti,provided-clockspinctrl-1op-modetdm-slotsserial-dirti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpointdata-lines#pwm-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicelinux,default-triggerdefault-statesimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-daisystem-clock-frequencyenable-active-highenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpios