Y8T(T!,rikomagic,mk808rockchip,rk3066a7Rikomagic MK808aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/dwmmc@1021c000f/dwmmc@10214000l/dwmmc@10218000r/serial@10124000z/serial@10126000/serial@20064000/serial@20068000/spi@20070000/spi@20074000amba ,simple-busdma-controller@20018000,arm,pl330arm,primecell @ apb_pclkdma-controller@2001c000,arm,pl330arm,primecell @ apb_pclk disableddma-controller@20078000,arm,pl330arm,primecell @ apb_pclk oscillator ,fixed-clockn6 xin24mgpu@10090000",rockchip,rk3066-maliarm,mali-400  corebus*:Ox disabledx5Vgpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3fl2-cache-controller@10138000,arm,pl310-cachet/scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer   local-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gicserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart@ "baudclkapb_pclk@L disabledtxrxdefaultserial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart` #baudclkapb_pclkAM disabledtxrxdefaultqos@1012d000,syscon qos@1012e000,syscon qos@1012f000,syscon qos@1012f080,syscon qos@1012f100,syscon qos@1012f180,syscon qos@1012f200,syscon qos@1012f280,syscon usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg @@ * /usb2-phyokayusb@101c0000 ,snps,dwc2 otghost* /usb2-phyokayethernet@10204000,rockchip,rk3066-emac @< 9 D hclkmacrefFdPrmii disableddwmmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciu rx-txYOQdresetokaypdefault ~dwmmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciu rx-txYORdresetokaydefault ~dwmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciu rx-txYOSdreset disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @reboot-mode,syscon-reboot-mode@RBRBRB RBpower-controller!,rockchip,rk3066-power-controllerpd_vio@7POpd_video@6 pd_gpu@8grf@20008000,syscon  i2c@2002d000,rockchip,rk3066-i2c  (9 i2cP disableddefaulti2c@2002f000,rockchip,rk3066-i2c  )9 Qi2c disableddefaultpwm@20030000,rockchip,rk2928-pwm F disableddefaultpwm@20030010,rockchip,rk2928-pwm F disableddefaultwatchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3okaypwm@20050020,rockchip,rk2928-pwm  G disableddefault pwm@20050030,rockchip,rk2928-pwm 0G disableddefault!i2c@20056000,rockchip,rk3066-i2c ` *9 Ri2c disableddefault"i2c@2005a000,rockchip,rk3066-i2c  +9 Si2c disableddefault#i2c@2005e000,rockchip,rk3066-i2c  49 Ti2c disableddefault$serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart @ $baudclkapb_pclkBNokay  txrxdefault%serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart  %baudclkapb_pclkCO disabled  txrxdefault&saradc@2006c000,rockchip,saradc  (GJsaradcapb_pclkOW dsaradc-apb disabledspi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk &  txrx disableddefault'()*spi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @ txrx disableddefault+,-.cpus:rockchip,rk3066-smpcpu@0Hcpu,arm,cortex-a9T/8e@ Oa* s* 'g8v@cpu@1Hcpu,arm,cortex-a9T/display-subsystem,rockchip,display-subsystem01sram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3066-vop aclk_vopdclk_vophclk_vopfOdef daxiahbdclkokayport0endpoint@026vop@1010e000,rockchip,rk3066-vop aclk_vopdclk_vophclk_vopfOghi daxiahbdclk disabledport1endpoint@037hdmi@10116000,rockchip,rk3066-hdmi`  @hclkdefault45f9 okayportsport@0endpoint@062endpoint@17 disabled3port@1endpoint8?i2s@10118000,rockchip,rk3066-i2s  default9txrxi2s_hclki2s_clkK disabledi2s@1011a000,rockchip,rk3066-i2s  default:txrxi2s_hclki2s_clkL disabledi2s@1011c000,rockchip,rk3066-i2s  default;  txrxi2s_hclki2s_clkM disabledclock-controller@20000000,rockchip,rk3066a-cru 9  @*^_ :ׄ#gрxhрxhtimer@2000e000,snps,dw-apb-timer-osc  .VD timerpclkefuse@20010000,rockchip,rk3066a-efuse @[ pclk_efusecpu_leakage@17timer@20038000,snps,dw-apb-timer-osc  ,TB timerpclktimer@2003a000,snps,dw-apb-timer-osc  -UC timerpclktsadc@20060000,rockchip,rk3066-tsadc ]]saradcapb_pclk (O\ dsaradc-apb disabledphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phy9 okayusb-phy@17c|Qphyclk usb-phy@188Rphyclk pinctrl,rockchip,rk3066a-pinctrl9 gpio0@20034000,rockchip,gpio-bank @ 6U>gpio1@2003c000,rockchip,gpio-bank  7Vgpio2@2003e000,rockchip,gpio-bank  8Wgpio3@20080000,rockchip,gpio-bank  9XCgpio4@20084000,rockchip,gpio-bank @ :Ygpio6@2000a000,rockchip,gpio-bank  <Zpcfg_pull_default=pcfg_pull_none*<emacemac-xfer7<<<<<<<<emac-mdio 7<<emmcemmc-clk7=emmc-cmd7 =emmc-rst7 =hdmihdmi-hpd7=5hdmii2c-xfer 7<<4i2c0i2c0-xfer 7<<i2c1i2c1-xfer 7<<i2c2i2c2-xfer 7<<"i2c3i2c3-xfer 7<<#i2c4i2c4-xfer 7<<$pwm0pwm0-out7<pwm1pwm1-out7<pwm2pwm2-out7< pwm3pwm3-out7<!spi0spi0-clk7='spi0-cs07=*spi0-tx7=(spi0-rx7=)spi0-cs17=spi1spi1-clk7=+spi1-cs07=.spi1-rx7=-spi1-tx7=,spi1-cs17=uart0uart0-xfer 7==uart0-cts7=uart0-rts7=uart1uart1-xfer 7==uart1-cts7=uart1-rts7=uart2uart2-xfer 7= =%uart3uart3-xfer 7==&uart3-cts7=uart3-rts7=sd0sd0-clk7= sd0-cmd7 = sd0-cd7= sd0-wp7=sd0-bus-width17 =sd0-bus-width4@7 = = = =sd1sd1-clk7=sd1-cmd7=sd1-cd7=sd1-wp7=sd1-bus-width17=sd1-bus-width4@7====i2s0i2s0-bus7== = = = = ===9i2s1i2s1-bus`7======:i2s2i2s2-bus`7======;usb-hosthost-drv7=@usb-otgotg-drv7=Bsdmmcsdmmc-pwr7=Dsdiowifi-pwr7<EchosenEserial2:115200n8memory@60000000`@Hmemorygpio-leds ,gpio-ledsblueQmk808:blue:power W>]off kdefault-onhdmi_con,hdmi-connectorOcportendpoint?8vcc-io,regulator-fixedvcc_io2Z2ZAusb-host-regulator,regulator-fixed >@default host-pwrLK@LK@Ausb-otg-regulator,regulator-fixed >Bdefaultvcc_otgLK@LK@Asdmmc-regulator,regulator-fixed CDdefaultvcc_sd2Z2ZAsdio-regulator,regulator-fixed CEdefault vcc_wifi2Z2ZA #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1rangesreginterrupts#dma-cellsarm,pl330-broken-no-flushpclocksclock-namesphandlestatusclock-frequency#clock-cellsclock-output-namesassigned-clocksassigned-clock-ratesresetsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modefifo-depthreset-namesmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeedvmmc-supplynon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencyportsremote-endpointrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsstdout-pathlabelgpiosdefault-statelinux,default-triggerregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpioregulator-always-onstartup-delay-usvin-supply