8`( i(*rockchip,rk3288-evb-rk808rockchip,rk3288&aliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!@/6rP \cpu@501cpuarm,cortex-a12!@/6r\cpu@502cpuarm,cortex-a12!@/6r\cpu@503cpuarm,cortex-a12!@/6r\cpu-opp-tableoperating-points-v2d\opp-126000000ov opp-216000000o v opp-312000000ov opp-408000000oQv opp-600000000o#Fv opp-696000000o)|v~opp-816000000o0,vB@opp-1008000000o<vopp-1200000000oGvopp-1416000000oTfrvOopp-1512000000oZJv opp-1608000000o_"vpamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@/ apb_pclk\dma-controller@ff600000arm,pl330arm,primecell`@/ apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@/ apb_pclk\Wreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24m\ timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H / a timerpclkdisplay-subsystemrockchip,display-subsystem/ dwmmc@ff0c0000rockchip,rk3288-dw-mshc5р /Drvbiuciuciu-driveciu-sampleC  @NresetokayZdvdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc5р /Eswbiuciuciu-driveciu-sampleC ! @Nreset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc5р /Ftxbiuciuciu-driveciu-sampleC "@Nreset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc5р /Guybiuciuciu-driveciu-sampleC #@NresetokayZddefaultsaradc@ff100000rockchip,saradc $/I[saradcapb_pclkW Nsaradc-apbokay\{spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi/ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi/BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi/CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c/Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c/Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c/Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c/Qdefault(okay\nserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7/MUbaudclkapb_pclkdefault)okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8/NVbaudclkapb_pclkdefault*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9/OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :/PXbaudclkapb_pclkdefault,okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;/QYbaudclkapb_pclkdefault-okaythermal-zonesreserve_thermal'=K.cpu_thermal'd=K.tripscpu_alert0[pgpassive\/cpu_alert1[$gpassive\0cpu_crit[_g criticalcooling-mapsmap0r/0wmap1r00wgpu_thermal'd=K.tripsgpu_alert0[pgpassive\1gpu_crit[_g criticalcooling-mapsmap0r1 w2tsadc@ff280000rockchip,rk3288-tsadc( %/HZtsadcapb_pclk Ntsadc-apbinitdefaultsleep3435sokay\.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq58/fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Nstmmacethok6!rgmii*input 77G ]'B@r8default90usb@ff500000 generic-ehciP /usbhost:usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T /otghost; usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X /otgotg@@ < usb2-phy disabledusb@ff5c0000 generic-ehci\ /usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c/Ldefault=okaypmic@1brockchip,rk808&>default?@ *xin32krk808-clkout28ADAPA\AhAtABBABCregulatorsDCDC_REG1 q p"vdd_arm\ regulator-state-mem1DCDC_REG2 P "vdd_gpu\sregulator-state-memJbB@DCDC_REG3"vcc_ddrregulator-state-memJDCDC_REG42Z 2Z"vcc_io\Bregulator-state-memJb2ZLDO_REG12Z 2Z "vccio_pmu\Cregulator-state-memJb2ZLDO_REG22Z 2Z"vcc_tpregulator-state-mem1LDO_REG3B@ B@"vdd_10regulator-state-memJbB@LDO_REG4w@ w@ "vcc18_lcdregulator-state-memJbw@LDO_REG5w@ 2Z "vccio_sd\regulator-state-memJb2ZLDO_REG6B@ B@ "vdd10_lcdregulator-state-memJbB@LDO_REG7w@ w@"vcc_18\regulator-state-memJbw@LDO_REG82Z 2Z "vcca_codecregulator-state-memJb2ZSWITCH_REG1"vcc_wlregulator-state-memJSWITCH_REG2"vcc_lcd\regulator-state-memJi2c@ff660000rockchip,rk3288-i2cf =i2c/NdefaultD disabledpwm@ff680000rockchip,rk3288-pwmh~defaultE/_pwmokay\~pwm@ff680010rockchip,rk3288-pwmh~defaultF/_pwm disabledpwm@ff680020rockchip,rk3288-pwmh ~defaultG/_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0~defaultH/_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds\power-controller!rockchip,rk3288-power-controllerrh \Zpd_vio@9 /chgfdehilkj$IJKLMNOPQpd_hevc@11 /opRSpd_video@12 /Tpd_gpu@13 /UVreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5Hrjk$#gׄeрxhрxh\syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdw\5edp-phyrockchip,rk3288-dp-phy/h24mokay\jio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320 /]phyclk Nphy-reset\<usb-phy@3344/^phyclk Nphy-reset\:usb-phy@348H/_phyclk Nphy-reset\;watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk/TWtx 6defaultX5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5WWtxrxi2s_hclki2s_clk/RdefaultY: disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 /}aclkhclksclkapb_pclk Ncrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu/ aclkifaceT disablediommu@ff914000rockchip,iommu @P isp_mmu/ aclkifaceTa disabledrga@ff920000rockchip,rk3288-rga /jaclkhclksclk|Z ilm Ncoreaxiahbvop@ff930000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vop|Z def Naxiahbdclk[okayport\ endpoint@0\\oendpoint@1]\kendpoint@2^\eendpoint@3_\hiommu@ff930300rockchip,iommu  vopb_mmu/ aclkiface|Z Tokay\[vop@ff940000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vop|Z  Naxiahbdclk`okayport\ endpoint@0a\pendpoint@1b\lendpoint@2c\fendpoint@3d\iiommu@ff940300rockchip,iommu  vopl_mmu/ aclkiface|Z Tokay\`mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ /~d refpclk|Z 5 disabledportsportendpoint@0e\^endpoint@1f\clvds@ff96c000rockchip,rk3288-lvds@/g pclk_lvdslcdcg|Z 5 disabledportsport@0endpoint@0h\_endpoint@1i\ddp@ff970000rockchip,rk3288-dp@ b/icdppclkjdpoNdp5okayportsport@0endpoint@0k\]endpoint@1l\bport@1endpoint@0m\hdmi@ff980000rockchip,rk3288-dw-hdmi5 g/hmniahbisfrcec|Z okaynportsportendpoint@0o\\endpoint@1p\avideo-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu/ aclkhclkq|Z iommu@ff9a0800rockchip,iommu vpu_mmu/ aclkifaceT|Z \qiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu/ aclkifaceT disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu/r|Z okays\2gpu-opp-tableoperating-points-v2\ropp-100000000ov~opp-200000000o v~opp-300000000ovB@opp-400000000oׄvopp-600000000o#Fvqos@ffaa0000syscon \Uqos@ffaa0080syscon \Vqos@ffad0000syscon \Jqos@ffad0100syscon \Kqos@ffad0180syscon \Lqos@ffad0400syscon \Mqos@ffad0480syscon \Nqos@ffad0500syscon \Iqos@ffad0800syscon \Oqos@ffad0880syscon \Pqos@ffad0900syscon \Qqos@ffae0000syscon \Tqos@ffaf0000syscon \Rqos@ffaf0080syscon \Sefuse@ffb40000rockchip,rk3288-efuse /q pclk_efusecpu_leakage@17interrupt-controller@ffc01000 arm,gic-400@ @ `   \pinctrlrockchip,rk3288-pinctrl5gpio0@ff750000rockchip,gpio-banku Q/@\>gpio1@ff780000rockchip,gpio-bankx R/Agpio2@ff790000rockchip,gpio-banky S/Bgpio3@ff7a0000rockchip,gpio-bankz T/Cgpio4@ff7b0000rockchip,gpio-bank{ U/D\7gpio5@ff7c0000rockchip,gpio-bank| V/Egpio6@ff7d0000rockchip,gpio-bank} W/Fgpio7@ff7e0000rockchip,gpio-bank~ X/G\|gpio8@ff7f0000rockchip,gpio-bank Y/Hhdmihdmi-cec-c0thdmi-cec-c7thdmi-ddc tthdmi-ddc-unwedge utpcfg-output-low\upcfg-pull-up\vpcfg-pull-down+\wpcfg-pull-none:\tpcfg-pull-none-12ma:G \zsleepglobal-pwrofft\@ddrio-pwrofftddr0-retentionvddr1-retentionvedpedp-hpd wi2c0i2c0-xfer tt\=i2c1i2c1-xfer tt\%i2c2i2c2-xfer  t t\Di2c3i2c3-xfer tt\&i2c4i2c4-xfer tt\'i2c5i2c5-xfer tt\(i2s0i2s0-bus`tttttt\Ylcdclcdc-ctl@tttt\gsdmmcsdmmc-clkx\ sdmmc-cmdy\sdmmc-cdv\sdmmc-bus1vsdmmc-bus4@yyyy\sdmmc-pwr t\sdio0sdio0-bus1vsdio0-bus4@vvvvsdio0-cmdvsdio0-clktsdio0-cdvsdio0-wpvsdio0-pwrvsdio0-bkpwrvsdio0-intvsdio1sdio1-bus1vsdio1-bus4@vvvvsdio1-cdvsdio1-wpvsdio1-bkpwrvsdio1-intvsdio1-cmdvsdio1-clktsdio1-pwr vemmcemmc-clkt\emmc-cmdv\emmc-pwr v\emmc-bus1vemmc-bus4@vvvvemmc-bus8vvvvvvvv\spi0spi0-clk v\spi0-cs0 v\spi0-txv\spi0-rxv\spi0-cs1vspi1spi1-clk v\spi1-cs0 v\ spi1-rxv\spi1-txv\spi2spi2-cs1vspi2-clkv\!spi2-cs0v\$spi2-rxv\#spi2-tx v\"uart0uart0-xfer vt\)uart0-ctsvuart0-rtstuart1uart1-xfer v t\*uart1-cts vuart1-rts tuart2uart2-xfer vt\+uart3uart3-xfer vt\,uart3-cts vuart3-rts tuart4uart4-xfer vt\-uart4-cts vuart4-rts ttsadcotp-gpio t\3otp-out t\4pwm0pwm0-pint\Epwm1pwm1-pint\Fpwm2pwm2-pint\Gpwm3pwm3-pint\Hgmacrgmii-pinsttttzzzzttt zztt\9rmii-pinsttttttttttspdifspdif-tx t\Xpcfg-pull-none-drv-8maG\xpcfg-pull-up-drv-8maG\ybacklightbl-ent\}buttonspwrbtnv\lcdlcd-cst\pmicpmic-intv\?usbhost-vbus-drvt\eth_phyeth-phy-pwrt\memory@0memoryadc-keys adc-keysV{bbuttonssw@button-up Volume Upsbutton-down Volume DownrmenuMenu escEscB@homeHomef backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ |default}~B@\external-gmac-clock fixed-clocksY@ ext_gmac\8panellg,lp079qx1-sp0vsimple-panel |portsportendpoint\mgpio-keys gpio-keys defaultpower >tGPIO Key Power * (dvcc-host-regulatorregulator-fixed : B>default "vcc_hostvcc-phy-regulatorregulator-fixed : B>default"vcc_phy2Z 2Z\6vsys-regulatorregulator-fixed"vcc_sysLK@ LK@\Asdmmc-regulatorregulator-fixed B| default"vcc_sd2Z 2Z M ^B\ #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,input-typedebounce-intervalenable-active-highstartup-delay-usvin-supply