8(t'rockchip,rk3288-fennecrockchip,rk3288&7Rockchip RK3288 Fennec Boardaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|pamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkbdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkbSreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem5 dwmmc@ff0c0000rockchip,rk3288-dw-mshc;р 5Drvbiuciuciu-driveciu-sampleI  @Treset disableddwmmc@ff0d0000rockchip,rk3288-dw-mshc;р 5Eswbiuciuciu-driveciu-sampleI ! @Treset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc;р 5Ftxbiuciuciu-driveciu-sampleI "@Treset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc;р 5Guybiuciuciu-driveciu-sampleI #@Tresetokay`j|default saradc@ff100000rockchip,saradc $5I[saradcapb_pclkW Tsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault  disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault! disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkdefault" disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkdefault# disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkdefault$okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkdefault% disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkdefault& disabledthermal-zonesreserve_thermal'cpu_thermald'tripscpu_alert0ppassiveb(cpu_alert1$passiveb)cpu_crit_ criticalcooling-mapsmap0%(0*map1%)0*gpu_thermald'tripsgpu_alert0ppassiveb*gpu_crit_ criticalcooling-mapsmap0%* *+tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk Ttsadc-apbinitdefaultsleep,9-C,Mc.ps disabledb'ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqc.85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Tstmmacethokay/inputdefault01234rgmii 'B@  50#usb@ff500000 generic-ehciP 5usbhost,61usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otg;host,7 1usb2-phyCokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otg;otgZl{@@ ,8 1usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhostokayi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault9okaypmic@1brockchip,rk808&:xin32krk808-clkout2default;<======> >>&>3>@>regulatorsDCDC_REG1Mas qpvdd_armb regulator-state-memDCDC_REG2Mas Pvdd_gpubmregulator-state-memB@DCDC_REG3Mavcc_ddrregulator-state-memDCDC_REG4Mas2Z2Zvcc_iob>regulator-state-mem2ZLDO_REG1Mas2Z2Z vccio_pmuregulator-state-mem2ZLDO_REG2Mas2Z2Zvcca_33regulator-state-memLDO_REG3MasB@B@vdd_10regulator-state-memB@LDO_REG4Masw@w@vcc_wlregulator-state-memw@LDO_REG5Masw@2Z vccio_sdregulator-state-mem2ZLDO_REG6MasB@B@ vdd10_lcdregulator-state-memB@LDO_REG7Masw@w@vcc_18regulator-state-memw@LDO_REG8Masw@w@ vcc18_lcdregulator-state-memw@SWITCH_REG1Mavcc_sdregulator-state-memSWITCH_REG2Mavcc_lanb4regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5Ndefault? disabledpwm@ff680000rockchip,rk3288-pwmhdefault@5_pwm disabledpwm@ff680010rockchip,rk3288-pwmhdefaultA5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultB5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultC5_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controller h bVpd_vio@9 5chgfdehilkj$DEFGHIJKLpd_hevc@11 5opMNpd_video@12 5Opd_gpu@13 5PQreboot-modesyscon-reboot-mode%,RB8RBFRB VRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvc.bHjk$o#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb.edp-phyrockchip,rk3288-dp-phy5h24m disabledbfio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokaydefaultR :usb-phy@320 5]phyclk Tphy-resetb8usb-phy@33445^phyclk Tphy-resetb6usb-phy@348H5_phyclk Tphy-resetb7watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p O disabledsound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk5TStx 6defaultTc. disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5SStxrxi2s_hclki2s_clk5RdefaultU disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk Tcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk V ilm Tcoreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop V def TaxiahbdclkWokayportb endpoint@0!Xbiendpoint@1!Ybgendpoint@2!Zbaendpoint@3![bdiommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface V okaybWvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop V  Taxiahbdclk\okayportb endpoint@0!]bjendpoint@1!^bhendpoint@2!_bbendpoint@3!`beiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface V okayb\mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk V c. disabledportsportendpoint@0!abZendpoint@1!bb_lvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcc V c. disabledportsport@0endpoint@0!db[endpoint@1!eb`dp@ff970000rockchip,rk3288-dp@ b5icdppclk,f1dpoTdpc. disabledportsport@0endpoint@0!gbYendpoint@1!hb^hdmi@ff980000rockchip,rk3288-dw-hdmic. g5hmniahbisfrcec V okayportsportendpoint@0!ibXendpoint@1!jb]video-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkk V iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface V bkiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5l V okay1mb+gpu-opp-tableoperating-points-v2blopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bPqos@ffaa0080syscon bQqos@ffad0000syscon bEqos@ffad0100syscon bFqos@ffad0180syscon bGqos@ffad0400syscon bHqos@ffad0480syscon bIqos@ffad0500syscon bDqos@ffad0800syscon bJqos@ffad0880syscon bKqos@ffad0900syscon bLqos@ffae0000syscon bOqos@ffaf0000syscon bMqos@ffaf0080syscon bNefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17interrupt-controller@ffc01000 arm,gic-400=R@ @ `   bpinctrlrockchip,rk3288-pinctrlc.gpio0@ff750000rockchip,gpio-banku Q5@cs=Rb:gpio1@ff780000rockchip,gpio-bankx R5Acs=Rgpio2@ff790000rockchip,gpio-banky S5Bcs=Rgpio3@ff7a0000rockchip,gpio-bankz T5Ccs=Rgpio4@ff7b0000rockchip,gpio-bank{ U5Dcs=Rb5gpio5@ff7c0000rockchip,gpio-bank| V5Ecs=Rgpio6@ff7d0000rockchip,gpio-bank} W5Fcs=Rgpio7@ff7e0000rockchip,gpio-bank~ X5Gcs=Rgpio8@ff7f0000rockchip,gpio-bank Y5Hcs=Rhdmihdmi-cec-c0nhdmi-cec-c7nhdmi-ddc nnhdmi-ddc-unwedge onpcfg-output-lowbopcfg-pull-upbppcfg-pull-downbqpcfg-pull-nonebnpcfg-pull-none-12ma brsleepglobal-pwroffnb<ddrio-pwroffnddr0-retentionpddr1-retentionpedpedp-hpd qi2c0i2c0-xfer nnb9i2c1i2c1-xfer nnbi2c2i2c2-xfer  n nb?i2c3i2c3-xfer nnbi2c4i2c4-xfer nnb i2c5i2c5-xfer nnb!i2s0i2s0-bus`nnnnnnbUlcdclcdc-ctl@nnnnbcsdmmcsdmmc-clknsdmmc-cmdpsdmmc-cdpsdmmc-bus1psdmmc-bus4@ppppsdio0sdio0-bus1psdio0-bus4@ppppsdio0-cmdpsdio0-clknsdio0-cdpsdio0-wppsdio0-pwrpsdio0-bkpwrpsdio0-intpsdio1sdio1-bus1psdio1-bus4@ppppsdio1-cdpsdio1-wppsdio1-bkpwrpsdio1-intpsdio1-cmdpsdio1-clknsdio1-pwr pemmcemmc-clknb emmc-cmdpbemmc-pwr pbemmc-bus1pemmc-bus4@ppppemmc-bus8ppppppppbspi0spi0-clk pbspi0-cs0 pbspi0-txpbspi0-rxpbspi0-cs1pspi1spi1-clk pbspi1-cs0 pbspi1-rxpbspi1-txpbspi2spi2-cs1pspi2-clkpbspi2-cs0pbspi2-rxpbspi2-tx pbuart0uart0-xfer pnb"uart0-ctspuart0-rtsnuart1uart1-xfer p nb#uart1-cts puart1-rts nuart2uart2-xfer pnb$uart3uart3-xfer pnb%uart3-cts puart3-rts nuart4uart4-xfer pnb&uart4-cts puart4-rts ntsadcotp-gpio nb,otp-out nb-pwm0pwm0-pinnb@pwm1pwm1-pinnbApwm2pwm2-pinnbBpwm3pwm3-pinnbCgmacrgmii-pinsnnnnrrrrnnn rrnnb0rmii-pinsnnnnnnnnnnphy-int pb3phy-pmebpb2phy-rstsb1spdifspdif-tx nbTpcfg-output-highbspcfg-pull-none-drv-8mapcfg-pull-up-drv-8mapmicpmic-intpb;usbphyhost-drvnbRmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacb/vsys-regulatorregulator-fixedvcc_syssLK@LK@Mab= #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeednon-removablepinctrl-namespinctrl-0#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-tempinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsvbus_drv-gpios#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-high