8( .firefly,firefly-rk3288-reloadrockchip,rk3288&7Firefly-RK3288-reloadaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|pamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkb dma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkbgreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem5 dwmmc@ff0c0000rockchip,rk3288-dw-mshc;р 5Drvbiuciuciu-driveciu-sampleI  @Tresetokay`j|default dwmmc@ff0d0000rockchip,rk3288-dw-mshc;р 5Eswbiuciuciu-driveciu-sampleI ! @Tresetokay`|default(dwmmc@ff0e0000rockchip,rk3288-dw-mshc;р 5Ftxbiuciuciu-driveciu-sampleI "@Treset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc;р 5Guybiuciuciu-driveciu-sampleI #@Tresetokay`j5Bdefaultsaradc@ff100000rockchip,saradc $Q5I[saradcapb_pclkW Tsaradc-apbokaybspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclkc htxrx ,default!"#$ disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclkc htxrx -default%&'( disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclkc  htxrx .default)*+, disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault- disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault. disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault/ disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault0okayb}serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7r|5MUbaudclkapb_pclkdefault 123okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8r|5NVbaudclkapb_pclkdefault4okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9r|5OWbaudclkapb_pclkdefault5okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :r|5PXbaudclkapb_pclkdefault6okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;r|5QYbaudclkapb_pclkdefault7 disabledthermal-zonesreserve_thermal8cpu_thermald8tripscpu_alert0ppassiveb9cpu_alert1$passiveb:cpu_crit_ criticalcooling-mapsmap090map1:0gpu_thermald8tripsgpu_alert0ppassiveb;gpu_crit_ criticalcooling-mapsmap0; <tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk Ttsadc-apbinitdefaultsleep=>=?sokay6Mb8ethernet@ff290000rockchip,rk3288-gmac)hmacirqeth_wake_irq?85fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Tstmmacethokx@inputdefaultABCDErgmii 'B@ F0usb@ff500000 generic-ehciP 5usbhost Gusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost H usb2-phy$okaydefaultIusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg;M\@@  J usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultKokaysyr827@40silergy,syr827k@vdd_cpu Pp, @Lb syr828@41silergy,syr828kAvdd_gpu PpLact8846@5aactive-semi,act8846ZdefaultMN)ALLLWLbLmLyLOregulatorsREG1vcc_ddrOOREG2vcc_io2Z2ZbREG3vdd_logREG4vcc_20bOREG5 vccio_sd2Z2ZbREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZbSREG9 vcca_lan2Z2ZbEREG10vdd_10B@B@REG11vcc_18w@w@bREG12 vcc18_lcdw@w@hym8563@51haoyu,hym8563Qxin32k&PdefaultQbi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultRokayes8328@10everest,es8328SSSS5Ri2s_hclki2s_clkpwm@ff680000rockchip,rk3288-pwmhdefaultT5_pwm disabledpwm@ff680010rockchip,rk3288-pwmhdefaultU5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultV5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultW5_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controllerxh bjpd_vio@9 5chgfdehilkj$XYZ[\]^_`pd_hevc@11 5opabpd_video@12 5cpd_gpu@13 5dereboot-modesyscon-reboot-modeRBRB RB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv?%Hxjk$2#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb?edp-phyrockchip,rk3288-dp-phy5h24mG disabledbzio-domains"rockchip,rk3288-io-voltage-domainokayR_iftEusbphyrockchip,rk3288-usb-phyokayusb-phy@320G 5]phyclk Tphy-resetbJusb-phy@334G45^phyclk Tphy-resetbGusb-phy@348GH5_phyclk Tphy-resetbHwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk5Tcghtx 6defaulth?okaybi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5cgghtxrxi2s_hclki2s_clk5Rdefaultiokaycypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk Tcrypto-rstokayiommu@ff900800rockchip,iommu@ hiep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P hisp_mmu5 aclkiface' disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkBj ilm Tcoreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopBj def TaxiahbdclkPkokayportb endpoint@0Wlbendpoint@1Wmb{endpoint@2Wnbuendpoint@3Wobxiommu@ff930300rockchip,iommu  hvopb_mmu5 aclkifaceBj okaybkvop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vopBj  TaxiahbdclkPpokayportb endpoint@0Wqbendpoint@1Wrb|endpoint@2Wsbvendpoint@3Wtbyiommu@ff940300rockchip,iommu  hvopl_mmu5 aclkifaceBj okaybpmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkBj ? disabledportsportendpoint@0Wubnendpoint@1Wvbslvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcwBj ? disabledportsport@0endpoint@0Wxboendpoint@1Wybtdp@ff970000rockchip,rk3288-dp@ b5icdppclk zdpoTdp? disabledportsport@0endpoint@0W{bmendpoint@1W|brhdmi@ff980000rockchip,rk3288-dw-hdmi|? g5hmniahbisfrcecBj okayg}default~portsportendpoint@0Wblendpoint@1Wbqvideo-codec@ff9a0000rockchip,rk3288-vpu   hvepuvdpu5 aclkhclkPBj iommu@ff9a0800rockchip,iommu hvpu_mmu5 aclkifaceBj biommu@ff9c0440rockchip,iommu @@@ o hhevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ hjobmmugpu5Bj  disabledb<gpu-opp-tableoperating-points-v2bopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bdqos@ffaa0080syscon beqos@ffad0000syscon bYqos@ffad0100syscon bZqos@ffad0180syscon b[qos@ffad0400syscon b\qos@ffad0480syscon b]qos@ffad0500syscon bXqos@ffad0800syscon b^qos@ffad0880syscon b_qos@ffad0900syscon b`qos@ffae0000syscon bcqos@ffaf0000syscon baqos@ffaf0080syscon bbefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17interrupt-controller@ffc01000 arm,gic-400s@ @ `   bpinctrlrockchip,rk3288-pinctrl?gpio0@ff750000rockchip,gpio-banku Q5@sbgpio1@ff780000rockchip,gpio-bankx R5Asgpio2@ff790000rockchip,gpio-banky S5Bsgpio3@ff7a0000rockchip,gpio-bankz T5Csgpio4@ff7b0000rockchip,gpio-bank{ U5DsbFgpio5@ff7c0000rockchip,gpio-bank| V5Esgpio6@ff7d0000rockchip,gpio-bank} W5Fsgpio7@ff7e0000rockchip,gpio-bank~ X5GsbPgpio8@ff7f0000rockchip,gpio-bank Y5Hsbhdmihdmi-cec-c0b~hdmi-cec-c7hdmi-ddc hdmi-ddc-unwedge pcfg-output-lowbpcfg-pull-upbpcfg-pull-downbpcfg-pull-nonebpcfg-pull-none-12ma bsleepglobal-pwroffddrio-pwroffddr0-retentionddr1-retentionedpedp-hpd i2c0i2c0-xfer bKi2c1i2c1-xfer b-i2c2i2c2-xfer   bRi2c3i2c3-xfer b.i2c4i2c4-xfer b/i2c5i2c5-xfer b0i2s0i2s0-bus`bilcdclcdc-ctl@bwsdmmcsdmmc-clkb sdmmc-cmdbsdmmc-cdbsdmmc-bus1sdmmc-bus4@bsdmmc-pwr bsdio0sdio0-bus1sdio0-bus4@bsdio0-cmdbsdio0-clkbsdio0-cdsdio0-wpsdio0-pwrsdio0-bkpwrsdio0-intbsdio1sdio1-bus1sdio1-bus4@sdio1-cdsdio1-wpsdio1-bkpwrsdio1-intsdio1-cmdsdio1-clksdio1-pwr emmcemmc-clkbemmc-cmdbemmc-pwr bemmc-bus1emmc-bus4@emmc-bus8bspi0spi0-clk b!spi0-cs0 b$spi0-txb"spi0-rxb#spi0-cs1spi1spi1-clk b%spi1-cs0 b(spi1-rxb'spi1-txb&spi2spi2-cs1spi2-clkb)spi2-cs0b,spi2-rxb+spi2-tx b*uart0uart0-xfer b1uart0-ctsb2uart0-rtsb3uart1uart1-xfer  b4uart1-cts uart1-rts uart2uart2-xfer b5uart3uart3-xfer b6uart3-cts uart3-rts uart4uart4-xfer b7uart4-cts uart4-rts tsadcotp-gpio b=otp-out b>pwm0pwm0-pinbTpwm1pwm1-pinbUpwm2pwm2-pinbVpwm3pwm3-pinbWgmacrgmii-pins bArmii-pinsphy-int bDphy-pmebbCphy-rstbBspdifspdif-tx bhpcfg-output-high bpcfg-pull-up-drv-12ma bact8846pwr-holdbNpmic-vselbMirir-intdvpdvp-pwr bcif-pwr bhym8563rtc-intbQkeyspwr-keybledspower-ledbwork-ledbsdiowifi-enablebusb_hosthost-vbus-drvbusbhub-rstbIusb_otgotg-vbus-drv bmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacb@flash-regulatorregulator-fixed vcc_flashw@w@badc-keys adc-keys  buttons /w@button-recovery IRecovery Oh Zgpio-keys gpio-keyspower t  IGPIO Power Otdefaultir-receivergpio-ir-receiver Pleds gpio-ledspower  Ifirefly:blue:powerdefault work  Ifirefly:blue:user rc-feedbackdefaultsdio-pwrseqmmc-pwrseq-simple5 ext_clockdefault Fbsoundsimple-audio-card SPDIFsimple-audio-card,dai-link@1cpu codec spdif-outlinux,spdif-ditbusb-host-regulatorregulator-fixed  default vcc_host_5vLK@LK@Lvsys-regulatorregulator-fixedvcc_5vLK@LK@bLsdmmc-regulatorregulator-fixed P defaultvcc_sd2Z2Z busb-otg-regulatorregulator-fixed   default vcc_otg_5vLK@LK@Ldovdd-1v8-regulatorregulator-fixed   default dovdd_1v8w@w@bfvcc28-dvp-regulatorregulator-fixed   default vcc28_dvp**af_28-regulatorregulator-fixed  P default dvdd_1v2OOwifi-regulatorregulator-fixedvbat_wl2Z2Zb #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50mmc-ddr-1_8vmmc-hs200-1_8v#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyDVDD-supplyAVDD-supplyPVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltwakeup-sourcegpiospanic-indicatorlinux,default-triggerreset-gpiossimple-audio-card,namesound-daienable-active-highstartup-delay-us