N8D( netxeon,r89rockchip,rk3288&aliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12!@/6rP \cpu@501cpuarm,cortex-a12!@/6r\cpu@502cpuarm,cortex-a12!@/6r\cpu@503cpuarm,cortex-a12!@/6r\cpu-opp-tableoperating-points-v2d\opp-126000000ov opp-216000000o v opp-312000000ov opp-408000000oQv opp-600000000o#Fv opp-696000000o)|v~opp-816000000o0,vB@opp-1008000000o<vopp-1200000000oGvopp-1416000000oTfrvOopp-1512000000oZJv opp-1608000000o_"vpamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@/ apb_pclk\dma-controller@ff600000arm,pl330arm,primecell`@/ apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@/ apb_pclk\Rreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24m\ timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H / a timerpclkdisplay-subsystemrockchip,display-subsystem/ dwmmc@ff0c0000rockchip,rk3288-dw-mshc5р /Drvbiuciuciu-driveciu-sampleC  @NresetokayZdvdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc5р /Eswbiuciuciu-driveciu-sampleC ! @Nreset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc5р /Ftxbiuciuciu-driveciu-sampleC "@Nreset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc5р /Guybiuciuciu-driveciu-sampleC #@Nreset disabledsaradc@ff100000rockchip,saradc $/I[saradcapb_pclkW Nsaradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi/ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi/BSspiclkapb_pclk txrx -default disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi/CTspiclkapb_pclktxrx .default  disabledi2c@ff140000rockchip,rk3288-i2c >i2c/Mdefault! disabledi2c@ff150000rockchip,rk3288-i2c ?i2c/Odefault" disabledi2c@ff160000rockchip,rk3288-i2c @i2c/Pdefault# disabledi2c@ff170000rockchip,rk3288-i2c Ai2c/Qdefault$okayserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7 /MUbaudclkapb_pclkdefault%okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8 /NVbaudclkapb_pclkdefault&okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9 /OWbaudclkapb_pclkdefault'okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart : /PXbaudclkapb_pclkdefault(okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ; /QYbaudclkapb_pclkdefault)okaythermal-zonesreserve_thermal/=*cpu_thermald/=*tripscpu_alert0MpYpassive\+cpu_alert1M$Ypassive\,cpu_critM_Y criticalcooling-mapsmap0d+0imap1d,0igpu_thermald/=*tripsgpu_alert0MpYpassive\-gpu_critM_Y criticalcooling-mapsmap0d- i.tsadc@ff280000rockchip,rk3288-tsadc( %/HZtsadcapb_pclk Ntsadc-apbinitdefaultsleep/x0/1sokay\*ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq18/fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Nstmmacethok2rgmiiinput )39 O'B@dt4default50usb@ff500000 generic-ehciP /usbhost6usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T /otghost7 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X /otgotg@@ 8 usb2-phyokayusb@ff5c0000 generic-ehci\ /usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c/Ldefault9okaypmic@40silergy,syr827@VDD_CPU',C P[ps@:\ pmic@41silergy,syr828AVDD_GPU',C P[ps@:rtc@51haoyu,hym8563Qxin32k&;default<pmic@5aactive-semi,act8846Zdefault=>regulatorsREG1VCC_DDRCO[OREG2VCC_IOC2Z[2Z\wREG3VDD_LOGCB@[B@REG4VCC_20C[REG5 VCCIO_SDC2Z[2Z\REG6 VDD10_LCDCB@[B@REG7VCC_WLC2Z[2ZREG8VCCA_33C2Z[2ZREG9VCC_LANC2Z[2Z\2REG10VDD_10CB@[B@REG11VCC_18Cw@[w@\REG12 VCC18_LCDCw@[w@i2c@ff660000rockchip,rk3288-i2cf =i2c/Ndefault? disabledpwm@ff680000rockchip,rk3288-pwmhdefault@/_pwmokaypwm@ff680010rockchip,rk3288-pwmhdefaultA/_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultB/_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultC/_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds\power-controller!rockchip,rk3288-power-controllerdht \Upd_vio@9 /chgfdehilkj$DEFGHIJKLpd_hevc@11 /opMNpd_video@12 /Opd_gpu@13 /PQreboot-modesyscon-reboot-modeRB RBRB (RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv14Hdjk$A#gׄeрxhрxh\syscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdw\1edp-phyrockchip,rk3288-dp-phy/h24mV disabled\eio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320V /]phyclk Nphy-reset\8usb-phy@334V4/^phyclk Nphy-reset\6usb-phy@348VH/_phyclk Nphy-reset\7watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifa hclkmclk/TRtx 6defaultS1 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sa 5RRtxrxi2s_hclki2s_clk/RdefaultTr disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 /}aclkhclksclkapb_pclk Ncrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu/ aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu/ aclkiface disabledrga@ff920000rockchip,rk3288-rga /jaclkhclksclkU ilm Ncoreaxiahbvop@ff930000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopU def NaxiahbdclkVokayport\ endpoint@0W\hendpoint@1X\fendpoint@2Y\`endpoint@3Z\ciommu@ff930300rockchip,iommu  vopb_mmu/ aclkifaceU okay\Vvop@ff940000rockchip,rk3288-vop /aclk_vopdclk_vophclk_vopU  Naxiahbdclk[okayport\ endpoint@0\\iendpoint@1]\gendpoint@2^\aendpoint@3_\diommu@ff940300rockchip,iommu  vopl_mmu/ aclkifaceU okay\[mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ /~d refpclkU 1 disabledportsportendpoint@0`\Yendpoint@1a\^lvds@ff96c000rockchip,rk3288-lvds@/g pclk_lvdslcdcbU 1 disabledportsport@0endpoint@0c\Zendpoint@1d\_dp@ff970000rockchip,rk3288-dp@ b/icdppclkedpoNdp1 disabledportsport@0endpoint@0f\Xendpoint@1g\]hdmi@ff980000rockchip,rk3288-dw-hdmi a1 g/hmniahbisfrcecU okayportsportendpoint@0h\Wendpoint@1i\\video-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu/ aclkhclkjU iommu@ff9a0800rockchip,iommu vpu_mmu/ aclkifaceU \jiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu/ aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu/kU  disabled\.gpu-opp-tableoperating-points-v2\kopp-100000000ov~opp-200000000o v~opp-300000000ovB@opp-400000000oׄvopp-600000000o#Fvqos@ffaa0000syscon \Pqos@ffaa0080syscon \Qqos@ffad0000syscon \Eqos@ffad0100syscon \Fqos@ffad0180syscon \Gqos@ffad0400syscon \Hqos@ffad0480syscon \Iqos@ffad0500syscon \Dqos@ffad0800syscon \Jqos@ffad0880syscon \Kqos@ffad0900syscon \Lqos@ffae0000syscon \Oqos@ffaf0000syscon \Mqos@ffaf0080syscon \Nefuse@ffb40000rockchip,rk3288-efuse /q pclk_efusecpu_leakage@17interrupt-controller@ffc01000 arm,gic-400 @ @ `   \pinctrlrockchip,rk3288-pinctrl1gpio0@ff750000rockchip,gpio-banku Q/@* \;gpio1@ff780000rockchip,gpio-bankx R/A* gpio2@ff790000rockchip,gpio-banky S/B* gpio3@ff7a0000rockchip,gpio-bankz T/C* gpio4@ff7b0000rockchip,gpio-bank{ U/D* \3gpio5@ff7c0000rockchip,gpio-bank| V/E* gpio6@ff7d0000rockchip,gpio-bank} W/F* gpio7@ff7e0000rockchip,gpio-bank~ X/G* \sgpio8@ff7f0000rockchip,gpio-bank Y/H* hdmihdmi-cec-c06lhdmi-cec-c76lhdmi-ddc 6llhdmi-ddc-unwedge 6mlpcfg-output-lowD\mpcfg-pull-upO\npcfg-pull-down\\opcfg-pull-nonek\lpcfg-pull-none-12makx \psleepglobal-pwroff6lddrio-pwroff6lddr0-retention6nddr1-retention6nedpedp-hpd6 oi2c0i2c0-xfer 6ll\9i2c1i2c1-xfer 6ll\!i2c2i2c2-xfer 6 l l\?i2c3i2c3-xfer 6ll\"i2c4i2c4-xfer 6ll\#i2c5i2c5-xfer 6ll\$i2s0i2s0-bus`6llllll\Tlcdclcdc-ctl@6llll\bsdmmcsdmmc-clk6l\ sdmmc-cmd6n\sdmmc-cd6n\sdmmc-bus16nsdmmc-bus4@6nnnn\sdio0sdio0-bus16nsdio0-bus4@6nnnnsdio0-cmd6nsdio0-clk6lsdio0-cd6nsdio0-wp6nsdio0-pwr6nsdio0-bkpwr6nsdio0-int6nsdio1sdio1-bus16nsdio1-bus4@6nnnnsdio1-cd6nsdio1-wp6nsdio1-bkpwr6nsdio1-int6nsdio1-cmd6nsdio1-clk6lsdio1-pwr6 nemmcemmc-clk6lemmc-cmd6nemmc-pwr6 nemmc-bus16nemmc-bus4@6nnnnemmc-bus86nnnnnnnnspi0spi0-clk6 n\spi0-cs06 n\spi0-tx6n\spi0-rx6n\spi0-cs16nspi1spi1-clk6 n\spi1-cs06 n\spi1-rx6n\spi1-tx6n\spi2spi2-cs16nspi2-clk6n\spi2-cs06n\ spi2-rx6n\spi2-tx6 n\uart0uart0-xfer 6nl\%uart0-cts6nuart0-rts6luart1uart1-xfer 6n l\&uart1-cts6 nuart1-rts6 luart2uart2-xfer 6nl\'uart3uart3-xfer 6nl\(uart3-cts6 nuart3-rts6 luart4uart4-xfer 6nl\)uart4-cts6 nuart4-rts6 ltsadcotp-gpio6 l\/otp-out6 l\0pwm0pwm0-pin6l\@pwm1pwm1-pin6l\Apwm2pwm2-pin6l\Bpwm3pwm3-pin6l\Cgmacrgmii-pins6llllpppplll ppll\5rmii-pins6llllllllllspdifspdif-tx6 l\Spcfg-output-high\qact8846pmic-vsel6m\=pwr-hold6q\>buttonspwrbtn6n\ririr-int6n\tpmicpmic-int6n\<usbhost-vbus-drv6l\uotg-vbus-drv6 l\vmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmac\4gpio-keys gpio-keysdefaultrpower ;tGPIO Key Powerdir-receivergpio-ir-receiver sdefaulttvcc-host-regulatorregulator-fixed 4;defaultu vcc_hostvcc-otg-regulatorregulator-fixed 4; defaultvvcc_otgsdmmc-regulatorregulator-fixed sdmmc-supplyC2Z[2Z 4s w\sys-regulatorregulator-fixed sys-supplyCLK@[LK@\: #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us