8(`%amarula,vyasa-rk3288rockchip,rk3288&7Amarula Vyasa-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|pamba simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkbdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkbZreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem5 dwmmc@ff0c0000rockchip,rk3288-dw-mshc;р 5Drvbiuciuciu-driveciu-sampleI  @Tresetokay`j|default dwmmc@ff0d0000rockchip,rk3288-dw-mshc;р 5Eswbiuciuciu-driveciu-sampleI ! @Treset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc;р 5Ftxbiuciuciu-driveciu-sampleI "@Treset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc;р 5Guybiuciuciu-driveciu-sampleI #@Tresetokay`jdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW Tsaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault( disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7 5MUbaudclkapb_pclkdefault) disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8 5NVbaudclkapb_pclkdefault* disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9 5OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart : 5PXbaudclkapb_pclkdefault, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ; 5QYbaudclkapb_pclkdefault- disabledthermal-zonesreserve_thermal!7E.cpu_thermal!d7E.tripscpu_alert0Upapassiveb/cpu_alert1U$apassiveb0cpu_critU_a criticalcooling-mapsmap0l/0qmap1l00qgpu_thermal!d7E.tripsgpu_alert0Upapassiveb1gpu_critU_a criticalcooling-mapsmap0l1 q2tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk Ttsadc-apbinitdefaultsleep3435sokayb.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq585fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Tstmmacethokay 67inputdefault789:D;OrgmiiX n'B@ <0usb@ff500000 generic-ehciP 5usbhost=usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost> usb2-phyokaydefault?usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ @ usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5LdefaultAokaypmic@1brockchip,rk808&Bxin32krk808-clkout2defaultCD$2E>EJEVEbEnEzEEEregulatorsDCDC_REG1vdd_arm qp b regulator-state-memDCDC_REG2vdd_gpu P buregulator-state-mem7OB@DCDC_REG3vcc_ddr regulator-state-mem7DCDC_REG4vcc_io2Z2Z bregulator-state-mem7O2ZLDO_REG1vcc_tp2Z2Z regulator-state-mem7O2ZLDO_REG2 vcc_codec2Z2Z regulator-state-memLDO_REG3vdd_10B@B@ regulator-state-mem7OB@LDO_REG4vcc_gpsw@w@ regulator-state-mem7Ow@LDO_REG5 vccio_sdw@2Z bregulator-state-mem7O2ZLDO_REG6 vcc10_lcdB@B@ regulator-state-mem7Ow@LDO_REG7vcc_18w@w@ bYregulator-state-mem7Ow@LDO_REG8 vcc18_lcdw@w@ regulator-state-mem7Ow@SWITCH_REG1vcc_sd2Z2Z bregulator-state-mem7SWITCH_REG2vcc_lan2Z2Z b;regulator-state-mem7i2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultFokaybppwm@ff680000rockchip,rk3288-pwmhkdefaultG5_pwm disabledpwm@ff680010rockchip,rk3288-pwmhkdefaultH5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh kdefaultI5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0kdefaultJ5_pwm disabledbus_intmem@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controllervh b]pd_vio@9 5chgfdehilkj$KLMNOPQRSpd_hevc@11 5opTUpd_video@12 5Vpd_gpu@13 5WXreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5Hjk$#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb5edp-phyrockchip,rk3288-dp-phy5h24m disabledbmio-domains"rockchip,rk3288-io-voltage-domainokayYY+;9GP\jYusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclk Tphy-resetb@usb-phy@33445^phyclk Tphy-resetb=usb-phy@348H5_phyclk Tphy-resetb>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifv hclkmclk5TZtx 6default[5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sv 5ZZtxrxi2s_hclki2s_clk5Rdefault\ disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk Tcrypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkiface disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk] ilm Tcoreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop] def Taxiahbdclk^okayportb endpoint@0_bqendpoint@1`bnendpoint@2abhendpoint@3bbkiommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface] okayb^vop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop]  Taxiahbdclkcokayportb endpoint@0dbrendpoint@1eboendpoint@2fbiendpoint@3gbliommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface] okaybcmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk] 5 disabledportsportendpoint@0hbaendpoint@1ibflvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcj] 5 disabledportsport@0endpoint@0kbbendpoint@1lbgdp@ff970000rockchip,rk3288-dp@ b5icdppclkmdpoTdp5 disabledportsport@0endpoint@0nb`endpoint@1obehdmi@ff980000rockchip,rk3288-dw-hdmiv5 g5hmniahbisfrcec] okay pportsportendpoint@0qb_endpoint@1rbdvideo-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclks] iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkiface] bsiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5t] okayub2gpu-opp-tableoperating-points-v2btopp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bWqos@ffaa0080syscon bXqos@ffad0000syscon bLqos@ffad0100syscon bMqos@ffad0180syscon bNqos@ffad0400syscon bOqos@ffad0480syscon bPqos@ffad0500syscon bKqos@ffad0800syscon bQqos@ffad0880syscon bRqos@ffad0900syscon bSqos@ffae0000syscon bVqos@ffaf0000syscon bTqos@ffaf0080syscon bUefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17interrupt-controller@ffc01000 arm,gic-400!6@ @ `   bpinctrlrockchip,rk3288-pinctrl5gpio0@ff750000rockchip,gpio-banku Q5@GW!6bBgpio1@ff780000rockchip,gpio-bankx R5AGW!6gpio2@ff790000rockchip,gpio-banky S5BGW!6gpio3@ff7a0000rockchip,gpio-bankz T5CGW!6gpio4@ff7b0000rockchip,gpio-bank{ U5DGW!6b<gpio5@ff7c0000rockchip,gpio-bank| V5EGW!6gpio6@ff7d0000rockchip,gpio-bank} W5FGW!6gpio7@ff7e0000rockchip,gpio-bank~ X5GGW!6gpio8@ff7f0000rockchip,gpio-bank Y5HGW!6bhdmihdmi-cec-c0cvhdmi-cec-c7cvhdmi-ddc cvvhdmi-ddc-unwedge cwvpcfg-output-lowqbwpcfg-pull-up|bxpcfg-pull-downbypcfg-pull-nonebvpcfg-pull-none-12ma bzsleepglobal-pwroffcvbDddrio-pwroffcvddr0-retentioncxddr1-retentioncxedpedp-hpdc yi2c0i2c0-xfer cvvbAi2c1i2c1-xfer cvvb%i2c2i2c2-xfer c v vbFi2c3i2c3-xfer cvvb&i2c4i2c4-xfer cvvb'i2c5i2c5-xfer cvvb(i2s0i2s0-bus`cvvvvvvb\lcdclcdc-ctl@cvvvvbjsdmmcsdmmc-clkcvb sdmmc-cmdcxbsdmmc-cdcxbsdmmc-bus1cxsdmmc-bus4@cxxxxbsdio0sdio0-bus1cxsdio0-bus4@cxxxxsdio0-cmdcxsdio0-clkcvsdio0-cdcxsdio0-wpcxsdio0-pwrcxsdio0-bkpwrcxsdio0-intcxsdio1sdio1-bus1cxsdio1-bus4@cxxxxsdio1-cdcxsdio1-wpcxsdio1-bkpwrcxsdio1-intcxsdio1-cmdcxsdio1-clkcvsdio1-pwrc xemmcemmc-clkcvbemmc-cmdcxbemmc-pwrc xbemmc-bus1cxemmc-bus4@cxxxxemmc-bus8cxxxxxxxxbspi0spi0-clkc xbspi0-cs0c xbspi0-txcxbspi0-rxcxbspi0-cs1cxspi1spi1-clkc xbspi1-cs0c xb spi1-rxcxbspi1-txcxbspi2spi2-cs1cxspi2-clkcxb!spi2-cs0cxb$spi2-rxcxb#spi2-txc xb"uart0uart0-xfer cxvb)uart0-ctscxuart0-rtscvuart1uart1-xfer cx vb*uart1-ctsc xuart1-rtsc vuart2uart2-xfer cxvb+uart3uart3-xfer cxvb,uart3-ctsc xuart3-rtsc vuart4uart4-xfer cxvb-uart4-ctsc xuart4-rtsc vtsadcotp-gpioc vb3otp-outc vb4pwm0pwm0-pincvbGpwm1pwm1-pincvbHpwm2pwm2-pincvbIpwm3pwm3-pincvbJgmacrgmii-pinscvvvvzzzzvvv zzvvb7rmii-pinscvvvvvvvvvvphy-intc xb:phy-pmebcxb9phy-rstc{b8spdifspdif-txc vb[pcfg-output-highb{pmicpmic-intcxbCusb_hostphy-pwr-enc {b?usb2-pwr-enc vbusb_otgotg-vbus-drvc vb}chosen/serial@ff690000memorymemorydc12-vbatregulator-fixed dc12_vbat b|vboot-3v3regulator-fixed vboot_3v32Z2Z |vsys-regulatorregulator-fixedvcc_sys8u 8u  |bEvboot-5vregulator-fixed vboot_svLK@LK@ |v3g-3v3regulator-fixedv3g_3v32Z2Z |vsus-5vregulator-fixedvsus_5vLK@LK@ b~vusb1-5vregulator-fixed vusb1_5v B default}LK@LK@ ~vusb2-5vregulator-fixed vusb2_5v  defaultLK@LK@ ~external-gmac-clock fixed-clocksY@ ext_gmacb6 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-suuplyflash1-supplygpio30-supplygpio1830lcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathvin-supplyenable-active-high