J]8F(F*STMicroelectronics STM32F469i-DISCO board!!st,stm32f469i-discost,stm32f469interrupt-controller@e000e100!arm,armv7m-nvic,AR Vtimer@e000e010!arm,armv7m-systickR^okay esoc !simple-busl} nvmem@1fff7800!st,stm32f4-otpRxcalib@22cR,calib@22eR.timer@40000000!st,stm32-timerR@ e ^disabledtimers@40000000!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimer@40000400!st,stm32-timerR@ e ^disabledtimers@40000400!st,stm32-timersR@ eint^okaypwm !st,stm32-pwm^okaydefaulttimer@2!st,stm32-timer-triggerR^okaytimer@40000800!st,stm32-timerR@ e ^disabledtimers@40000800!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimer@40000c00!st,stm32-timerR@ 2 etimers@40000c00!st,stm32-timersR@  eint ^disabledpwm !st,stm32-pwm ^disabledtimer@4!st,stm32-timer-triggerR ^disabledtimer@40001000!st,stm32-timerR@6 e ^disabledtimers@40001000!st,stm32-timersR@ eint ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimer@40001400!st,stm32-timerR@7 e ^disabledtimers@40001400!st,stm32-timersR@ eint ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimers@40002000!st,stm32-timersR@  eint ^disabledpwm !st,stm32-pwm ^disabledrtc@40002800 !st,stm32-rtcR@( eck_rtc  lalarm ^okaywatchdog@40003000!st,stm32-iwdgR@0elsi ^disabledspi@40003800!st,stm32f4-spiR@8$ e ^disabledspi@40003c00!st,stm32f4-spiR@<3 e ^disabledserial@40004400!st,stm32-uartR@D& e ^disabledserial@40004800!st,stm32-uartR@H' e^okay(rxtxdefaultserial@40004c00!st,stm32-uartR@L4 e ^disabledserial@40005000!st,stm32-uartR@P5 e ^disabledi2c@40005400!st,stm32f4-i2cR@T  e ^disableddac@40007400!st,stm32f4-dac-coreR@t epclk ^disableddac@1 !st,stm32-dacR ^disableddac@2 !st,stm32-dacR ^disabledserial@40007800!st,stm32-uartR@xR e ^disabledserial@40007c00!st,stm32-uartR@|S e ^disabledtimers@40010000!st,stm32-timersR@ eint^okaypwm !st,stm32-pwm^okay defaulttimer@0!st,stm32-timer-triggerR^okaytimers@40010400!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32-uartR@% e ^disabled(  rxtxserial@40011400!st,stm32-uartR@G e ^disabledadc@40012000!st,stm32f4-adc-coreR@  eadc,A ^disabledV adc@0!st,stm32f4-adc(R el  rx ^disabledadc@100!st,stm32f4-adc(R el  rx ^disabledadc@200!st,stm32f4-adc(R el  rx ^disabledsdio@40012c00!arm,pl180arm,primecell:R@, e apb_pclk1Ql^okay_  k tdefaultopendrain~spi@40013000!st,stm32f4-spiR@0# e ^disabledspi@40013400!st,stm32f4-spiR@4T e ^disabledsystem-config@40013800!sysconR@8Vinterrupt-controller@40013c00!st,stm32-exti,AR@<8 ()*>LVtimers@40014000!st,stm32-timersR@@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D eint ^disabledpwm !st,stm32-pwm ^disabledtimers@40014800!st,stm32-timersR@H eint ^disabledpwm !st,stm32-pwm ^disabledspi@40015000!st,stm32f4-spiR@PU e ^disabledspi@40015400!st,stm32f4-spiR@TV e ^disabledpower-config@40007000!sysconR@pVdisplay-controller@40016800!st,stm32-ltdcR@hXY: elcd^okayportendpoint@0Vcrc@40023000!st,stm32f4-crcR@0 e  ^disabledrcc@400238100!st,stm32f469-rccst,stm32f42xx-rccst,stm32-rccR@8e B@Vdma-controller@40026000 !st,stm32-dmaR@` / eVdma-controller@40026400 !st,stm32-dmaR@d 89:;<DEF eV ethernet@40028000 !st,stm32-dwmacsnps,dwmac-3.50aR@ stmmaceth=macirq stmmacethmac-clk-txmac-clk-rx$e ^disabledusb@40040000 !snps,dwc2R@M eotg ^disabledusb@50000000!st,stm32f4x9-fsotgRPC e'otg^okayhostdefaultdcmi@50050000!st,stm32-dcmiRPN e mclkdefault tx ^disabledrng@50060800 !st,stm32-rngRPP e&dsi@40016c00 !st,stm32-dsiR@l\;apbe pclkref^okayportsport@0RendpointVport@1RendpointVpanel-dsi@0!orisetech,otm8009aR )^okayportendpointVpin-controller }@0l5!st,stm32f469-pinctrlVgpio@40020000GW,AR ecGPIOApVgpio@40020400GW,AR ecGPIOBpVgpio@40020800GW,AR ecGPIOCp gpio@40020c00GW,AR  ecGPIODp0Vgpio@40021000GW,AR ecGPIOEp@gpio@40021400GW,AR ecGPIOFpPgpio@40021800GW,AR ecGPIOGp`V gpio@40021c00GW,AR ecGPIOHppVgpio@40022000GW,AR  ecGPIOIpgpio@40022400GW,AR$ e cGPIOJ p gpio@40022800GW,AR( e cGPIOKpVusart1@0pins1| pins2| usart3@0Vpins1|pins2|usbotg_fs@0Vpins | usbotg_fs@1pins |   usbotg_hs@0pins0|t          mii@0pins8|m n "  # k  !   $ % v w adc@200pins|Zpwm@1V pins |pwm@3Vpins|i2c1@0pins|ltdc@0pinsp|dcmi@0Vpins<|&'()+3F*,62sdio_pins@0Vpins|( ) * + , 2 sdio_pins_od@0Vpins1|( ) * + , pins2|2 clocksclk-hse !fixed-clockzVclk-lse !fixed-clockclk-lsi !fixed-clock}Vi2s-ckin !fixed-clockVchosenroot=/dev/ramserial0:115200n8memorymemoryRaliases/soc/serial@40004800mmc_vcard!regulator-fixed mmc_vcard2Z2ZV leds !gpio-ledsgreen n  3heartbeatorange nred nblue ngpio_keys !gpio-keysIbutton@0TUserZ nvcc5v-otg-regulator!regulator-fixede x vcc5_host1} #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesdma-rangesinterruptsclock-namespinctrl-0pinctrl-namesassigned-clocksassigned-clock-parentsinterrupt-namesst,syscfgdmasdma-namesresets#io-channels-cells#io-channel-cellsarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiosbroken-cdpinctrl-1bus-widthremote-endpoint#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memreg-namesst,sysconsnps,pblsnps,mixed-burstdr_modereset-namesreset-gpiospins-are-numberedgpio-controller#gpio-cellsst,bank-namegpio-rangespinmuxbias-disabledrive-push-pullslew-ratedrive-open-drainclock-frequencybootargsstdout-pathdevice_typeserial0regulator-nameregulator-min-microvoltregulator-max-microvoltlinux,default-triggerautorepeatlabellinux,codeenable-active-highgpioregulator-always-on